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12 #ifndef _MT8173_AFE_COMMON_H_
13 #define _MT8173_AFE_COMMON_H_
14
15 #include <linux/clk.h>
16 #include <linux/regmap.h>
17
18 enum {
19 MT8173_AFE_MEMIF_DL1,
20 MT8173_AFE_MEMIF_DL2,
21 MT8173_AFE_MEMIF_VUL,
22 MT8173_AFE_MEMIF_DAI,
23 MT8173_AFE_MEMIF_AWB,
24 MT8173_AFE_MEMIF_MOD_DAI,
25 MT8173_AFE_MEMIF_HDMI,
26 MT8173_AFE_MEMIF_NUM,
27 MT8173_AFE_IO_MOD_PCM1 = MT8173_AFE_MEMIF_NUM,
28 MT8173_AFE_IO_MOD_PCM2,
29 MT8173_AFE_IO_PMIC,
30 MT8173_AFE_IO_I2S,
31 MT8173_AFE_IO_2ND_I2S,
32 MT8173_AFE_IO_HW_GAIN1,
33 MT8173_AFE_IO_HW_GAIN2,
34 MT8173_AFE_IO_MRG_O,
35 MT8173_AFE_IO_MRG_I,
36 MT8173_AFE_IO_DAIBT,
37 MT8173_AFE_IO_HDMI,
38 };
39
40 enum {
41 MT8173_AFE_IRQ_DL1,
42 MT8173_AFE_IRQ_DL2,
43 MT8173_AFE_IRQ_VUL,
44 MT8173_AFE_IRQ_DAI,
45 MT8173_AFE_IRQ_AWB,
46 MT8173_AFE_IRQ_MOD_DAI,
47 MT8173_AFE_IRQ_HDMI,
48 MT8173_AFE_IRQ_NUM,
49 };
50
51 enum {
52 MT8173_CLK_INFRASYS_AUD,
53 MT8173_CLK_TOP_PDN_AUD,
54 MT8173_CLK_TOP_PDN_AUD_BUS,
55 MT8173_CLK_I2S0_M,
56 MT8173_CLK_I2S1_M,
57 MT8173_CLK_I2S2_M,
58 MT8173_CLK_I2S3_M,
59 MT8173_CLK_I2S3_B,
60 MT8173_CLK_BCK0,
61 MT8173_CLK_BCK1,
62 MT8173_CLK_NUM
63 };
64
65 #endif