root/sound/soc/meson/axg-toddr.c

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DEFINITIONS

This source file includes following definitions.
  1. axg_toddr_pcm_new
  2. g12a_toddr_dai_prepare
  3. axg_toddr_dai_hw_params
  4. axg_toddr_dai_startup
  5. axg_toddr_dai_shutdown

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 //
   3 // Copyright (c) 2018 BayLibre, SAS.
   4 // Author: Jerome Brunet <jbrunet@baylibre.com>
   5 
   6 /* This driver implements the frontend capture DAI of AXG based SoCs */
   7 
   8 #include <linux/clk.h>
   9 #include <linux/regmap.h>
  10 #include <linux/module.h>
  11 #include <linux/of_platform.h>
  12 #include <sound/pcm_params.h>
  13 #include <sound/soc.h>
  14 #include <sound/soc-dai.h>
  15 
  16 #include "axg-fifo.h"
  17 
  18 #define CTRL0_TODDR_SEL_RESAMPLE        BIT(30)
  19 #define CTRL0_TODDR_EXT_SIGNED          BIT(29)
  20 #define CTRL0_TODDR_PP_MODE             BIT(28)
  21 #define CTRL0_TODDR_TYPE_MASK           GENMASK(15, 13)
  22 #define CTRL0_TODDR_TYPE(x)             ((x) << 13)
  23 #define CTRL0_TODDR_MSB_POS_MASK        GENMASK(12, 8)
  24 #define CTRL0_TODDR_MSB_POS(x)          ((x) << 8)
  25 #define CTRL0_TODDR_LSB_POS_MASK        GENMASK(7, 3)
  26 #define CTRL0_TODDR_LSB_POS(x)          ((x) << 3)
  27 #define CTRL1_TODDR_FORCE_FINISH        BIT(25)
  28 #define CTRL1_SEL_SHIFT                 28
  29 
  30 #define TODDR_MSB_POS   31
  31 
  32 static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd,
  33                              struct snd_soc_dai *dai)
  34 {
  35         return axg_fifo_pcm_new(rtd, SNDRV_PCM_STREAM_CAPTURE);
  36 }
  37 
  38 static int g12a_toddr_dai_prepare(struct snd_pcm_substream *substream,
  39                                   struct snd_soc_dai *dai)
  40 {
  41         struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
  42 
  43         /* Reset the write pointer to the FIFO_INIT_ADDR */
  44         regmap_update_bits(fifo->map, FIFO_CTRL1,
  45                            CTRL1_TODDR_FORCE_FINISH, 0);
  46         regmap_update_bits(fifo->map, FIFO_CTRL1,
  47                            CTRL1_TODDR_FORCE_FINISH, CTRL1_TODDR_FORCE_FINISH);
  48         regmap_update_bits(fifo->map, FIFO_CTRL1,
  49                            CTRL1_TODDR_FORCE_FINISH, 0);
  50 
  51         return 0;
  52 }
  53 
  54 static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream,
  55                                    struct snd_pcm_hw_params *params,
  56                                    struct snd_soc_dai *dai)
  57 {
  58         struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
  59         unsigned int type, width;
  60 
  61         switch (params_physical_width(params)) {
  62         case 8:
  63                 type = 0; /* 8 samples of 8 bits */
  64                 break;
  65         case 16:
  66                 type = 2; /* 4 samples of 16 bits - right justified */
  67                 break;
  68         case 32:
  69                 type = 4; /* 2 samples of 32 bits - right justified */
  70                 break;
  71         default:
  72                 return -EINVAL;
  73         }
  74 
  75         width = params_width(params);
  76 
  77         regmap_update_bits(fifo->map, FIFO_CTRL0,
  78                            CTRL0_TODDR_TYPE_MASK |
  79                            CTRL0_TODDR_MSB_POS_MASK |
  80                            CTRL0_TODDR_LSB_POS_MASK,
  81                            CTRL0_TODDR_TYPE(type) |
  82                            CTRL0_TODDR_MSB_POS(TODDR_MSB_POS) |
  83                            CTRL0_TODDR_LSB_POS(TODDR_MSB_POS - (width - 1)));
  84 
  85         return 0;
  86 }
  87 
  88 static int axg_toddr_dai_startup(struct snd_pcm_substream *substream,
  89                                  struct snd_soc_dai *dai)
  90 {
  91         struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
  92         int ret;
  93 
  94         /* Enable pclk to access registers and clock the fifo ip */
  95         ret = clk_prepare_enable(fifo->pclk);
  96         if (ret)
  97                 return ret;
  98 
  99         /* Select orginal data - resampling not supported ATM */
 100         regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SEL_RESAMPLE, 0);
 101 
 102         /* Only signed format are supported ATM */
 103         regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_EXT_SIGNED,
 104                            CTRL0_TODDR_EXT_SIGNED);
 105 
 106         /* Apply single buffer mode to the interface */
 107         regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0);
 108 
 109         return 0;
 110 }
 111 
 112 static void axg_toddr_dai_shutdown(struct snd_pcm_substream *substream,
 113                                    struct snd_soc_dai *dai)
 114 {
 115         struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
 116 
 117         clk_disable_unprepare(fifo->pclk);
 118 }
 119 
 120 static const struct snd_soc_dai_ops axg_toddr_ops = {
 121         .hw_params      = axg_toddr_dai_hw_params,
 122         .startup        = axg_toddr_dai_startup,
 123         .shutdown       = axg_toddr_dai_shutdown,
 124 };
 125 
 126 static struct snd_soc_dai_driver axg_toddr_dai_drv = {
 127         .name = "TODDR",
 128         .capture = {
 129                 .stream_name    = "Capture",
 130                 .channels_min   = 1,
 131                 .channels_max   = AXG_FIFO_CH_MAX,
 132                 .rates          = AXG_FIFO_RATES,
 133                 .formats        = AXG_FIFO_FORMATS,
 134         },
 135         .ops            = &axg_toddr_ops,
 136         .pcm_new        = axg_toddr_pcm_new,
 137 };
 138 
 139 static const char * const axg_toddr_sel_texts[] = {
 140         "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7"
 141 };
 142 
 143 static SOC_ENUM_SINGLE_DECL(axg_toddr_sel_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
 144                             axg_toddr_sel_texts);
 145 
 146 static const struct snd_kcontrol_new axg_toddr_in_mux =
 147         SOC_DAPM_ENUM("Input Source", axg_toddr_sel_enum);
 148 
 149 static const struct snd_soc_dapm_widget axg_toddr_dapm_widgets[] = {
 150         SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_toddr_in_mux),
 151         SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
 152         SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
 153         SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
 154         SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
 155         SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
 156         SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
 157         SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0),
 158         SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0),
 159 };
 160 
 161 static const struct snd_soc_dapm_route axg_toddr_dapm_routes[] = {
 162         { "Capture", NULL, "SRC SEL" },
 163         { "SRC SEL", "IN 0", "IN 0" },
 164         { "SRC SEL", "IN 1", "IN 1" },
 165         { "SRC SEL", "IN 2", "IN 2" },
 166         { "SRC SEL", "IN 3", "IN 3" },
 167         { "SRC SEL", "IN 4", "IN 4" },
 168         { "SRC SEL", "IN 5", "IN 5" },
 169         { "SRC SEL", "IN 6", "IN 6" },
 170         { "SRC SEL", "IN 7", "IN 7" },
 171 };
 172 
 173 static const struct snd_soc_component_driver axg_toddr_component_drv = {
 174         .dapm_widgets           = axg_toddr_dapm_widgets,
 175         .num_dapm_widgets       = ARRAY_SIZE(axg_toddr_dapm_widgets),
 176         .dapm_routes            = axg_toddr_dapm_routes,
 177         .num_dapm_routes        = ARRAY_SIZE(axg_toddr_dapm_routes),
 178         .ops                    = &axg_fifo_pcm_ops
 179 };
 180 
 181 static const struct axg_fifo_match_data axg_toddr_match_data = {
 182         .field_threshold        = REG_FIELD(FIFO_CTRL1, 16, 23),
 183         .component_drv          = &axg_toddr_component_drv,
 184         .dai_drv                = &axg_toddr_dai_drv
 185 };
 186 
 187 static const struct snd_soc_dai_ops g12a_toddr_ops = {
 188         .prepare        = g12a_toddr_dai_prepare,
 189         .hw_params      = axg_toddr_dai_hw_params,
 190         .startup        = axg_toddr_dai_startup,
 191         .shutdown       = axg_toddr_dai_shutdown,
 192 };
 193 
 194 static struct snd_soc_dai_driver g12a_toddr_dai_drv = {
 195         .name = "TODDR",
 196         .capture = {
 197                 .stream_name    = "Capture",
 198                 .channels_min   = 1,
 199                 .channels_max   = AXG_FIFO_CH_MAX,
 200                 .rates          = AXG_FIFO_RATES,
 201                 .formats        = AXG_FIFO_FORMATS,
 202         },
 203         .ops            = &g12a_toddr_ops,
 204         .pcm_new        = axg_toddr_pcm_new,
 205 };
 206 
 207 static const struct snd_soc_component_driver g12a_toddr_component_drv = {
 208         .dapm_widgets           = axg_toddr_dapm_widgets,
 209         .num_dapm_widgets       = ARRAY_SIZE(axg_toddr_dapm_widgets),
 210         .dapm_routes            = axg_toddr_dapm_routes,
 211         .num_dapm_routes        = ARRAY_SIZE(axg_toddr_dapm_routes),
 212         .ops                    = &g12a_fifo_pcm_ops
 213 };
 214 
 215 static const struct axg_fifo_match_data g12a_toddr_match_data = {
 216         .field_threshold        = REG_FIELD(FIFO_CTRL1, 16, 23),
 217         .component_drv          = &g12a_toddr_component_drv,
 218         .dai_drv                = &g12a_toddr_dai_drv
 219 };
 220 
 221 static const char * const sm1_toddr_sel_texts[] = {
 222         "IN 0", "IN 1", "IN 2",  "IN 3",  "IN 4",  "IN 5",  "IN 6",  "IN 7",
 223         "IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15"
 224 };
 225 
 226 static SOC_ENUM_SINGLE_DECL(sm1_toddr_sel_enum, FIFO_CTRL1, CTRL1_SEL_SHIFT,
 227                             sm1_toddr_sel_texts);
 228 
 229 static const struct snd_kcontrol_new sm1_toddr_in_mux =
 230         SOC_DAPM_ENUM("Input Source", sm1_toddr_sel_enum);
 231 
 232 static const struct snd_soc_dapm_widget sm1_toddr_dapm_widgets[] = {
 233         SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_toddr_in_mux),
 234         SND_SOC_DAPM_AIF_IN("IN 0",  NULL, 0, SND_SOC_NOPM, 0, 0),
 235         SND_SOC_DAPM_AIF_IN("IN 1",  NULL, 0, SND_SOC_NOPM, 0, 0),
 236         SND_SOC_DAPM_AIF_IN("IN 2",  NULL, 0, SND_SOC_NOPM, 0, 0),
 237         SND_SOC_DAPM_AIF_IN("IN 3",  NULL, 0, SND_SOC_NOPM, 0, 0),
 238         SND_SOC_DAPM_AIF_IN("IN 4",  NULL, 0, SND_SOC_NOPM, 0, 0),
 239         SND_SOC_DAPM_AIF_IN("IN 5",  NULL, 0, SND_SOC_NOPM, 0, 0),
 240         SND_SOC_DAPM_AIF_IN("IN 6",  NULL, 0, SND_SOC_NOPM, 0, 0),
 241         SND_SOC_DAPM_AIF_IN("IN 7",  NULL, 0, SND_SOC_NOPM, 0, 0),
 242         SND_SOC_DAPM_AIF_IN("IN 8",  NULL, 0, SND_SOC_NOPM, 0, 0),
 243         SND_SOC_DAPM_AIF_IN("IN 9",  NULL, 0, SND_SOC_NOPM, 0, 0),
 244         SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0),
 245         SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0),
 246         SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0),
 247         SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0),
 248         SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0),
 249         SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0),
 250 };
 251 
 252 static const struct snd_soc_dapm_route sm1_toddr_dapm_routes[] = {
 253         { "Capture", NULL, "SRC SEL" },
 254         { "SRC SEL", "IN 0",  "IN 0" },
 255         { "SRC SEL", "IN 1",  "IN 1" },
 256         { "SRC SEL", "IN 2",  "IN 2" },
 257         { "SRC SEL", "IN 3",  "IN 3" },
 258         { "SRC SEL", "IN 4",  "IN 4" },
 259         { "SRC SEL", "IN 5",  "IN 5" },
 260         { "SRC SEL", "IN 6",  "IN 6" },
 261         { "SRC SEL", "IN 7",  "IN 7" },
 262         { "SRC SEL", "IN 8",  "IN 8" },
 263         { "SRC SEL", "IN 9",  "IN 9" },
 264         { "SRC SEL", "IN 10", "IN 10" },
 265         { "SRC SEL", "IN 11", "IN 11" },
 266         { "SRC SEL", "IN 12", "IN 12" },
 267         { "SRC SEL", "IN 13", "IN 13" },
 268         { "SRC SEL", "IN 14", "IN 14" },
 269         { "SRC SEL", "IN 15", "IN 15" },
 270 };
 271 
 272 static const struct snd_soc_component_driver sm1_toddr_component_drv = {
 273         .dapm_widgets           = sm1_toddr_dapm_widgets,
 274         .num_dapm_widgets       = ARRAY_SIZE(sm1_toddr_dapm_widgets),
 275         .dapm_routes            = sm1_toddr_dapm_routes,
 276         .num_dapm_routes        = ARRAY_SIZE(sm1_toddr_dapm_routes),
 277         .ops                    = &g12a_fifo_pcm_ops
 278 };
 279 
 280 static const struct axg_fifo_match_data sm1_toddr_match_data = {
 281         .field_threshold        = REG_FIELD(FIFO_CTRL1, 12, 23),
 282         .component_drv          = &sm1_toddr_component_drv,
 283         .dai_drv                = &g12a_toddr_dai_drv
 284 };
 285 
 286 static const struct of_device_id axg_toddr_of_match[] = {
 287         {
 288                 .compatible = "amlogic,axg-toddr",
 289                 .data = &axg_toddr_match_data,
 290         }, {
 291                 .compatible = "amlogic,g12a-toddr",
 292                 .data = &g12a_toddr_match_data,
 293         }, {
 294                 .compatible = "amlogic,sm1-toddr",
 295                 .data = &sm1_toddr_match_data,
 296         }, {}
 297 };
 298 MODULE_DEVICE_TABLE(of, axg_toddr_of_match);
 299 
 300 static struct platform_driver axg_toddr_pdrv = {
 301         .probe = axg_fifo_probe,
 302         .driver = {
 303                 .name = "axg-toddr",
 304                 .of_match_table = axg_toddr_of_match,
 305         },
 306 };
 307 module_platform_driver(axg_toddr_pdrv);
 308 
 309 MODULE_DESCRIPTION("Amlogic AXG capture fifo driver");
 310 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
 311 MODULE_LICENSE("GPL v2");

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