root/sound/soc/txx9/txx9aclc.h

INCLUDED FROM

DEFINITIONS

1. txx9aclc_get_plat_drvdata

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * TXx9 SoC AC Link Controller
   4  */
   5 
   6 #ifndef __TXX9ACLC_H
   7 #define __TXX9ACLC_H
   8 
   9 #include <linux/interrupt.h>
  10 #include <asm/txx9/dmac.h>
  11 
  12 #define ACCTLEN                 0x00    /* control enable */
  13 #define ACCTLDIS                0x04    /* control disable */
  14 #define   ACCTL_ENLINK          0x00000001      /* enable/disable AC-link */
  15 #define   ACCTL_AUDODMA         0x00000100      /* AUDODMA enable/disable */
  16 #define   ACCTL_AUDIDMA         0x00001000      /* AUDIDMA enable/disable */
  17 #define   ACCTL_AUDOEHLT        0x00010000      /* AUDO error halt
  18                                                    enable/disable */
  19 #define   ACCTL_AUDIEHLT        0x00100000      /* AUDI error halt
  20                                                    enable/disable */
  21 #define ACREGACC                0x08    /* codec register access */
  22 #define   ACREGACC_DAT_SHIFT    0       /* data field */
  23 #define   ACREGACC_REG_SHIFT    16      /* address field */
  24 #define   ACREGACC_CODECID_SHIFT        24      /* CODEC ID field */
  25 #define   ACREGACC_READ         0x80000000      /* CODEC read */
  26 #define   ACREGACC_WRITE        0x00000000      /* CODEC write */
  27 #define ACINTSTS                0x10    /* interrupt status */
  28 #define ACINTMSTS               0x14    /* interrupt masked status */
  29 #define ACINTEN                 0x18    /* interrupt enable */
  30 #define ACINTDIS                0x1c    /* interrupt disable */
  31 #define   ACINT_CODECRDY(n)     (0x00000001 << (n))     /* CODECn ready */
  32 #define   ACINT_REGACCRDY       0x00000010      /* ACREGACC ready */
  33 #define   ACINT_AUDOERR         0x00000100      /* AUDO underrun error */
  34 #define   ACINT_AUDIERR         0x00001000      /* AUDI overrun error */
  35 #define ACDMASTS                0x80    /* DMA request status */
  36 #define   ACDMA_AUDO            0x00000001      /* AUDODMA pending */
  37 #define   ACDMA_AUDI            0x00000010      /* AUDIDMA pending */
  38 #define ACAUDODAT               0xa0    /* audio out data */
  39 #define ACAUDIDAT               0xb0    /* audio in data */
  40 #define ACREVID                 0xfc    /* revision ID */
  41 
  42 struct txx9aclc_dmadata {
  43         struct resource *dma_res;
  44         struct txx9dmac_slave dma_slave;
  45         struct dma_chan *dma_chan;
  46         struct tasklet_struct tasklet;
  47         spinlock_t dma_lock;
  48         int stream; /* SNDRV_PCM_STREAM_PLAYBACK or SNDRV_PCM_STREAM_CAPTURE */
  49         struct snd_pcm_substream *substream;
  50         unsigned long pos;
  51         dma_addr_t dma_addr;
  52         unsigned long buffer_bytes;
  53         unsigned long period_bytes;
  54         unsigned long frag_bytes;
  55         int frags;
  56         int frag_count;
  57         int dmacount;
  58 };
  59 
  60 struct txx9aclc_plat_drvdata {
  61         void __iomem *base;
  62         u64 physbase;
  63 };
  64 
  65 static inline struct txx9aclc_plat_drvdata *txx9aclc_get_plat_drvdata(
  66         struct snd_soc_dai *dai)
  67 {
  68         return dev_get_drvdata(dai->dev);
  69 }
  70 
  71 #endif /* __TXX9ACLC_H */