root/arch/unicore32/kernel/hibernate_asm.S

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * linux/arch/unicore32/kernel/hibernate_asm.S
   4  *
   5  * Code specific to PKUnity SoC and UniCore ISA
   6  *
   7  *      Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
   8  *      Copyright (C) 2001-2010 Guan Xuetao
   9  */
  10 
  11 #include <linux/sys.h>
  12 #include <linux/errno.h>
  13 #include <linux/linkage.h>
  14 #include <generated/asm-offsets.h>
  15 #include <asm/page.h>
  16 #include <asm/pgtable.h>
  17 #include <asm/assembler.h>
  18 
  19 @ restore_image(pgd_t *resume_pg_dir, struct pbe *restore_pblist)
  20 @ r0: resume_pg_dir
  21 @ r1: restore_pblist
  22 @ copy restore_pblist pages
  23 @ restore registers from swsusp_arch_regs_cpu0
  24 @
  25 ENTRY(restore_image)
  26         sub     r0, r0, #PAGE_OFFSET
  27         mov     r5, #0
  28         movc    p0.c6, r5, #6   @invalidate ITLB & DTLB
  29         movc    p0.c2, r0, #0
  30         nop
  31         nop
  32         nop
  33         nop
  34         nop
  35         nop
  36         nop
  37 
  38         .p2align 4,,7
  39 101:
  40         csub.a  r1, #0
  41         beq     109f
  42 
  43         ldw     r6, [r1+], #PBE_ADDRESS
  44         ldw     r7, [r1+], #PBE_ORIN_ADDRESS
  45 
  46         movl    ip, #128
  47 102:    ldm.w   (r8 - r15), [r6]+
  48         stm.w   (r8 - r15), [r7]+
  49         sub.a   ip, ip, #1
  50         bne     102b
  51 
  52         ldw     r1, [r1+], #PBE_NEXT
  53         b       101b
  54 
  55         .p2align 4,,7
  56 109:
  57         /* go back to the original page tables */
  58         ldw     r0, =swapper_pg_dir
  59         sub     r0, r0, #PAGE_OFFSET
  60         mov     r5, #0
  61         movc    p0.c6, r5, #6
  62         movc    p0.c2, r0, #0
  63         nop
  64         nop
  65         nop
  66         nop
  67         nop
  68         nop
  69         nop
  70 
  71 #ifdef  CONFIG_UNICORE_FPU_F64
  72         ldw     ip, 1f
  73         add     ip, ip, #SWSUSP_FPSTATE
  74         lfm.w   (f0  - f7 ), [ip]+
  75         lfm.w   (f8  - f15), [ip]+
  76         lfm.w   (f16 - f23), [ip]+
  77         lfm.w   (f24 - f31), [ip]+
  78         ldw     r4, [ip]
  79         ctf     r4, s31
  80 #endif
  81         mov     r0, #0x0
  82         ldw     ip, 1f
  83         add     ip, ip, #SWSUSP_CPU
  84         ldm.w   (r4 - r15), [ip]+
  85         ldm     (r16 - r27, sp, pc), [ip]+      @ Load all regs saved previously
  86 
  87         .align  2
  88 1:      .long   swsusp_arch_regs_cpu0
  89 
  90 
  91 @ swsusp_arch_suspend()
  92 @ - prepare pc for resume, return from function without swsusp_save on resume
  93 @ - save registers in swsusp_arch_regs_cpu0
  94 @ - call swsusp_save write suspend image
  95 
  96 ENTRY(swsusp_arch_suspend)
  97         ldw     ip, 1f
  98         add     ip, ip, #SWSUSP_CPU
  99         stm.w   (r4 - r15), [ip]+
 100         stm.w   (r16 - r27, sp, lr), [ip]+
 101 
 102 #ifdef  CONFIG_UNICORE_FPU_F64
 103         ldw     ip, 1f
 104         add     ip, ip, #SWSUSP_FPSTATE
 105         sfm.w   (f0  - f7 ), [ip]+
 106         sfm.w   (f8  - f15), [ip]+
 107         sfm.w   (f16 - f23), [ip]+
 108         sfm.w   (f24 - f31), [ip]+
 109         cff     r4, s31
 110         stw     r4, [ip]
 111 #endif
 112         b       swsusp_save                     @ no return
 113 
 114 1:      .long   swsusp_arch_regs_cpu0