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10 #ifndef _WM8904_H
11 #define _WM8904_H
12
13 #define WM8904_CLK_MCLK 1
14 #define WM8904_CLK_FLL 2
15
16 #define WM8904_FLL_MCLK 1
17 #define WM8904_FLL_BCLK 2
18 #define WM8904_FLL_LRCLK 3
19 #define WM8904_FLL_FREE_RUNNING 4
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21
22
23
24 #define WM8904_SW_RESET_AND_ID 0x00
25 #define WM8904_REVISION 0x01
26 #define WM8904_BIAS_CONTROL_0 0x04
27 #define WM8904_VMID_CONTROL_0 0x05
28 #define WM8904_MIC_BIAS_CONTROL_0 0x06
29 #define WM8904_MIC_BIAS_CONTROL_1 0x07
30 #define WM8904_ANALOGUE_DAC_0 0x08
31 #define WM8904_MIC_FILTER_CONTROL 0x09
32 #define WM8904_ANALOGUE_ADC_0 0x0A
33 #define WM8904_POWER_MANAGEMENT_0 0x0C
34 #define WM8904_POWER_MANAGEMENT_2 0x0E
35 #define WM8904_POWER_MANAGEMENT_3 0x0F
36 #define WM8904_POWER_MANAGEMENT_6 0x12
37 #define WM8904_CLOCK_RATES_0 0x14
38 #define WM8904_CLOCK_RATES_1 0x15
39 #define WM8904_CLOCK_RATES_2 0x16
40 #define WM8904_AUDIO_INTERFACE_0 0x18
41 #define WM8904_AUDIO_INTERFACE_1 0x19
42 #define WM8904_AUDIO_INTERFACE_2 0x1A
43 #define WM8904_AUDIO_INTERFACE_3 0x1B
44 #define WM8904_DAC_DIGITAL_VOLUME_LEFT 0x1E
45 #define WM8904_DAC_DIGITAL_VOLUME_RIGHT 0x1F
46 #define WM8904_DAC_DIGITAL_0 0x20
47 #define WM8904_DAC_DIGITAL_1 0x21
48 #define WM8904_ADC_DIGITAL_VOLUME_LEFT 0x24
49 #define WM8904_ADC_DIGITAL_VOLUME_RIGHT 0x25
50 #define WM8904_ADC_DIGITAL_0 0x26
51 #define WM8904_DIGITAL_MICROPHONE_0 0x27
52 #define WM8904_DRC_0 0x28
53 #define WM8904_DRC_1 0x29
54 #define WM8904_DRC_2 0x2A
55 #define WM8904_DRC_3 0x2B
56 #define WM8904_ANALOGUE_LEFT_INPUT_0 0x2C
57 #define WM8904_ANALOGUE_RIGHT_INPUT_0 0x2D
58 #define WM8904_ANALOGUE_LEFT_INPUT_1 0x2E
59 #define WM8904_ANALOGUE_RIGHT_INPUT_1 0x2F
60 #define WM8904_ANALOGUE_OUT1_LEFT 0x39
61 #define WM8904_ANALOGUE_OUT1_RIGHT 0x3A
62 #define WM8904_ANALOGUE_OUT2_LEFT 0x3B
63 #define WM8904_ANALOGUE_OUT2_RIGHT 0x3C
64 #define WM8904_ANALOGUE_OUT12_ZC 0x3D
65 #define WM8904_DC_SERVO_0 0x43
66 #define WM8904_DC_SERVO_1 0x44
67 #define WM8904_DC_SERVO_2 0x45
68 #define WM8904_DC_SERVO_4 0x47
69 #define WM8904_DC_SERVO_5 0x48
70 #define WM8904_DC_SERVO_6 0x49
71 #define WM8904_DC_SERVO_7 0x4A
72 #define WM8904_DC_SERVO_8 0x4B
73 #define WM8904_DC_SERVO_9 0x4C
74 #define WM8904_DC_SERVO_READBACK_0 0x4D
75 #define WM8904_ANALOGUE_HP_0 0x5A
76 #define WM8904_ANALOGUE_LINEOUT_0 0x5E
77 #define WM8904_CHARGE_PUMP_0 0x62
78 #define WM8904_CLASS_W_0 0x68
79 #define WM8904_WRITE_SEQUENCER_0 0x6C
80 #define WM8904_WRITE_SEQUENCER_1 0x6D
81 #define WM8904_WRITE_SEQUENCER_2 0x6E
82 #define WM8904_WRITE_SEQUENCER_3 0x6F
83 #define WM8904_WRITE_SEQUENCER_4 0x70
84 #define WM8904_FLL_CONTROL_1 0x74
85 #define WM8904_FLL_CONTROL_2 0x75
86 #define WM8904_FLL_CONTROL_3 0x76
87 #define WM8904_FLL_CONTROL_4 0x77
88 #define WM8904_FLL_CONTROL_5 0x78
89 #define WM8904_GPIO_CONTROL_1 0x79
90 #define WM8904_GPIO_CONTROL_2 0x7A
91 #define WM8904_GPIO_CONTROL_3 0x7B
92 #define WM8904_GPIO_CONTROL_4 0x7C
93 #define WM8904_DIGITAL_PULLS 0x7E
94 #define WM8904_INTERRUPT_STATUS 0x7F
95 #define WM8904_INTERRUPT_STATUS_MASK 0x80
96 #define WM8904_INTERRUPT_POLARITY 0x81
97 #define WM8904_INTERRUPT_DEBOUNCE 0x82
98 #define WM8904_EQ1 0x86
99 #define WM8904_EQ2 0x87
100 #define WM8904_EQ3 0x88
101 #define WM8904_EQ4 0x89
102 #define WM8904_EQ5 0x8A
103 #define WM8904_EQ6 0x8B
104 #define WM8904_EQ7 0x8C
105 #define WM8904_EQ8 0x8D
106 #define WM8904_EQ9 0x8E
107 #define WM8904_EQ10 0x8F
108 #define WM8904_EQ11 0x90
109 #define WM8904_EQ12 0x91
110 #define WM8904_EQ13 0x92
111 #define WM8904_EQ14 0x93
112 #define WM8904_EQ15 0x94
113 #define WM8904_EQ16 0x95
114 #define WM8904_EQ17 0x96
115 #define WM8904_EQ18 0x97
116 #define WM8904_EQ19 0x98
117 #define WM8904_EQ20 0x99
118 #define WM8904_EQ21 0x9A
119 #define WM8904_EQ22 0x9B
120 #define WM8904_EQ23 0x9C
121 #define WM8904_EQ24 0x9D
122 #define WM8904_CONTROL_INTERFACE_TEST_1 0xA1
123 #define WM8904_ADC_TEST_0 0xC6
124 #define WM8904_ANALOGUE_OUTPUT_BIAS_0 0xCC
125 #define WM8904_FLL_NCO_TEST_0 0xF7
126 #define WM8904_FLL_NCO_TEST_1 0xF8
127
128 #define WM8904_REGISTER_COUNT 101
129 #define WM8904_MAX_REGISTER 0xF8
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137
138 #define WM8904_SW_RST_DEV_ID1_MASK 0xFFFF
139 #define WM8904_SW_RST_DEV_ID1_SHIFT 0
140 #define WM8904_SW_RST_DEV_ID1_WIDTH 16
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142
143
144
145 #define WM8904_REVISION_MASK 0x000F
146 #define WM8904_REVISION_SHIFT 0
147 #define WM8904_REVISION_WIDTH 16
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149
150
151
152 #define WM8904_POBCTRL 0x0010
153 #define WM8904_POBCTRL_MASK 0x0010
154 #define WM8904_POBCTRL_SHIFT 4
155 #define WM8904_POBCTRL_WIDTH 1
156 #define WM8904_ISEL_MASK 0x000C
157 #define WM8904_ISEL_SHIFT 2
158 #define WM8904_ISEL_WIDTH 2
159 #define WM8904_STARTUP_BIAS_ENA 0x0002
160 #define WM8904_STARTUP_BIAS_ENA_MASK 0x0002
161 #define WM8904_STARTUP_BIAS_ENA_SHIFT 1
162 #define WM8904_STARTUP_BIAS_ENA_WIDTH 1
163 #define WM8904_BIAS_ENA 0x0001
164 #define WM8904_BIAS_ENA_MASK 0x0001
165 #define WM8904_BIAS_ENA_SHIFT 0
166 #define WM8904_BIAS_ENA_WIDTH 1
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170
171 #define WM8904_VMID_BUF_ENA 0x0040
172 #define WM8904_VMID_BUF_ENA_MASK 0x0040
173 #define WM8904_VMID_BUF_ENA_SHIFT 6
174 #define WM8904_VMID_BUF_ENA_WIDTH 1
175 #define WM8904_VMID_RES_MASK 0x0006
176 #define WM8904_VMID_RES_SHIFT 1
177 #define WM8904_VMID_RES_WIDTH 2
178 #define WM8904_VMID_ENA 0x0001
179 #define WM8904_VMID_ENA_MASK 0x0001
180 #define WM8904_VMID_ENA_SHIFT 0
181 #define WM8904_VMID_ENA_WIDTH 1
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185
186 #define WM8904_DAC_BIAS_SEL_MASK 0x0018
187 #define WM8904_DAC_BIAS_SEL_SHIFT 3
188 #define WM8904_DAC_BIAS_SEL_WIDTH 2
189 #define WM8904_DAC_VMID_BIAS_SEL_MASK 0x0006
190 #define WM8904_DAC_VMID_BIAS_SEL_SHIFT 1
191 #define WM8904_DAC_VMID_BIAS_SEL_WIDTH 2
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195
196 #define WM8904_MIC_DET_SET_THRESHOLD_MASK 0xF000
197 #define WM8904_MIC_DET_SET_THRESHOLD_SHIFT 12
198 #define WM8904_MIC_DET_SET_THRESHOLD_WIDTH 4
199 #define WM8904_MIC_DET_RESET_THRESHOLD_MASK 0x0F00
200 #define WM8904_MIC_DET_RESET_THRESHOLD_SHIFT 8
201 #define WM8904_MIC_DET_RESET_THRESHOLD_WIDTH 4
202 #define WM8904_MIC_SHORT_SET_THRESHOLD_MASK 0x00F0
203 #define WM8904_MIC_SHORT_SET_THRESHOLD_SHIFT 4
204 #define WM8904_MIC_SHORT_SET_THRESHOLD_WIDTH 4
205 #define WM8904_MIC_SHORT_RESET_THRESHOLD_MASK 0x000F
206 #define WM8904_MIC_SHORT_RESET_THRESHOLD_SHIFT 0
207 #define WM8904_MIC_SHORT_RESET_THRESHOLD_WIDTH 4
208
209
210
211
212 #define WM8904_ADC_OSR128 0x0001
213 #define WM8904_ADC_OSR128_MASK 0x0001
214 #define WM8904_ADC_OSR128_SHIFT 0
215 #define WM8904_ADC_OSR128_WIDTH 1
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220 #define WM8904_INL_ENA 0x0002
221 #define WM8904_INL_ENA_MASK 0x0002
222 #define WM8904_INL_ENA_SHIFT 1
223 #define WM8904_INL_ENA_WIDTH 1
224 #define WM8904_INR_ENA 0x0001
225 #define WM8904_INR_ENA_MASK 0x0001
226 #define WM8904_INR_ENA_SHIFT 0
227 #define WM8904_INR_ENA_WIDTH 1
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230
231
232 #define WM8904_HPL_PGA_ENA 0x0002
233 #define WM8904_HPL_PGA_ENA_MASK 0x0002
234 #define WM8904_HPL_PGA_ENA_SHIFT 1
235 #define WM8904_HPL_PGA_ENA_WIDTH 1
236 #define WM8904_HPR_PGA_ENA 0x0001
237 #define WM8904_HPR_PGA_ENA_MASK 0x0001
238 #define WM8904_HPR_PGA_ENA_SHIFT 0
239 #define WM8904_HPR_PGA_ENA_WIDTH 1
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243
244 #define WM8904_LINEOUTL_PGA_ENA 0x0002
245 #define WM8904_LINEOUTL_PGA_ENA_MASK 0x0002
246 #define WM8904_LINEOUTL_PGA_ENA_SHIFT 1
247 #define WM8904_LINEOUTL_PGA_ENA_WIDTH 1
248 #define WM8904_LINEOUTR_PGA_ENA 0x0001
249 #define WM8904_LINEOUTR_PGA_ENA_MASK 0x0001
250 #define WM8904_LINEOUTR_PGA_ENA_SHIFT 0
251 #define WM8904_LINEOUTR_PGA_ENA_WIDTH 1
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255
256 #define WM8904_DACL_ENA 0x0008
257 #define WM8904_DACL_ENA_MASK 0x0008
258 #define WM8904_DACL_ENA_SHIFT 3
259 #define WM8904_DACL_ENA_WIDTH 1
260 #define WM8904_DACR_ENA 0x0004
261 #define WM8904_DACR_ENA_MASK 0x0004
262 #define WM8904_DACR_ENA_SHIFT 2
263 #define WM8904_DACR_ENA_WIDTH 1
264 #define WM8904_ADCL_ENA 0x0002
265 #define WM8904_ADCL_ENA_MASK 0x0002
266 #define WM8904_ADCL_ENA_SHIFT 1
267 #define WM8904_ADCL_ENA_WIDTH 1
268 #define WM8904_ADCR_ENA 0x0001
269 #define WM8904_ADCR_ENA_MASK 0x0001
270 #define WM8904_ADCR_ENA_SHIFT 0
271 #define WM8904_ADCR_ENA_WIDTH 1
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273
274
275
276 #define WM8904_TOCLK_RATE_DIV16 0x4000
277 #define WM8904_TOCLK_RATE_DIV16_MASK 0x4000
278 #define WM8904_TOCLK_RATE_DIV16_SHIFT 14
279 #define WM8904_TOCLK_RATE_DIV16_WIDTH 1
280 #define WM8904_TOCLK_RATE_X4 0x2000
281 #define WM8904_TOCLK_RATE_X4_MASK 0x2000
282 #define WM8904_TOCLK_RATE_X4_SHIFT 13
283 #define WM8904_TOCLK_RATE_X4_WIDTH 1
284 #define WM8904_SR_MODE 0x1000
285 #define WM8904_SR_MODE_MASK 0x1000
286 #define WM8904_SR_MODE_SHIFT 12
287 #define WM8904_SR_MODE_WIDTH 1
288 #define WM8904_MCLK_DIV 0x0001
289 #define WM8904_MCLK_DIV_MASK 0x0001
290 #define WM8904_MCLK_DIV_SHIFT 0
291 #define WM8904_MCLK_DIV_WIDTH 1
292
293
294
295
296 #define WM8904_CLK_SYS_RATE_MASK 0x3C00
297 #define WM8904_CLK_SYS_RATE_SHIFT 10
298 #define WM8904_CLK_SYS_RATE_WIDTH 4
299 #define WM8904_SAMPLE_RATE_MASK 0x0007
300 #define WM8904_SAMPLE_RATE_SHIFT 0
301 #define WM8904_SAMPLE_RATE_WIDTH 3
302
303
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305
306 #define WM8904_MCLK_INV 0x8000
307 #define WM8904_MCLK_INV_MASK 0x8000
308 #define WM8904_MCLK_INV_SHIFT 15
309 #define WM8904_MCLK_INV_WIDTH 1
310 #define WM8904_SYSCLK_SRC 0x4000
311 #define WM8904_SYSCLK_SRC_MASK 0x4000
312 #define WM8904_SYSCLK_SRC_SHIFT 14
313 #define WM8904_SYSCLK_SRC_WIDTH 1
314 #define WM8904_TOCLK_RATE 0x1000
315 #define WM8904_TOCLK_RATE_MASK 0x1000
316 #define WM8904_TOCLK_RATE_SHIFT 12
317 #define WM8904_TOCLK_RATE_WIDTH 1
318 #define WM8904_OPCLK_ENA 0x0008
319 #define WM8904_OPCLK_ENA_MASK 0x0008
320 #define WM8904_OPCLK_ENA_SHIFT 3
321 #define WM8904_OPCLK_ENA_WIDTH 1
322 #define WM8904_CLK_SYS_ENA 0x0004
323 #define WM8904_CLK_SYS_ENA_MASK 0x0004
324 #define WM8904_CLK_SYS_ENA_SHIFT 2
325 #define WM8904_CLK_SYS_ENA_WIDTH 1
326 #define WM8904_CLK_DSP_ENA 0x0002
327 #define WM8904_CLK_DSP_ENA_MASK 0x0002
328 #define WM8904_CLK_DSP_ENA_SHIFT 1
329 #define WM8904_CLK_DSP_ENA_WIDTH 1
330 #define WM8904_TOCLK_ENA 0x0001
331 #define WM8904_TOCLK_ENA_MASK 0x0001
332 #define WM8904_TOCLK_ENA_SHIFT 0
333 #define WM8904_TOCLK_ENA_WIDTH 1
334
335
336
337
338 #define WM8904_DACL_DATINV 0x1000
339 #define WM8904_DACL_DATINV_MASK 0x1000
340 #define WM8904_DACL_DATINV_SHIFT 12
341 #define WM8904_DACL_DATINV_WIDTH 1
342 #define WM8904_DACR_DATINV 0x0800
343 #define WM8904_DACR_DATINV_MASK 0x0800
344 #define WM8904_DACR_DATINV_SHIFT 11
345 #define WM8904_DACR_DATINV_WIDTH 1
346 #define WM8904_DAC_BOOST_MASK 0x0600
347 #define WM8904_DAC_BOOST_SHIFT 9
348 #define WM8904_DAC_BOOST_WIDTH 2
349 #define WM8904_LOOPBACK 0x0100
350 #define WM8904_LOOPBACK_MASK 0x0100
351 #define WM8904_LOOPBACK_SHIFT 8
352 #define WM8904_LOOPBACK_WIDTH 1
353 #define WM8904_AIFADCL_SRC 0x0080
354 #define WM8904_AIFADCL_SRC_MASK 0x0080
355 #define WM8904_AIFADCL_SRC_SHIFT 7
356 #define WM8904_AIFADCL_SRC_WIDTH 1
357 #define WM8904_AIFADCR_SRC 0x0040
358 #define WM8904_AIFADCR_SRC_MASK 0x0040
359 #define WM8904_AIFADCR_SRC_SHIFT 6
360 #define WM8904_AIFADCR_SRC_WIDTH 1
361 #define WM8904_AIFDACL_SRC 0x0020
362 #define WM8904_AIFDACL_SRC_MASK 0x0020
363 #define WM8904_AIFDACL_SRC_SHIFT 5
364 #define WM8904_AIFDACL_SRC_WIDTH 1
365 #define WM8904_AIFDACR_SRC 0x0010
366 #define WM8904_AIFDACR_SRC_MASK 0x0010
367 #define WM8904_AIFDACR_SRC_SHIFT 4
368 #define WM8904_AIFDACR_SRC_WIDTH 1
369 #define WM8904_ADC_COMP 0x0008
370 #define WM8904_ADC_COMP_MASK 0x0008
371 #define WM8904_ADC_COMP_SHIFT 3
372 #define WM8904_ADC_COMP_WIDTH 1
373 #define WM8904_ADC_COMPMODE 0x0004
374 #define WM8904_ADC_COMPMODE_MASK 0x0004
375 #define WM8904_ADC_COMPMODE_SHIFT 2
376 #define WM8904_ADC_COMPMODE_WIDTH 1
377 #define WM8904_DAC_COMP 0x0002
378 #define WM8904_DAC_COMP_MASK 0x0002
379 #define WM8904_DAC_COMP_SHIFT 1
380 #define WM8904_DAC_COMP_WIDTH 1
381 #define WM8904_DAC_COMPMODE 0x0001
382 #define WM8904_DAC_COMPMODE_MASK 0x0001
383 #define WM8904_DAC_COMPMODE_SHIFT 0
384 #define WM8904_DAC_COMPMODE_WIDTH 1
385
386
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388
389 #define WM8904_AIFDAC_TDM 0x2000
390 #define WM8904_AIFDAC_TDM_MASK 0x2000
391 #define WM8904_AIFDAC_TDM_SHIFT 13
392 #define WM8904_AIFDAC_TDM_WIDTH 1
393 #define WM8904_AIFDAC_TDM_CHAN 0x1000
394 #define WM8904_AIFDAC_TDM_CHAN_MASK 0x1000
395 #define WM8904_AIFDAC_TDM_CHAN_SHIFT 12
396 #define WM8904_AIFDAC_TDM_CHAN_WIDTH 1
397 #define WM8904_AIFADC_TDM 0x0800
398 #define WM8904_AIFADC_TDM_MASK 0x0800
399 #define WM8904_AIFADC_TDM_SHIFT 11
400 #define WM8904_AIFADC_TDM_WIDTH 1
401 #define WM8904_AIFADC_TDM_CHAN 0x0400
402 #define WM8904_AIFADC_TDM_CHAN_MASK 0x0400
403 #define WM8904_AIFADC_TDM_CHAN_SHIFT 10
404 #define WM8904_AIFADC_TDM_CHAN_WIDTH 1
405 #define WM8904_AIF_TRIS 0x0100
406 #define WM8904_AIF_TRIS_MASK 0x0100
407 #define WM8904_AIF_TRIS_SHIFT 8
408 #define WM8904_AIF_TRIS_WIDTH 1
409 #define WM8904_AIF_BCLK_INV 0x0080
410 #define WM8904_AIF_BCLK_INV_MASK 0x0080
411 #define WM8904_AIF_BCLK_INV_SHIFT 7
412 #define WM8904_AIF_BCLK_INV_WIDTH 1
413 #define WM8904_BCLK_DIR 0x0040
414 #define WM8904_BCLK_DIR_MASK 0x0040
415 #define WM8904_BCLK_DIR_SHIFT 6
416 #define WM8904_BCLK_DIR_WIDTH 1
417 #define WM8904_AIF_LRCLK_INV 0x0010
418 #define WM8904_AIF_LRCLK_INV_MASK 0x0010
419 #define WM8904_AIF_LRCLK_INV_SHIFT 4
420 #define WM8904_AIF_LRCLK_INV_WIDTH 1
421 #define WM8904_AIF_WL_MASK 0x000C
422 #define WM8904_AIF_WL_SHIFT 2
423 #define WM8904_AIF_WL_WIDTH 2
424 #define WM8904_AIF_FMT_MASK 0x0003
425 #define WM8904_AIF_FMT_SHIFT 0
426 #define WM8904_AIF_FMT_WIDTH 2
427
428
429
430
431 #define WM8904_OPCLK_DIV_MASK 0x0F00
432 #define WM8904_OPCLK_DIV_SHIFT 8
433 #define WM8904_OPCLK_DIV_WIDTH 4
434 #define WM8904_BCLK_DIV_MASK 0x001F
435 #define WM8904_BCLK_DIV_SHIFT 0
436 #define WM8904_BCLK_DIV_WIDTH 5
437
438
439
440
441 #define WM8904_LRCLK_DIR 0x0800
442 #define WM8904_LRCLK_DIR_MASK 0x0800
443 #define WM8904_LRCLK_DIR_SHIFT 11
444 #define WM8904_LRCLK_DIR_WIDTH 1
445 #define WM8904_LRCLK_RATE_MASK 0x07FF
446 #define WM8904_LRCLK_RATE_SHIFT 0
447 #define WM8904_LRCLK_RATE_WIDTH 11
448
449
450
451
452 #define WM8904_DAC_VU 0x0100
453 #define WM8904_DAC_VU_MASK 0x0100
454 #define WM8904_DAC_VU_SHIFT 8
455 #define WM8904_DAC_VU_WIDTH 1
456 #define WM8904_DACL_VOL_MASK 0x00FF
457 #define WM8904_DACL_VOL_SHIFT 0
458 #define WM8904_DACL_VOL_WIDTH 8
459
460
461
462
463 #define WM8904_DAC_VU 0x0100
464 #define WM8904_DAC_VU_MASK 0x0100
465 #define WM8904_DAC_VU_SHIFT 8
466 #define WM8904_DAC_VU_WIDTH 1
467 #define WM8904_DACR_VOL_MASK 0x00FF
468 #define WM8904_DACR_VOL_SHIFT 0
469 #define WM8904_DACR_VOL_WIDTH 8
470
471
472
473
474 #define WM8904_ADCL_DAC_SVOL_MASK 0x0F00
475 #define WM8904_ADCL_DAC_SVOL_SHIFT 8
476 #define WM8904_ADCL_DAC_SVOL_WIDTH 4
477 #define WM8904_ADCR_DAC_SVOL_MASK 0x00F0
478 #define WM8904_ADCR_DAC_SVOL_SHIFT 4
479 #define WM8904_ADCR_DAC_SVOL_WIDTH 4
480 #define WM8904_ADC_TO_DACL_MASK 0x000C
481 #define WM8904_ADC_TO_DACL_SHIFT 2
482 #define WM8904_ADC_TO_DACL_WIDTH 2
483 #define WM8904_ADC_TO_DACR_MASK 0x0003
484 #define WM8904_ADC_TO_DACR_SHIFT 0
485 #define WM8904_ADC_TO_DACR_WIDTH 2
486
487
488
489
490 #define WM8904_DAC_MONO 0x1000
491 #define WM8904_DAC_MONO_MASK 0x1000
492 #define WM8904_DAC_MONO_SHIFT 12
493 #define WM8904_DAC_MONO_WIDTH 1
494 #define WM8904_DAC_SB_FILT 0x0800
495 #define WM8904_DAC_SB_FILT_MASK 0x0800
496 #define WM8904_DAC_SB_FILT_SHIFT 11
497 #define WM8904_DAC_SB_FILT_WIDTH 1
498 #define WM8904_DAC_MUTERATE 0x0400
499 #define WM8904_DAC_MUTERATE_MASK 0x0400
500 #define WM8904_DAC_MUTERATE_SHIFT 10
501 #define WM8904_DAC_MUTERATE_WIDTH 1
502 #define WM8904_DAC_UNMUTE_RAMP 0x0200
503 #define WM8904_DAC_UNMUTE_RAMP_MASK 0x0200
504 #define WM8904_DAC_UNMUTE_RAMP_SHIFT 9
505 #define WM8904_DAC_UNMUTE_RAMP_WIDTH 1
506 #define WM8904_DAC_OSR128 0x0040
507 #define WM8904_DAC_OSR128_MASK 0x0040
508 #define WM8904_DAC_OSR128_SHIFT 6
509 #define WM8904_DAC_OSR128_WIDTH 1
510 #define WM8904_DAC_MUTE 0x0008
511 #define WM8904_DAC_MUTE_MASK 0x0008
512 #define WM8904_DAC_MUTE_SHIFT 3
513 #define WM8904_DAC_MUTE_WIDTH 1
514 #define WM8904_DEEMPH_MASK 0x0006
515 #define WM8904_DEEMPH_SHIFT 1
516 #define WM8904_DEEMPH_WIDTH 2
517
518
519
520
521 #define WM8904_ADC_VU 0x0100
522 #define WM8904_ADC_VU_MASK 0x0100
523 #define WM8904_ADC_VU_SHIFT 8
524 #define WM8904_ADC_VU_WIDTH 1
525 #define WM8904_ADCL_VOL_MASK 0x00FF
526 #define WM8904_ADCL_VOL_SHIFT 0
527 #define WM8904_ADCL_VOL_WIDTH 8
528
529
530
531
532 #define WM8904_ADC_VU 0x0100
533 #define WM8904_ADC_VU_MASK 0x0100
534 #define WM8904_ADC_VU_SHIFT 8
535 #define WM8904_ADC_VU_WIDTH 1
536 #define WM8904_ADCR_VOL_MASK 0x00FF
537 #define WM8904_ADCR_VOL_SHIFT 0
538 #define WM8904_ADCR_VOL_WIDTH 8
539
540
541
542
543 #define WM8904_ADC_HPF_CUT_MASK 0x0060
544 #define WM8904_ADC_HPF_CUT_SHIFT 5
545 #define WM8904_ADC_HPF_CUT_WIDTH 2
546 #define WM8904_ADC_HPF 0x0010
547 #define WM8904_ADC_HPF_MASK 0x0010
548 #define WM8904_ADC_HPF_SHIFT 4
549 #define WM8904_ADC_HPF_WIDTH 1
550 #define WM8904_ADCL_DATINV 0x0002
551 #define WM8904_ADCL_DATINV_MASK 0x0002
552 #define WM8904_ADCL_DATINV_SHIFT 1
553 #define WM8904_ADCL_DATINV_WIDTH 1
554 #define WM8904_ADCR_DATINV 0x0001
555 #define WM8904_ADCR_DATINV_MASK 0x0001
556 #define WM8904_ADCR_DATINV_SHIFT 0
557 #define WM8904_ADCR_DATINV_WIDTH 1
558
559
560
561
562 #define WM8904_DMIC_ENA 0x1000
563 #define WM8904_DMIC_ENA_MASK 0x1000
564 #define WM8904_DMIC_ENA_SHIFT 12
565 #define WM8904_DMIC_ENA_WIDTH 1
566 #define WM8904_DMIC_SRC 0x0800
567 #define WM8904_DMIC_SRC_MASK 0x0800
568 #define WM8904_DMIC_SRC_SHIFT 11
569 #define WM8904_DMIC_SRC_WIDTH 1
570
571
572
573
574 #define WM8904_DRC_ENA 0x8000
575 #define WM8904_DRC_ENA_MASK 0x8000
576 #define WM8904_DRC_ENA_SHIFT 15
577 #define WM8904_DRC_ENA_WIDTH 1
578 #define WM8904_DRC_DAC_PATH 0x4000
579 #define WM8904_DRC_DAC_PATH_MASK 0x4000
580 #define WM8904_DRC_DAC_PATH_SHIFT 14
581 #define WM8904_DRC_DAC_PATH_WIDTH 1
582 #define WM8904_DRC_GS_HYST_LVL_MASK 0x1800
583 #define WM8904_DRC_GS_HYST_LVL_SHIFT 11
584 #define WM8904_DRC_GS_HYST_LVL_WIDTH 2
585 #define WM8904_DRC_STARTUP_GAIN_MASK 0x07C0
586 #define WM8904_DRC_STARTUP_GAIN_SHIFT 6
587 #define WM8904_DRC_STARTUP_GAIN_WIDTH 5
588 #define WM8904_DRC_FF_DELAY 0x0020
589 #define WM8904_DRC_FF_DELAY_MASK 0x0020
590 #define WM8904_DRC_FF_DELAY_SHIFT 5
591 #define WM8904_DRC_FF_DELAY_WIDTH 1
592 #define WM8904_DRC_GS_ENA 0x0008
593 #define WM8904_DRC_GS_ENA_MASK 0x0008
594 #define WM8904_DRC_GS_ENA_SHIFT 3
595 #define WM8904_DRC_GS_ENA_WIDTH 1
596 #define WM8904_DRC_QR 0x0004
597 #define WM8904_DRC_QR_MASK 0x0004
598 #define WM8904_DRC_QR_SHIFT 2
599 #define WM8904_DRC_QR_WIDTH 1
600 #define WM8904_DRC_ANTICLIP 0x0002
601 #define WM8904_DRC_ANTICLIP_MASK 0x0002
602 #define WM8904_DRC_ANTICLIP_SHIFT 1
603 #define WM8904_DRC_ANTICLIP_WIDTH 1
604 #define WM8904_DRC_GS_HYST 0x0001
605 #define WM8904_DRC_GS_HYST_MASK 0x0001
606 #define WM8904_DRC_GS_HYST_SHIFT 0
607 #define WM8904_DRC_GS_HYST_WIDTH 1
608
609
610
611
612 #define WM8904_DRC_ATK_MASK 0xF000
613 #define WM8904_DRC_ATK_SHIFT 12
614 #define WM8904_DRC_ATK_WIDTH 4
615 #define WM8904_DRC_DCY_MASK 0x0F00
616 #define WM8904_DRC_DCY_SHIFT 8
617 #define WM8904_DRC_DCY_WIDTH 4
618 #define WM8904_DRC_QR_THR_MASK 0x00C0
619 #define WM8904_DRC_QR_THR_SHIFT 6
620 #define WM8904_DRC_QR_THR_WIDTH 2
621 #define WM8904_DRC_QR_DCY_MASK 0x0030
622 #define WM8904_DRC_QR_DCY_SHIFT 4
623 #define WM8904_DRC_QR_DCY_WIDTH 2
624 #define WM8904_DRC_MINGAIN_MASK 0x000C
625 #define WM8904_DRC_MINGAIN_SHIFT 2
626 #define WM8904_DRC_MINGAIN_WIDTH 2
627 #define WM8904_DRC_MAXGAIN_MASK 0x0003
628 #define WM8904_DRC_MAXGAIN_SHIFT 0
629 #define WM8904_DRC_MAXGAIN_WIDTH 2
630
631
632
633
634 #define WM8904_DRC_HI_COMP_MASK 0x0038
635 #define WM8904_DRC_HI_COMP_SHIFT 3
636 #define WM8904_DRC_HI_COMP_WIDTH 3
637 #define WM8904_DRC_LO_COMP_MASK 0x0007
638 #define WM8904_DRC_LO_COMP_SHIFT 0
639 #define WM8904_DRC_LO_COMP_WIDTH 3
640
641
642
643
644 #define WM8904_DRC_KNEE_IP_MASK 0x07E0
645 #define WM8904_DRC_KNEE_IP_SHIFT 5
646 #define WM8904_DRC_KNEE_IP_WIDTH 6
647 #define WM8904_DRC_KNEE_OP_MASK 0x001F
648 #define WM8904_DRC_KNEE_OP_SHIFT 0
649 #define WM8904_DRC_KNEE_OP_WIDTH 5
650
651
652
653
654 #define WM8904_LINMUTE 0x0080
655 #define WM8904_LINMUTE_MASK 0x0080
656 #define WM8904_LINMUTE_SHIFT 7
657 #define WM8904_LINMUTE_WIDTH 1
658 #define WM8904_LIN_VOL_MASK 0x001F
659 #define WM8904_LIN_VOL_SHIFT 0
660 #define WM8904_LIN_VOL_WIDTH 5
661
662
663
664
665 #define WM8904_RINMUTE 0x0080
666 #define WM8904_RINMUTE_MASK 0x0080
667 #define WM8904_RINMUTE_SHIFT 7
668 #define WM8904_RINMUTE_WIDTH 1
669 #define WM8904_RIN_VOL_MASK 0x001F
670 #define WM8904_RIN_VOL_SHIFT 0
671 #define WM8904_RIN_VOL_WIDTH 5
672
673
674
675
676 #define WM8904_INL_CM_ENA 0x0040
677 #define WM8904_INL_CM_ENA_MASK 0x0040
678 #define WM8904_INL_CM_ENA_SHIFT 6
679 #define WM8904_INL_CM_ENA_WIDTH 1
680 #define WM8904_L_IP_SEL_N_MASK 0x0030
681 #define WM8904_L_IP_SEL_N_SHIFT 4
682 #define WM8904_L_IP_SEL_N_WIDTH 2
683 #define WM8904_L_IP_SEL_P_MASK 0x000C
684 #define WM8904_L_IP_SEL_P_SHIFT 2
685 #define WM8904_L_IP_SEL_P_WIDTH 2
686 #define WM8904_L_MODE_MASK 0x0003
687 #define WM8904_L_MODE_SHIFT 0
688 #define WM8904_L_MODE_WIDTH 2
689
690
691
692
693 #define WM8904_INR_CM_ENA 0x0040
694 #define WM8904_INR_CM_ENA_MASK 0x0040
695 #define WM8904_INR_CM_ENA_SHIFT 6
696 #define WM8904_INR_CM_ENA_WIDTH 1
697 #define WM8904_R_IP_SEL_N_MASK 0x0030
698 #define WM8904_R_IP_SEL_N_SHIFT 4
699 #define WM8904_R_IP_SEL_N_WIDTH 2
700 #define WM8904_R_IP_SEL_P_MASK 0x000C
701 #define WM8904_R_IP_SEL_P_SHIFT 2
702 #define WM8904_R_IP_SEL_P_WIDTH 2
703 #define WM8904_R_MODE_MASK 0x0003
704 #define WM8904_R_MODE_SHIFT 0
705 #define WM8904_R_MODE_WIDTH 2
706
707
708
709
710 #define WM8904_HPOUTL_MUTE 0x0100
711 #define WM8904_HPOUTL_MUTE_MASK 0x0100
712 #define WM8904_HPOUTL_MUTE_SHIFT 8
713 #define WM8904_HPOUTL_MUTE_WIDTH 1
714 #define WM8904_HPOUT_VU 0x0080
715 #define WM8904_HPOUT_VU_MASK 0x0080
716 #define WM8904_HPOUT_VU_SHIFT 7
717 #define WM8904_HPOUT_VU_WIDTH 1
718 #define WM8904_HPOUTLZC 0x0040
719 #define WM8904_HPOUTLZC_MASK 0x0040
720 #define WM8904_HPOUTLZC_SHIFT 6
721 #define WM8904_HPOUTLZC_WIDTH 1
722 #define WM8904_HPOUTL_VOL_MASK 0x003F
723 #define WM8904_HPOUTL_VOL_SHIFT 0
724 #define WM8904_HPOUTL_VOL_WIDTH 6
725
726
727
728
729 #define WM8904_HPOUTR_MUTE 0x0100
730 #define WM8904_HPOUTR_MUTE_MASK 0x0100
731 #define WM8904_HPOUTR_MUTE_SHIFT 8
732 #define WM8904_HPOUTR_MUTE_WIDTH 1
733 #define WM8904_HPOUT_VU 0x0080
734 #define WM8904_HPOUT_VU_MASK 0x0080
735 #define WM8904_HPOUT_VU_SHIFT 7
736 #define WM8904_HPOUT_VU_WIDTH 1
737 #define WM8904_HPOUTRZC 0x0040
738 #define WM8904_HPOUTRZC_MASK 0x0040
739 #define WM8904_HPOUTRZC_SHIFT 6
740 #define WM8904_HPOUTRZC_WIDTH 1
741 #define WM8904_HPOUTR_VOL_MASK 0x003F
742 #define WM8904_HPOUTR_VOL_SHIFT 0
743 #define WM8904_HPOUTR_VOL_WIDTH 6
744
745
746
747
748 #define WM8904_LINEOUTL_MUTE 0x0100
749 #define WM8904_LINEOUTL_MUTE_MASK 0x0100
750 #define WM8904_LINEOUTL_MUTE_SHIFT 8
751 #define WM8904_LINEOUTL_MUTE_WIDTH 1
752 #define WM8904_LINEOUT_VU 0x0080
753 #define WM8904_LINEOUT_VU_MASK 0x0080
754 #define WM8904_LINEOUT_VU_SHIFT 7
755 #define WM8904_LINEOUT_VU_WIDTH 1
756 #define WM8904_LINEOUTLZC 0x0040
757 #define WM8904_LINEOUTLZC_MASK 0x0040
758 #define WM8904_LINEOUTLZC_SHIFT 6
759 #define WM8904_LINEOUTLZC_WIDTH 1
760 #define WM8904_LINEOUTL_VOL_MASK 0x003F
761 #define WM8904_LINEOUTL_VOL_SHIFT 0
762 #define WM8904_LINEOUTL_VOL_WIDTH 6
763
764
765
766
767 #define WM8904_LINEOUTR_MUTE 0x0100
768 #define WM8904_LINEOUTR_MUTE_MASK 0x0100
769 #define WM8904_LINEOUTR_MUTE_SHIFT 8
770 #define WM8904_LINEOUTR_MUTE_WIDTH 1
771 #define WM8904_LINEOUT_VU 0x0080
772 #define WM8904_LINEOUT_VU_MASK 0x0080
773 #define WM8904_LINEOUT_VU_SHIFT 7
774 #define WM8904_LINEOUT_VU_WIDTH 1
775 #define WM8904_LINEOUTRZC 0x0040
776 #define WM8904_LINEOUTRZC_MASK 0x0040
777 #define WM8904_LINEOUTRZC_SHIFT 6
778 #define WM8904_LINEOUTRZC_WIDTH 1
779 #define WM8904_LINEOUTR_VOL_MASK 0x003F
780 #define WM8904_LINEOUTR_VOL_SHIFT 0
781 #define WM8904_LINEOUTR_VOL_WIDTH 6
782
783
784
785
786 #define WM8904_HPL_BYP_ENA 0x0008
787 #define WM8904_HPL_BYP_ENA_MASK 0x0008
788 #define WM8904_HPL_BYP_ENA_SHIFT 3
789 #define WM8904_HPL_BYP_ENA_WIDTH 1
790 #define WM8904_HPR_BYP_ENA 0x0004
791 #define WM8904_HPR_BYP_ENA_MASK 0x0004
792 #define WM8904_HPR_BYP_ENA_SHIFT 2
793 #define WM8904_HPR_BYP_ENA_WIDTH 1
794 #define WM8904_LINEOUTL_BYP_ENA 0x0002
795 #define WM8904_LINEOUTL_BYP_ENA_MASK 0x0002
796 #define WM8904_LINEOUTL_BYP_ENA_SHIFT 1
797 #define WM8904_LINEOUTL_BYP_ENA_WIDTH 1
798 #define WM8904_LINEOUTR_BYP_ENA 0x0001
799 #define WM8904_LINEOUTR_BYP_ENA_MASK 0x0001
800 #define WM8904_LINEOUTR_BYP_ENA_SHIFT 0
801 #define WM8904_LINEOUTR_BYP_ENA_WIDTH 1
802
803
804
805
806 #define WM8904_DCS_ENA_CHAN_3 0x0008
807 #define WM8904_DCS_ENA_CHAN_3_MASK 0x0008
808 #define WM8904_DCS_ENA_CHAN_3_SHIFT 3
809 #define WM8904_DCS_ENA_CHAN_3_WIDTH 1
810 #define WM8904_DCS_ENA_CHAN_2 0x0004
811 #define WM8904_DCS_ENA_CHAN_2_MASK 0x0004
812 #define WM8904_DCS_ENA_CHAN_2_SHIFT 2
813 #define WM8904_DCS_ENA_CHAN_2_WIDTH 1
814 #define WM8904_DCS_ENA_CHAN_1 0x0002
815 #define WM8904_DCS_ENA_CHAN_1_MASK 0x0002
816 #define WM8904_DCS_ENA_CHAN_1_SHIFT 1
817 #define WM8904_DCS_ENA_CHAN_1_WIDTH 1
818 #define WM8904_DCS_ENA_CHAN_0 0x0001
819 #define WM8904_DCS_ENA_CHAN_0_MASK 0x0001
820 #define WM8904_DCS_ENA_CHAN_0_SHIFT 0
821 #define WM8904_DCS_ENA_CHAN_0_WIDTH 1
822
823
824
825
826 #define WM8904_DCS_TRIG_SINGLE_3 0x8000
827 #define WM8904_DCS_TRIG_SINGLE_3_MASK 0x8000
828 #define WM8904_DCS_TRIG_SINGLE_3_SHIFT 15
829 #define WM8904_DCS_TRIG_SINGLE_3_WIDTH 1
830 #define WM8904_DCS_TRIG_SINGLE_2 0x4000
831 #define WM8904_DCS_TRIG_SINGLE_2_MASK 0x4000
832 #define WM8904_DCS_TRIG_SINGLE_2_SHIFT 14
833 #define WM8904_DCS_TRIG_SINGLE_2_WIDTH 1
834 #define WM8904_DCS_TRIG_SINGLE_1 0x2000
835 #define WM8904_DCS_TRIG_SINGLE_1_MASK 0x2000
836 #define WM8904_DCS_TRIG_SINGLE_1_SHIFT 13
837 #define WM8904_DCS_TRIG_SINGLE_1_WIDTH 1
838 #define WM8904_DCS_TRIG_SINGLE_0 0x1000
839 #define WM8904_DCS_TRIG_SINGLE_0_MASK 0x1000
840 #define WM8904_DCS_TRIG_SINGLE_0_SHIFT 12
841 #define WM8904_DCS_TRIG_SINGLE_0_WIDTH 1
842 #define WM8904_DCS_TRIG_SERIES_3 0x0800
843 #define WM8904_DCS_TRIG_SERIES_3_MASK 0x0800
844 #define WM8904_DCS_TRIG_SERIES_3_SHIFT 11
845 #define WM8904_DCS_TRIG_SERIES_3_WIDTH 1
846 #define WM8904_DCS_TRIG_SERIES_2 0x0400
847 #define WM8904_DCS_TRIG_SERIES_2_MASK 0x0400
848 #define WM8904_DCS_TRIG_SERIES_2_SHIFT 10
849 #define WM8904_DCS_TRIG_SERIES_2_WIDTH 1
850 #define WM8904_DCS_TRIG_SERIES_1 0x0200
851 #define WM8904_DCS_TRIG_SERIES_1_MASK 0x0200
852 #define WM8904_DCS_TRIG_SERIES_1_SHIFT 9
853 #define WM8904_DCS_TRIG_SERIES_1_WIDTH 1
854 #define WM8904_DCS_TRIG_SERIES_0 0x0100
855 #define WM8904_DCS_TRIG_SERIES_0_MASK 0x0100
856 #define WM8904_DCS_TRIG_SERIES_0_SHIFT 8
857 #define WM8904_DCS_TRIG_SERIES_0_WIDTH 1
858 #define WM8904_DCS_TRIG_STARTUP_3 0x0080
859 #define WM8904_DCS_TRIG_STARTUP_3_MASK 0x0080
860 #define WM8904_DCS_TRIG_STARTUP_3_SHIFT 7
861 #define WM8904_DCS_TRIG_STARTUP_3_WIDTH 1
862 #define WM8904_DCS_TRIG_STARTUP_2 0x0040
863 #define WM8904_DCS_TRIG_STARTUP_2_MASK 0x0040
864 #define WM8904_DCS_TRIG_STARTUP_2_SHIFT 6
865 #define WM8904_DCS_TRIG_STARTUP_2_WIDTH 1
866 #define WM8904_DCS_TRIG_STARTUP_1 0x0020
867 #define WM8904_DCS_TRIG_STARTUP_1_MASK 0x0020
868 #define WM8904_DCS_TRIG_STARTUP_1_SHIFT 5
869 #define WM8904_DCS_TRIG_STARTUP_1_WIDTH 1
870 #define WM8904_DCS_TRIG_STARTUP_0 0x0010
871 #define WM8904_DCS_TRIG_STARTUP_0_MASK 0x0010
872 #define WM8904_DCS_TRIG_STARTUP_0_SHIFT 4
873 #define WM8904_DCS_TRIG_STARTUP_0_WIDTH 1
874 #define WM8904_DCS_TRIG_DAC_WR_3 0x0008
875 #define WM8904_DCS_TRIG_DAC_WR_3_MASK 0x0008
876 #define WM8904_DCS_TRIG_DAC_WR_3_SHIFT 3
877 #define WM8904_DCS_TRIG_DAC_WR_3_WIDTH 1
878 #define WM8904_DCS_TRIG_DAC_WR_2 0x0004
879 #define WM8904_DCS_TRIG_DAC_WR_2_MASK 0x0004
880 #define WM8904_DCS_TRIG_DAC_WR_2_SHIFT 2
881 #define WM8904_DCS_TRIG_DAC_WR_2_WIDTH 1
882 #define WM8904_DCS_TRIG_DAC_WR_1 0x0002
883 #define WM8904_DCS_TRIG_DAC_WR_1_MASK 0x0002
884 #define WM8904_DCS_TRIG_DAC_WR_1_SHIFT 1
885 #define WM8904_DCS_TRIG_DAC_WR_1_WIDTH 1
886 #define WM8904_DCS_TRIG_DAC_WR_0 0x0001
887 #define WM8904_DCS_TRIG_DAC_WR_0_MASK 0x0001
888 #define WM8904_DCS_TRIG_DAC_WR_0_SHIFT 0
889 #define WM8904_DCS_TRIG_DAC_WR_0_WIDTH 1
890
891
892
893
894 #define WM8904_DCS_TIMER_PERIOD_23_MASK 0x0F00
895 #define WM8904_DCS_TIMER_PERIOD_23_SHIFT 8
896 #define WM8904_DCS_TIMER_PERIOD_23_WIDTH 4
897 #define WM8904_DCS_TIMER_PERIOD_01_MASK 0x000F
898 #define WM8904_DCS_TIMER_PERIOD_01_SHIFT 0
899 #define WM8904_DCS_TIMER_PERIOD_01_WIDTH 4
900
901
902
903
904 #define WM8904_DCS_SERIES_NO_23_MASK 0x007F
905 #define WM8904_DCS_SERIES_NO_23_SHIFT 0
906 #define WM8904_DCS_SERIES_NO_23_WIDTH 7
907
908
909
910
911 #define WM8904_DCS_SERIES_NO_01_MASK 0x007F
912 #define WM8904_DCS_SERIES_NO_01_SHIFT 0
913 #define WM8904_DCS_SERIES_NO_01_WIDTH 7
914
915
916
917
918 #define WM8904_DCS_DAC_WR_VAL_3_MASK 0x00FF
919 #define WM8904_DCS_DAC_WR_VAL_3_SHIFT 0
920 #define WM8904_DCS_DAC_WR_VAL_3_WIDTH 8
921
922
923
924
925 #define WM8904_DCS_DAC_WR_VAL_2_MASK 0x00FF
926 #define WM8904_DCS_DAC_WR_VAL_2_SHIFT 0
927 #define WM8904_DCS_DAC_WR_VAL_2_WIDTH 8
928
929
930
931
932 #define WM8904_DCS_DAC_WR_VAL_1_MASK 0x00FF
933 #define WM8904_DCS_DAC_WR_VAL_1_SHIFT 0
934 #define WM8904_DCS_DAC_WR_VAL_1_WIDTH 8
935
936
937
938
939 #define WM8904_DCS_DAC_WR_VAL_0_MASK 0x00FF
940 #define WM8904_DCS_DAC_WR_VAL_0_SHIFT 0
941 #define WM8904_DCS_DAC_WR_VAL_0_WIDTH 8
942
943
944
945
946 #define WM8904_DCS_CAL_COMPLETE_MASK 0x0F00
947 #define WM8904_DCS_CAL_COMPLETE_SHIFT 8
948 #define WM8904_DCS_CAL_COMPLETE_WIDTH 4
949 #define WM8904_DCS_DAC_WR_COMPLETE_MASK 0x00F0
950 #define WM8904_DCS_DAC_WR_COMPLETE_SHIFT 4
951 #define WM8904_DCS_DAC_WR_COMPLETE_WIDTH 4
952 #define WM8904_DCS_STARTUP_COMPLETE_MASK 0x000F
953 #define WM8904_DCS_STARTUP_COMPLETE_SHIFT 0
954 #define WM8904_DCS_STARTUP_COMPLETE_WIDTH 4
955
956
957
958
959 #define WM8904_HPL_RMV_SHORT 0x0080
960 #define WM8904_HPL_RMV_SHORT_MASK 0x0080
961 #define WM8904_HPL_RMV_SHORT_SHIFT 7
962 #define WM8904_HPL_RMV_SHORT_WIDTH 1
963 #define WM8904_HPL_ENA_OUTP 0x0040
964 #define WM8904_HPL_ENA_OUTP_MASK 0x0040
965 #define WM8904_HPL_ENA_OUTP_SHIFT 6
966 #define WM8904_HPL_ENA_OUTP_WIDTH 1
967 #define WM8904_HPL_ENA_DLY 0x0020
968 #define WM8904_HPL_ENA_DLY_MASK 0x0020
969 #define WM8904_HPL_ENA_DLY_SHIFT 5
970 #define WM8904_HPL_ENA_DLY_WIDTH 1
971 #define WM8904_HPL_ENA 0x0010
972 #define WM8904_HPL_ENA_MASK 0x0010
973 #define WM8904_HPL_ENA_SHIFT 4
974 #define WM8904_HPL_ENA_WIDTH 1
975 #define WM8904_HPR_RMV_SHORT 0x0008
976 #define WM8904_HPR_RMV_SHORT_MASK 0x0008
977 #define WM8904_HPR_RMV_SHORT_SHIFT 3
978 #define WM8904_HPR_RMV_SHORT_WIDTH 1
979 #define WM8904_HPR_ENA_OUTP 0x0004
980 #define WM8904_HPR_ENA_OUTP_MASK 0x0004
981 #define WM8904_HPR_ENA_OUTP_SHIFT 2
982 #define WM8904_HPR_ENA_OUTP_WIDTH 1
983 #define WM8904_HPR_ENA_DLY 0x0002
984 #define WM8904_HPR_ENA_DLY_MASK 0x0002
985 #define WM8904_HPR_ENA_DLY_SHIFT 1
986 #define WM8904_HPR_ENA_DLY_WIDTH 1
987 #define WM8904_HPR_ENA 0x0001
988 #define WM8904_HPR_ENA_MASK 0x0001
989 #define WM8904_HPR_ENA_SHIFT 0
990 #define WM8904_HPR_ENA_WIDTH 1
991
992
993
994
995 #define WM8904_LINEOUTL_RMV_SHORT 0x0080
996 #define WM8904_LINEOUTL_RMV_SHORT_MASK 0x0080
997 #define WM8904_LINEOUTL_RMV_SHORT_SHIFT 7
998 #define WM8904_LINEOUTL_RMV_SHORT_WIDTH 1
999 #define WM8904_LINEOUTL_ENA_OUTP 0x0040
1000 #define WM8904_LINEOUTL_ENA_OUTP_MASK 0x0040
1001 #define WM8904_LINEOUTL_ENA_OUTP_SHIFT 6
1002 #define WM8904_LINEOUTL_ENA_OUTP_WIDTH 1
1003 #define WM8904_LINEOUTL_ENA_DLY 0x0020
1004 #define WM8904_LINEOUTL_ENA_DLY_MASK 0x0020
1005 #define WM8904_LINEOUTL_ENA_DLY_SHIFT 5
1006 #define WM8904_LINEOUTL_ENA_DLY_WIDTH 1
1007 #define WM8904_LINEOUTL_ENA 0x0010
1008 #define WM8904_LINEOUTL_ENA_MASK 0x0010
1009 #define WM8904_LINEOUTL_ENA_SHIFT 4
1010 #define WM8904_LINEOUTL_ENA_WIDTH 1
1011 #define WM8904_LINEOUTR_RMV_SHORT 0x0008
1012 #define WM8904_LINEOUTR_RMV_SHORT_MASK 0x0008
1013 #define WM8904_LINEOUTR_RMV_SHORT_SHIFT 3
1014 #define WM8904_LINEOUTR_RMV_SHORT_WIDTH 1
1015 #define WM8904_LINEOUTR_ENA_OUTP 0x0004
1016 #define WM8904_LINEOUTR_ENA_OUTP_MASK 0x0004
1017 #define WM8904_LINEOUTR_ENA_OUTP_SHIFT 2
1018 #define WM8904_LINEOUTR_ENA_OUTP_WIDTH 1
1019 #define WM8904_LINEOUTR_ENA_DLY 0x0002
1020 #define WM8904_LINEOUTR_ENA_DLY_MASK 0x0002
1021 #define WM8904_LINEOUTR_ENA_DLY_SHIFT 1
1022 #define WM8904_LINEOUTR_ENA_DLY_WIDTH 1
1023 #define WM8904_LINEOUTR_ENA 0x0001
1024 #define WM8904_LINEOUTR_ENA_MASK 0x0001
1025 #define WM8904_LINEOUTR_ENA_SHIFT 0
1026 #define WM8904_LINEOUTR_ENA_WIDTH 1
1027
1028
1029
1030
1031 #define WM8904_CP_ENA 0x0001
1032 #define WM8904_CP_ENA_MASK 0x0001
1033 #define WM8904_CP_ENA_SHIFT 0
1034 #define WM8904_CP_ENA_WIDTH 1
1035
1036
1037
1038
1039 #define WM8904_CP_DYN_PWR 0x0001
1040 #define WM8904_CP_DYN_PWR_MASK 0x0001
1041 #define WM8904_CP_DYN_PWR_SHIFT 0
1042 #define WM8904_CP_DYN_PWR_WIDTH 1
1043
1044
1045
1046
1047 #define WM8904_WSEQ_ENA 0x0100
1048 #define WM8904_WSEQ_ENA_MASK 0x0100
1049 #define WM8904_WSEQ_ENA_SHIFT 8
1050 #define WM8904_WSEQ_ENA_WIDTH 1
1051 #define WM8904_WSEQ_WRITE_INDEX_MASK 0x001F
1052 #define WM8904_WSEQ_WRITE_INDEX_SHIFT 0
1053 #define WM8904_WSEQ_WRITE_INDEX_WIDTH 5
1054
1055
1056
1057
1058 #define WM8904_WSEQ_DATA_WIDTH_MASK 0x7000
1059 #define WM8904_WSEQ_DATA_WIDTH_SHIFT 12
1060 #define WM8904_WSEQ_DATA_WIDTH_WIDTH 3
1061 #define WM8904_WSEQ_DATA_START_MASK 0x0F00
1062 #define WM8904_WSEQ_DATA_START_SHIFT 8
1063 #define WM8904_WSEQ_DATA_START_WIDTH 4
1064 #define WM8904_WSEQ_ADDR_MASK 0x00FF
1065 #define WM8904_WSEQ_ADDR_SHIFT 0
1066 #define WM8904_WSEQ_ADDR_WIDTH 8
1067
1068
1069
1070
1071 #define WM8904_WSEQ_EOS 0x4000
1072 #define WM8904_WSEQ_EOS_MASK 0x4000
1073 #define WM8904_WSEQ_EOS_SHIFT 14
1074 #define WM8904_WSEQ_EOS_WIDTH 1
1075 #define WM8904_WSEQ_DELAY_MASK 0x0F00
1076 #define WM8904_WSEQ_DELAY_SHIFT 8
1077 #define WM8904_WSEQ_DELAY_WIDTH 4
1078 #define WM8904_WSEQ_DATA_MASK 0x00FF
1079 #define WM8904_WSEQ_DATA_SHIFT 0
1080 #define WM8904_WSEQ_DATA_WIDTH 8
1081
1082
1083
1084
1085 #define WM8904_WSEQ_ABORT 0x0200
1086 #define WM8904_WSEQ_ABORT_MASK 0x0200
1087 #define WM8904_WSEQ_ABORT_SHIFT 9
1088 #define WM8904_WSEQ_ABORT_WIDTH 1
1089 #define WM8904_WSEQ_START 0x0100
1090 #define WM8904_WSEQ_START_MASK 0x0100
1091 #define WM8904_WSEQ_START_SHIFT 8
1092 #define WM8904_WSEQ_START_WIDTH 1
1093 #define WM8904_WSEQ_START_INDEX_MASK 0x003F
1094 #define WM8904_WSEQ_START_INDEX_SHIFT 0
1095 #define WM8904_WSEQ_START_INDEX_WIDTH 6
1096
1097
1098
1099
1100 #define WM8904_WSEQ_CURRENT_INDEX_MASK 0x03F0
1101 #define WM8904_WSEQ_CURRENT_INDEX_SHIFT 4
1102 #define WM8904_WSEQ_CURRENT_INDEX_WIDTH 6
1103 #define WM8904_WSEQ_BUSY 0x0001
1104 #define WM8904_WSEQ_BUSY_MASK 0x0001
1105 #define WM8904_WSEQ_BUSY_SHIFT 0
1106 #define WM8904_WSEQ_BUSY_WIDTH 1
1107
1108
1109
1110
1111 #define WM8904_FLL_FRACN_ENA 0x0004
1112 #define WM8904_FLL_FRACN_ENA_MASK 0x0004
1113 #define WM8904_FLL_FRACN_ENA_SHIFT 2
1114 #define WM8904_FLL_FRACN_ENA_WIDTH 1
1115 #define WM8904_FLL_OSC_ENA 0x0002
1116 #define WM8904_FLL_OSC_ENA_MASK 0x0002
1117 #define WM8904_FLL_OSC_ENA_SHIFT 1
1118 #define WM8904_FLL_OSC_ENA_WIDTH 1
1119 #define WM8904_FLL_ENA 0x0001
1120 #define WM8904_FLL_ENA_MASK 0x0001
1121 #define WM8904_FLL_ENA_SHIFT 0
1122 #define WM8904_FLL_ENA_WIDTH 1
1123
1124
1125
1126
1127 #define WM8904_FLL_OUTDIV_MASK 0x3F00
1128 #define WM8904_FLL_OUTDIV_SHIFT 8
1129 #define WM8904_FLL_OUTDIV_WIDTH 6
1130 #define WM8904_FLL_CTRL_RATE_MASK 0x0070
1131 #define WM8904_FLL_CTRL_RATE_SHIFT 4
1132 #define WM8904_FLL_CTRL_RATE_WIDTH 3
1133 #define WM8904_FLL_FRATIO_MASK 0x0007
1134 #define WM8904_FLL_FRATIO_SHIFT 0
1135 #define WM8904_FLL_FRATIO_WIDTH 3
1136
1137
1138
1139
1140 #define WM8904_FLL_K_MASK 0xFFFF
1141 #define WM8904_FLL_K_SHIFT 0
1142 #define WM8904_FLL_K_WIDTH 16
1143
1144
1145
1146
1147 #define WM8904_FLL_N_MASK 0x7FE0
1148 #define WM8904_FLL_N_SHIFT 5
1149 #define WM8904_FLL_N_WIDTH 10
1150 #define WM8904_FLL_GAIN_MASK 0x000F
1151 #define WM8904_FLL_GAIN_SHIFT 0
1152 #define WM8904_FLL_GAIN_WIDTH 4
1153
1154
1155
1156
1157 #define WM8904_FLL_CLK_REF_DIV_MASK 0x0018
1158 #define WM8904_FLL_CLK_REF_DIV_SHIFT 3
1159 #define WM8904_FLL_CLK_REF_DIV_WIDTH 2
1160 #define WM8904_FLL_CLK_REF_SRC_MASK 0x0003
1161 #define WM8904_FLL_CLK_REF_SRC_SHIFT 0
1162 #define WM8904_FLL_CLK_REF_SRC_WIDTH 2
1163
1164
1165
1166
1167 #define WM8904_MCLK_PU 0x0080
1168 #define WM8904_MCLK_PU_MASK 0x0080
1169 #define WM8904_MCLK_PU_SHIFT 7
1170 #define WM8904_MCLK_PU_WIDTH 1
1171 #define WM8904_MCLK_PD 0x0040
1172 #define WM8904_MCLK_PD_MASK 0x0040
1173 #define WM8904_MCLK_PD_SHIFT 6
1174 #define WM8904_MCLK_PD_WIDTH 1
1175 #define WM8904_DACDAT_PU 0x0020
1176 #define WM8904_DACDAT_PU_MASK 0x0020
1177 #define WM8904_DACDAT_PU_SHIFT 5
1178 #define WM8904_DACDAT_PU_WIDTH 1
1179 #define WM8904_DACDAT_PD 0x0010
1180 #define WM8904_DACDAT_PD_MASK 0x0010
1181 #define WM8904_DACDAT_PD_SHIFT 4
1182 #define WM8904_DACDAT_PD_WIDTH 1
1183 #define WM8904_LRCLK_PU 0x0008
1184 #define WM8904_LRCLK_PU_MASK 0x0008
1185 #define WM8904_LRCLK_PU_SHIFT 3
1186 #define WM8904_LRCLK_PU_WIDTH 1
1187 #define WM8904_LRCLK_PD 0x0004
1188 #define WM8904_LRCLK_PD_MASK 0x0004
1189 #define WM8904_LRCLK_PD_SHIFT 2
1190 #define WM8904_LRCLK_PD_WIDTH 1
1191 #define WM8904_BCLK_PU 0x0002
1192 #define WM8904_BCLK_PU_MASK 0x0002
1193 #define WM8904_BCLK_PU_SHIFT 1
1194 #define WM8904_BCLK_PU_WIDTH 1
1195 #define WM8904_BCLK_PD 0x0001
1196 #define WM8904_BCLK_PD_MASK 0x0001
1197 #define WM8904_BCLK_PD_SHIFT 0
1198 #define WM8904_BCLK_PD_WIDTH 1
1199
1200
1201
1202
1203 #define WM8904_IRQ 0x0400
1204 #define WM8904_IRQ_MASK 0x0400
1205 #define WM8904_IRQ_SHIFT 10
1206 #define WM8904_IRQ_WIDTH 1
1207 #define WM8904_GPIO_BCLK_EINT 0x0200
1208 #define WM8904_GPIO_BCLK_EINT_MASK 0x0200
1209 #define WM8904_GPIO_BCLK_EINT_SHIFT 9
1210 #define WM8904_GPIO_BCLK_EINT_WIDTH 1
1211 #define WM8904_WSEQ_EINT 0x0100
1212 #define WM8904_WSEQ_EINT_MASK 0x0100
1213 #define WM8904_WSEQ_EINT_SHIFT 8
1214 #define WM8904_WSEQ_EINT_WIDTH 1
1215 #define WM8904_GPIO3_EINT 0x0080
1216 #define WM8904_GPIO3_EINT_MASK 0x0080
1217 #define WM8904_GPIO3_EINT_SHIFT 7
1218 #define WM8904_GPIO3_EINT_WIDTH 1
1219 #define WM8904_GPIO2_EINT 0x0040
1220 #define WM8904_GPIO2_EINT_MASK 0x0040
1221 #define WM8904_GPIO2_EINT_SHIFT 6
1222 #define WM8904_GPIO2_EINT_WIDTH 1
1223 #define WM8904_GPIO1_EINT 0x0020
1224 #define WM8904_GPIO1_EINT_MASK 0x0020
1225 #define WM8904_GPIO1_EINT_SHIFT 5
1226 #define WM8904_GPIO1_EINT_WIDTH 1
1227 #define WM8904_GPI8_EINT 0x0010
1228 #define WM8904_GPI8_EINT_MASK 0x0010
1229 #define WM8904_GPI8_EINT_SHIFT 4
1230 #define WM8904_GPI8_EINT_WIDTH 1
1231 #define WM8904_GPI7_EINT 0x0008
1232 #define WM8904_GPI7_EINT_MASK 0x0008
1233 #define WM8904_GPI7_EINT_SHIFT 3
1234 #define WM8904_GPI7_EINT_WIDTH 1
1235 #define WM8904_FLL_LOCK_EINT 0x0004
1236 #define WM8904_FLL_LOCK_EINT_MASK 0x0004
1237 #define WM8904_FLL_LOCK_EINT_SHIFT 2
1238 #define WM8904_FLL_LOCK_EINT_WIDTH 1
1239 #define WM8904_MIC_SHRT_EINT 0x0002
1240 #define WM8904_MIC_SHRT_EINT_MASK 0x0002
1241 #define WM8904_MIC_SHRT_EINT_SHIFT 1
1242 #define WM8904_MIC_SHRT_EINT_WIDTH 1
1243 #define WM8904_MIC_DET_EINT 0x0001
1244 #define WM8904_MIC_DET_EINT_MASK 0x0001
1245 #define WM8904_MIC_DET_EINT_SHIFT 0
1246 #define WM8904_MIC_DET_EINT_WIDTH 1
1247
1248
1249
1250
1251 #define WM8904_IM_GPIO_BCLK_EINT 0x0200
1252 #define WM8904_IM_GPIO_BCLK_EINT_MASK 0x0200
1253 #define WM8904_IM_GPIO_BCLK_EINT_SHIFT 9
1254 #define WM8904_IM_GPIO_BCLK_EINT_WIDTH 1
1255 #define WM8904_IM_WSEQ_EINT 0x0100
1256 #define WM8904_IM_WSEQ_EINT_MASK 0x0100
1257 #define WM8904_IM_WSEQ_EINT_SHIFT 8
1258 #define WM8904_IM_WSEQ_EINT_WIDTH 1
1259 #define WM8904_IM_GPIO3_EINT 0x0080
1260 #define WM8904_IM_GPIO3_EINT_MASK 0x0080
1261 #define WM8904_IM_GPIO3_EINT_SHIFT 7
1262 #define WM8904_IM_GPIO3_EINT_WIDTH 1
1263 #define WM8904_IM_GPIO2_EINT 0x0040
1264 #define WM8904_IM_GPIO2_EINT_MASK 0x0040
1265 #define WM8904_IM_GPIO2_EINT_SHIFT 6
1266 #define WM8904_IM_GPIO2_EINT_WIDTH 1
1267 #define WM8904_IM_GPIO1_EINT 0x0020
1268 #define WM8904_IM_GPIO1_EINT_MASK 0x0020
1269 #define WM8904_IM_GPIO1_EINT_SHIFT 5
1270 #define WM8904_IM_GPIO1_EINT_WIDTH 1
1271 #define WM8904_IM_GPI8_EINT 0x0010
1272 #define WM8904_IM_GPI8_EINT_MASK 0x0010
1273 #define WM8904_IM_GPI8_EINT_SHIFT 4
1274 #define WM8904_IM_GPI8_EINT_WIDTH 1
1275 #define WM8904_IM_GPI7_EINT 0x0008
1276 #define WM8904_IM_GPI7_EINT_MASK 0x0008
1277 #define WM8904_IM_GPI7_EINT_SHIFT 3
1278 #define WM8904_IM_GPI7_EINT_WIDTH 1
1279 #define WM8904_IM_FLL_LOCK_EINT 0x0004
1280 #define WM8904_IM_FLL_LOCK_EINT_MASK 0x0004
1281 #define WM8904_IM_FLL_LOCK_EINT_SHIFT 2
1282 #define WM8904_IM_FLL_LOCK_EINT_WIDTH 1
1283 #define WM8904_IM_MIC_SHRT_EINT 0x0002
1284 #define WM8904_IM_MIC_SHRT_EINT_MASK 0x0002
1285 #define WM8904_IM_MIC_SHRT_EINT_SHIFT 1
1286 #define WM8904_IM_MIC_SHRT_EINT_WIDTH 1
1287 #define WM8904_IM_MIC_DET_EINT 0x0001
1288 #define WM8904_IM_MIC_DET_EINT_MASK 0x0001
1289 #define WM8904_IM_MIC_DET_EINT_SHIFT 0
1290 #define WM8904_IM_MIC_DET_EINT_WIDTH 1
1291
1292
1293
1294
1295 #define WM8904_GPIO_BCLK_EINT_POL 0x0200
1296 #define WM8904_GPIO_BCLK_EINT_POL_MASK 0x0200
1297 #define WM8904_GPIO_BCLK_EINT_POL_SHIFT 9
1298 #define WM8904_GPIO_BCLK_EINT_POL_WIDTH 1
1299 #define WM8904_WSEQ_EINT_POL 0x0100
1300 #define WM8904_WSEQ_EINT_POL_MASK 0x0100
1301 #define WM8904_WSEQ_EINT_POL_SHIFT 8
1302 #define WM8904_WSEQ_EINT_POL_WIDTH 1
1303 #define WM8904_GPIO3_EINT_POL 0x0080
1304 #define WM8904_GPIO3_EINT_POL_MASK 0x0080
1305 #define WM8904_GPIO3_EINT_POL_SHIFT 7
1306 #define WM8904_GPIO3_EINT_POL_WIDTH 1
1307 #define WM8904_GPIO2_EINT_POL 0x0040
1308 #define WM8904_GPIO2_EINT_POL_MASK 0x0040
1309 #define WM8904_GPIO2_EINT_POL_SHIFT 6
1310 #define WM8904_GPIO2_EINT_POL_WIDTH 1
1311 #define WM8904_GPIO1_EINT_POL 0x0020
1312 #define WM8904_GPIO1_EINT_POL_MASK 0x0020
1313 #define WM8904_GPIO1_EINT_POL_SHIFT 5
1314 #define WM8904_GPIO1_EINT_POL_WIDTH 1
1315 #define WM8904_GPI8_EINT_POL 0x0010
1316 #define WM8904_GPI8_EINT_POL_MASK 0x0010
1317 #define WM8904_GPI8_EINT_POL_SHIFT 4
1318 #define WM8904_GPI8_EINT_POL_WIDTH 1
1319 #define WM8904_GPI7_EINT_POL 0x0008
1320 #define WM8904_GPI7_EINT_POL_MASK 0x0008
1321 #define WM8904_GPI7_EINT_POL_SHIFT 3
1322 #define WM8904_GPI7_EINT_POL_WIDTH 1
1323 #define WM8904_FLL_LOCK_EINT_POL 0x0004
1324 #define WM8904_FLL_LOCK_EINT_POL_MASK 0x0004
1325 #define WM8904_FLL_LOCK_EINT_POL_SHIFT 2
1326 #define WM8904_FLL_LOCK_EINT_POL_WIDTH 1
1327 #define WM8904_MIC_SHRT_EINT_POL 0x0002
1328 #define WM8904_MIC_SHRT_EINT_POL_MASK 0x0002
1329 #define WM8904_MIC_SHRT_EINT_POL_SHIFT 1
1330 #define WM8904_MIC_SHRT_EINT_POL_WIDTH 1
1331 #define WM8904_MIC_DET_EINT_POL 0x0001
1332 #define WM8904_MIC_DET_EINT_POL_MASK 0x0001
1333 #define WM8904_MIC_DET_EINT_POL_SHIFT 0
1334 #define WM8904_MIC_DET_EINT_POL_WIDTH 1
1335
1336
1337
1338
1339 #define WM8904_GPIO_BCLK_EINT_DB 0x0200
1340 #define WM8904_GPIO_BCLK_EINT_DB_MASK 0x0200
1341 #define WM8904_GPIO_BCLK_EINT_DB_SHIFT 9
1342 #define WM8904_GPIO_BCLK_EINT_DB_WIDTH 1
1343 #define WM8904_WSEQ_EINT_DB 0x0100
1344 #define WM8904_WSEQ_EINT_DB_MASK 0x0100
1345 #define WM8904_WSEQ_EINT_DB_SHIFT 8
1346 #define WM8904_WSEQ_EINT_DB_WIDTH 1
1347 #define WM8904_GPIO3_EINT_DB 0x0080
1348 #define WM8904_GPIO3_EINT_DB_MASK 0x0080
1349 #define WM8904_GPIO3_EINT_DB_SHIFT 7
1350 #define WM8904_GPIO3_EINT_DB_WIDTH 1
1351 #define WM8904_GPIO2_EINT_DB 0x0040
1352 #define WM8904_GPIO2_EINT_DB_MASK 0x0040
1353 #define WM8904_GPIO2_EINT_DB_SHIFT 6
1354 #define WM8904_GPIO2_EINT_DB_WIDTH 1
1355 #define WM8904_GPIO1_EINT_DB 0x0020
1356 #define WM8904_GPIO1_EINT_DB_MASK 0x0020
1357 #define WM8904_GPIO1_EINT_DB_SHIFT 5
1358 #define WM8904_GPIO1_EINT_DB_WIDTH 1
1359 #define WM8904_GPI8_EINT_DB 0x0010
1360 #define WM8904_GPI8_EINT_DB_MASK 0x0010
1361 #define WM8904_GPI8_EINT_DB_SHIFT 4
1362 #define WM8904_GPI8_EINT_DB_WIDTH 1
1363 #define WM8904_GPI7_EINT_DB 0x0008
1364 #define WM8904_GPI7_EINT_DB_MASK 0x0008
1365 #define WM8904_GPI7_EINT_DB_SHIFT 3
1366 #define WM8904_GPI7_EINT_DB_WIDTH 1
1367 #define WM8904_FLL_LOCK_EINT_DB 0x0004
1368 #define WM8904_FLL_LOCK_EINT_DB_MASK 0x0004
1369 #define WM8904_FLL_LOCK_EINT_DB_SHIFT 2
1370 #define WM8904_FLL_LOCK_EINT_DB_WIDTH 1
1371 #define WM8904_MIC_SHRT_EINT_DB 0x0002
1372 #define WM8904_MIC_SHRT_EINT_DB_MASK 0x0002
1373 #define WM8904_MIC_SHRT_EINT_DB_SHIFT 1
1374 #define WM8904_MIC_SHRT_EINT_DB_WIDTH 1
1375 #define WM8904_MIC_DET_EINT_DB 0x0001
1376 #define WM8904_MIC_DET_EINT_DB_MASK 0x0001
1377 #define WM8904_MIC_DET_EINT_DB_SHIFT 0
1378 #define WM8904_MIC_DET_EINT_DB_WIDTH 1
1379
1380
1381
1382
1383 #define WM8904_EQ_ENA 0x0001
1384 #define WM8904_EQ_ENA_MASK 0x0001
1385 #define WM8904_EQ_ENA_SHIFT 0
1386 #define WM8904_EQ_ENA_WIDTH 1
1387
1388
1389
1390
1391 #define WM8904_EQ_B1_GAIN_MASK 0x001F
1392 #define WM8904_EQ_B1_GAIN_SHIFT 0
1393 #define WM8904_EQ_B1_GAIN_WIDTH 5
1394
1395
1396
1397
1398 #define WM8904_EQ_B2_GAIN_MASK 0x001F
1399 #define WM8904_EQ_B2_GAIN_SHIFT 0
1400 #define WM8904_EQ_B2_GAIN_WIDTH 5
1401
1402
1403
1404
1405 #define WM8904_EQ_B3_GAIN_MASK 0x001F
1406 #define WM8904_EQ_B3_GAIN_SHIFT 0
1407 #define WM8904_EQ_B3_GAIN_WIDTH 5
1408
1409
1410
1411
1412 #define WM8904_EQ_B4_GAIN_MASK 0x001F
1413 #define WM8904_EQ_B4_GAIN_SHIFT 0
1414 #define WM8904_EQ_B4_GAIN_WIDTH 5
1415
1416
1417
1418
1419 #define WM8904_EQ_B5_GAIN_MASK 0x001F
1420 #define WM8904_EQ_B5_GAIN_SHIFT 0
1421 #define WM8904_EQ_B5_GAIN_WIDTH 5
1422
1423
1424
1425
1426 #define WM8904_EQ_B1_A_MASK 0xFFFF
1427 #define WM8904_EQ_B1_A_SHIFT 0
1428 #define WM8904_EQ_B1_A_WIDTH 16
1429
1430
1431
1432
1433 #define WM8904_EQ_B1_B_MASK 0xFFFF
1434 #define WM8904_EQ_B1_B_SHIFT 0
1435 #define WM8904_EQ_B1_B_WIDTH 16
1436
1437
1438
1439
1440 #define WM8904_EQ_B1_PG_MASK 0xFFFF
1441 #define WM8904_EQ_B1_PG_SHIFT 0
1442 #define WM8904_EQ_B1_PG_WIDTH 16
1443
1444
1445
1446
1447 #define WM8904_EQ_B2_A_MASK 0xFFFF
1448 #define WM8904_EQ_B2_A_SHIFT 0
1449 #define WM8904_EQ_B2_A_WIDTH 16
1450
1451
1452
1453
1454 #define WM8904_EQ_B2_B_MASK 0xFFFF
1455 #define WM8904_EQ_B2_B_SHIFT 0
1456 #define WM8904_EQ_B2_B_WIDTH 16
1457
1458
1459
1460
1461 #define WM8904_EQ_B2_C_MASK 0xFFFF
1462 #define WM8904_EQ_B2_C_SHIFT 0
1463 #define WM8904_EQ_B2_C_WIDTH 16
1464
1465
1466
1467
1468 #define WM8904_EQ_B2_PG_MASK 0xFFFF
1469 #define WM8904_EQ_B2_PG_SHIFT 0
1470 #define WM8904_EQ_B2_PG_WIDTH 16
1471
1472
1473
1474
1475 #define WM8904_EQ_B3_A_MASK 0xFFFF
1476 #define WM8904_EQ_B3_A_SHIFT 0
1477 #define WM8904_EQ_B3_A_WIDTH 16
1478
1479
1480
1481
1482 #define WM8904_EQ_B3_B_MASK 0xFFFF
1483 #define WM8904_EQ_B3_B_SHIFT 0
1484 #define WM8904_EQ_B3_B_WIDTH 16
1485
1486
1487
1488
1489 #define WM8904_EQ_B3_C_MASK 0xFFFF
1490 #define WM8904_EQ_B3_C_SHIFT 0
1491 #define WM8904_EQ_B3_C_WIDTH 16
1492
1493
1494
1495
1496 #define WM8904_EQ_B3_PG_MASK 0xFFFF
1497 #define WM8904_EQ_B3_PG_SHIFT 0
1498 #define WM8904_EQ_B3_PG_WIDTH 16
1499
1500
1501
1502
1503 #define WM8904_EQ_B4_A_MASK 0xFFFF
1504 #define WM8904_EQ_B4_A_SHIFT 0
1505 #define WM8904_EQ_B4_A_WIDTH 16
1506
1507
1508
1509
1510 #define WM8904_EQ_B4_B_MASK 0xFFFF
1511 #define WM8904_EQ_B4_B_SHIFT 0
1512 #define WM8904_EQ_B4_B_WIDTH 16
1513
1514
1515
1516
1517 #define WM8904_EQ_B4_C_MASK 0xFFFF
1518 #define WM8904_EQ_B4_C_SHIFT 0
1519 #define WM8904_EQ_B4_C_WIDTH 16
1520
1521
1522
1523
1524 #define WM8904_EQ_B4_PG_MASK 0xFFFF
1525 #define WM8904_EQ_B4_PG_SHIFT 0
1526 #define WM8904_EQ_B4_PG_WIDTH 16
1527
1528
1529
1530
1531 #define WM8904_EQ_B5_A_MASK 0xFFFF
1532 #define WM8904_EQ_B5_A_SHIFT 0
1533 #define WM8904_EQ_B5_A_WIDTH 16
1534
1535
1536
1537
1538 #define WM8904_EQ_B5_B_MASK 0xFFFF
1539 #define WM8904_EQ_B5_B_SHIFT 0
1540 #define WM8904_EQ_B5_B_WIDTH 16
1541
1542
1543
1544
1545 #define WM8904_EQ_B5_PG_MASK 0xFFFF
1546 #define WM8904_EQ_B5_PG_SHIFT 0
1547 #define WM8904_EQ_B5_PG_WIDTH 16
1548
1549
1550
1551
1552 #define WM8904_USER_KEY 0x0002
1553 #define WM8904_USER_KEY_MASK 0x0002
1554 #define WM8904_USER_KEY_SHIFT 1
1555 #define WM8904_USER_KEY_WIDTH 1
1556
1557
1558
1559
1560 #define WM8904_ADC_128_OSR_TST_MODE 0x0004
1561 #define WM8904_ADC_128_OSR_TST_MODE_SHIFT 2
1562 #define WM8904_ADC_128_OSR_TST_MODE_WIDTH 1
1563 #define WM8904_ADC_BIASX1P5 0x0001
1564 #define WM8904_ADC_BIASX1P5_SHIFT 0
1565 #define WM8904_ADC_BIASX1P5_WIDTH 1
1566
1567
1568
1569
1570 #define WM8904_PGA_BIAS_MASK 0x0070
1571 #define WM8904_PGA_BIAS_SHIFT 4
1572 #define WM8904_PGA_BIAS_WIDTH 3
1573
1574
1575
1576
1577 #define WM8904_FLL_FRC_NCO 0x0001
1578 #define WM8904_FLL_FRC_NCO_MASK 0x0001
1579 #define WM8904_FLL_FRC_NCO_SHIFT 0
1580 #define WM8904_FLL_FRC_NCO_WIDTH 1
1581
1582
1583
1584
1585 #define WM8904_FLL_FRC_NCO_VAL_MASK 0x003F
1586 #define WM8904_FLL_FRC_NCO_VAL_SHIFT 0
1587 #define WM8904_FLL_FRC_NCO_VAL_WIDTH 6
1588
1589 #endif