root/arch/unicore32/kernel/debug-macro.S

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * linux/arch/unicore32/kernel/debug-macro.S
   4  *
   5  * Code specific to PKUnity SoC and UniCore ISA
   6  *
   7  * Copyright (C) 2001-2010 GUAN Xue-tao
   8  *
   9  * Debugging macro include header
  10  */
  11 #include <generated/asm-offsets.h>
  12 #include <mach/hardware.h>
  13 
  14                 .macro  put_word_ocd, rd, rx=r16
  15 1001:           movc            \rx, p1.c0, #0
  16                 cand.a  \rx, #2
  17                 bne     1001b
  18                 movc            p1.c1, \rd, #1
  19                 .endm
  20 
  21 #ifdef CONFIG_DEBUG_OCD
  22                 /* debug using UniCore On-Chip-Debugger */
  23                 .macro  addruart, rx
  24                 .endm
  25 
  26                 .macro  senduart, rd, rx
  27                 put_word_ocd    \rd, \rx
  28                 .endm
  29 
  30                 .macro  busyuart, rd, rx
  31                 .endm
  32 
  33                 .macro  waituart, rd, rx
  34                 .endm
  35 #else
  36 #define UART_CLK_DEFAULT        3686400 * 20
  37         /* Uartclk = MCLK/ 2, The MCLK on my board is 3686400 * 40  */
  38 #define BAUD_RATE_DEFAULT       115200
  39         /* The baud rate of the serial port */
  40 
  41 #define UART_DIVISOR_DEFAULT    (UART_CLK_DEFAULT \
  42                                 / (16 * BAUD_RATE_DEFAULT) - 1)
  43 
  44                 .macro  addruart,rx
  45                 mrc     p0, #0, \rx, c1, c0
  46                 tst     \rx, #1                 @ MMU enabled?
  47                 moveq   \rx, #0xee000000        @ physical base address
  48                 movne   \rx, #0x6e000000        @ virtual address
  49 
  50                 @ We probe for the active serial port here
  51                 @ However, now we assume UART0 is active:       epip4d
  52                 @ We assume r1 and r2 can be clobbered.
  53 
  54                 movl    r2, #UART_DIVISOR_DEFAULT
  55                 mov     r1, #0x80
  56                 str     r1, [\rx, #UART_LCR_OFFSET]
  57                 and     r1, r2, #0xff00
  58                 mov     r1, r1, lsr #8
  59                 str     r1, [\rx, #UART_DLH_OFFSET]
  60                 and     r1, r2, #0xff
  61                 str     r1, [\rx, #UART_DLL_OFFSET]
  62                 mov     r1, #0x7
  63                 str     r1, [\rx, #UART_FCR_OFFSET]
  64                 mov     r1, #0x3
  65                 str     r1, [\rx, #UART_LCR_OFFSET]
  66                 mov     r1, #0x0
  67                 str     r1, [\rx, #UART_IER_OFFSET]
  68                 .endm
  69 
  70                 .macro  senduart,rd,rx
  71                 str     \rd, [\rx, #UART_THR_OFFSET]
  72                 .endm
  73 
  74                 .macro  waituart,rd,rx
  75 1001:           ldr     \rd, [\rx, #UART_LSR_OFFSET]
  76                 tst     \rd, #UART_LSR_THRE
  77                 beq     1001b
  78                 .endm
  79 
  80                 .macro  busyuart,rd,rx
  81 1001:           ldr     \rd, [\rx, #UART_LSR_OFFSET]
  82                 tst     \rd, #UART_LSR_TEMT
  83                 bne     1001b
  84                 .endm
  85 #endif
  86