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10 #ifndef _WM8962_H
11 #define _WM8962_H
12
13 #include <asm/types.h>
14 #include <sound/soc.h>
15
16 #define WM8962_SYSCLK_MCLK 0
17 #define WM8962_SYSCLK_FLL 1
18 #define WM8962_SYSCLK_PLL3 2
19
20 #define WM8962_FLL 1
21
22 #define WM8962_FLL_MCLK 1
23 #define WM8962_FLL_BCLK 2
24 #define WM8962_FLL_OSC 3
25 #define WM8962_FLL_INT 4
26
27
28
29
30 #define WM8962_LEFT_INPUT_VOLUME 0x00
31 #define WM8962_RIGHT_INPUT_VOLUME 0x01
32 #define WM8962_HPOUTL_VOLUME 0x02
33 #define WM8962_HPOUTR_VOLUME 0x03
34 #define WM8962_CLOCKING1 0x04
35 #define WM8962_ADC_DAC_CONTROL_1 0x05
36 #define WM8962_ADC_DAC_CONTROL_2 0x06
37 #define WM8962_AUDIO_INTERFACE_0 0x07
38 #define WM8962_CLOCKING2 0x08
39 #define WM8962_AUDIO_INTERFACE_1 0x09
40 #define WM8962_LEFT_DAC_VOLUME 0x0A
41 #define WM8962_RIGHT_DAC_VOLUME 0x0B
42 #define WM8962_AUDIO_INTERFACE_2 0x0E
43 #define WM8962_SOFTWARE_RESET 0x0F
44 #define WM8962_ALC1 0x11
45 #define WM8962_ALC2 0x12
46 #define WM8962_ALC3 0x13
47 #define WM8962_NOISE_GATE 0x14
48 #define WM8962_LEFT_ADC_VOLUME 0x15
49 #define WM8962_RIGHT_ADC_VOLUME 0x16
50 #define WM8962_ADDITIONAL_CONTROL_1 0x17
51 #define WM8962_ADDITIONAL_CONTROL_2 0x18
52 #define WM8962_PWR_MGMT_1 0x19
53 #define WM8962_PWR_MGMT_2 0x1A
54 #define WM8962_ADDITIONAL_CONTROL_3 0x1B
55 #define WM8962_ANTI_POP 0x1C
56 #define WM8962_CLOCKING_3 0x1E
57 #define WM8962_INPUT_MIXER_CONTROL_1 0x1F
58 #define WM8962_LEFT_INPUT_MIXER_VOLUME 0x20
59 #define WM8962_RIGHT_INPUT_MIXER_VOLUME 0x21
60 #define WM8962_INPUT_MIXER_CONTROL_2 0x22
61 #define WM8962_INPUT_BIAS_CONTROL 0x23
62 #define WM8962_LEFT_INPUT_PGA_CONTROL 0x25
63 #define WM8962_RIGHT_INPUT_PGA_CONTROL 0x26
64 #define WM8962_SPKOUTL_VOLUME 0x28
65 #define WM8962_SPKOUTR_VOLUME 0x29
66 #define WM8962_THERMAL_SHUTDOWN_STATUS 0x2F
67 #define WM8962_ADDITIONAL_CONTROL_4 0x30
68 #define WM8962_CLASS_D_CONTROL_1 0x31
69 #define WM8962_CLASS_D_CONTROL_2 0x33
70 #define WM8962_CLOCKING_4 0x38
71 #define WM8962_DAC_DSP_MIXING_1 0x39
72 #define WM8962_DAC_DSP_MIXING_2 0x3A
73 #define WM8962_DC_SERVO_0 0x3C
74 #define WM8962_DC_SERVO_1 0x3D
75 #define WM8962_DC_SERVO_4 0x40
76 #define WM8962_DC_SERVO_6 0x42
77 #define WM8962_ANALOGUE_PGA_BIAS 0x44
78 #define WM8962_ANALOGUE_HP_0 0x45
79 #define WM8962_ANALOGUE_HP_2 0x47
80 #define WM8962_CHARGE_PUMP_1 0x48
81 #define WM8962_CHARGE_PUMP_B 0x52
82 #define WM8962_WRITE_SEQUENCER_CONTROL_1 0x57
83 #define WM8962_WRITE_SEQUENCER_CONTROL_2 0x5A
84 #define WM8962_WRITE_SEQUENCER_CONTROL_3 0x5D
85 #define WM8962_CONTROL_INTERFACE 0x5E
86 #define WM8962_MIXER_ENABLES 0x63
87 #define WM8962_HEADPHONE_MIXER_1 0x64
88 #define WM8962_HEADPHONE_MIXER_2 0x65
89 #define WM8962_HEADPHONE_MIXER_3 0x66
90 #define WM8962_HEADPHONE_MIXER_4 0x67
91 #define WM8962_SPEAKER_MIXER_1 0x69
92 #define WM8962_SPEAKER_MIXER_2 0x6A
93 #define WM8962_SPEAKER_MIXER_3 0x6B
94 #define WM8962_SPEAKER_MIXER_4 0x6C
95 #define WM8962_SPEAKER_MIXER_5 0x6D
96 #define WM8962_BEEP_GENERATOR_1 0x6E
97 #define WM8962_OSCILLATOR_TRIM_3 0x73
98 #define WM8962_OSCILLATOR_TRIM_4 0x74
99 #define WM8962_OSCILLATOR_TRIM_7 0x77
100 #define WM8962_ANALOGUE_CLOCKING1 0x7C
101 #define WM8962_ANALOGUE_CLOCKING2 0x7D
102 #define WM8962_ANALOGUE_CLOCKING3 0x7E
103 #define WM8962_PLL_SOFTWARE_RESET 0x7F
104 #define WM8962_PLL2 0x81
105 #define WM8962_PLL_4 0x83
106 #define WM8962_PLL_9 0x88
107 #define WM8962_PLL_10 0x89
108 #define WM8962_PLL_11 0x8A
109 #define WM8962_PLL_12 0x8B
110 #define WM8962_PLL_13 0x8C
111 #define WM8962_PLL_14 0x8D
112 #define WM8962_PLL_15 0x8E
113 #define WM8962_PLL_16 0x8F
114 #define WM8962_FLL_CONTROL_1 0x9B
115 #define WM8962_FLL_CONTROL_2 0x9C
116 #define WM8962_FLL_CONTROL_3 0x9D
117 #define WM8962_FLL_CONTROL_5 0x9F
118 #define WM8962_FLL_CONTROL_6 0xA0
119 #define WM8962_FLL_CONTROL_7 0xA1
120 #define WM8962_FLL_CONTROL_8 0xA2
121 #define WM8962_GENERAL_TEST_1 0xFC
122 #define WM8962_DF1 0x100
123 #define WM8962_DF2 0x101
124 #define WM8962_DF3 0x102
125 #define WM8962_DF4 0x103
126 #define WM8962_DF5 0x104
127 #define WM8962_DF6 0x105
128 #define WM8962_DF7 0x106
129 #define WM8962_LHPF1 0x108
130 #define WM8962_LHPF2 0x109
131 #define WM8962_THREED1 0x10C
132 #define WM8962_THREED2 0x10D
133 #define WM8962_THREED3 0x10E
134 #define WM8962_THREED4 0x10F
135 #define WM8962_DRC_1 0x114
136 #define WM8962_DRC_2 0x115
137 #define WM8962_DRC_3 0x116
138 #define WM8962_DRC_4 0x117
139 #define WM8962_DRC_5 0x118
140 #define WM8962_TLOOPBACK 0x11D
141 #define WM8962_EQ1 0x14F
142 #define WM8962_EQ2 0x150
143 #define WM8962_EQ3 0x151
144 #define WM8962_EQ4 0x152
145 #define WM8962_EQ5 0x153
146 #define WM8962_EQ6 0x154
147 #define WM8962_EQ7 0x155
148 #define WM8962_EQ8 0x156
149 #define WM8962_EQ9 0x157
150 #define WM8962_EQ10 0x158
151 #define WM8962_EQ11 0x159
152 #define WM8962_EQ12 0x15A
153 #define WM8962_EQ13 0x15B
154 #define WM8962_EQ14 0x15C
155 #define WM8962_EQ15 0x15D
156 #define WM8962_EQ16 0x15E
157 #define WM8962_EQ17 0x15F
158 #define WM8962_EQ18 0x160
159 #define WM8962_EQ19 0x161
160 #define WM8962_EQ20 0x162
161 #define WM8962_EQ21 0x163
162 #define WM8962_EQ22 0x164
163 #define WM8962_EQ23 0x165
164 #define WM8962_EQ24 0x166
165 #define WM8962_EQ25 0x167
166 #define WM8962_EQ26 0x168
167 #define WM8962_EQ27 0x169
168 #define WM8962_EQ28 0x16A
169 #define WM8962_EQ29 0x16B
170 #define WM8962_EQ30 0x16C
171 #define WM8962_EQ31 0x16D
172 #define WM8962_EQ32 0x16E
173 #define WM8962_EQ33 0x16F
174 #define WM8962_EQ34 0x170
175 #define WM8962_EQ35 0x171
176 #define WM8962_EQ36 0x172
177 #define WM8962_EQ37 0x173
178 #define WM8962_EQ38 0x174
179 #define WM8962_EQ39 0x175
180 #define WM8962_EQ40 0x176
181 #define WM8962_EQ41 0x177
182 #define WM8962_GPIO_BASE 0x200
183 #define WM8962_GPIO_2 0x201
184 #define WM8962_GPIO_3 0x202
185 #define WM8962_GPIO_5 0x204
186 #define WM8962_GPIO_6 0x205
187 #define WM8962_INTERRUPT_STATUS_1 0x230
188 #define WM8962_INTERRUPT_STATUS_2 0x231
189 #define WM8962_INTERRUPT_STATUS_1_MASK 0x238
190 #define WM8962_INTERRUPT_STATUS_2_MASK 0x239
191 #define WM8962_INTERRUPT_CONTROL 0x240
192 #define WM8962_IRQ_DEBOUNCE 0x248
193 #define WM8962_MICINT_SOURCE_POL 0x24A
194 #define WM8962_DSP2_POWER_MANAGEMENT 0x300
195 #define WM8962_DSP2_EXECCONTROL 0x40D
196 #define WM8962_WRITE_SEQUENCER_0 0x1000
197 #define WM8962_WRITE_SEQUENCER_1 0x1001
198 #define WM8962_WRITE_SEQUENCER_2 0x1002
199 #define WM8962_WRITE_SEQUENCER_3 0x1003
200 #define WM8962_WRITE_SEQUENCER_4 0x1004
201 #define WM8962_WRITE_SEQUENCER_5 0x1005
202 #define WM8962_WRITE_SEQUENCER_6 0x1006
203 #define WM8962_WRITE_SEQUENCER_7 0x1007
204 #define WM8962_WRITE_SEQUENCER_8 0x1008
205 #define WM8962_WRITE_SEQUENCER_9 0x1009
206 #define WM8962_WRITE_SEQUENCER_10 0x100A
207 #define WM8962_WRITE_SEQUENCER_11 0x100B
208 #define WM8962_WRITE_SEQUENCER_12 0x100C
209 #define WM8962_WRITE_SEQUENCER_13 0x100D
210 #define WM8962_WRITE_SEQUENCER_14 0x100E
211 #define WM8962_WRITE_SEQUENCER_15 0x100F
212 #define WM8962_WRITE_SEQUENCER_16 0x1010
213 #define WM8962_WRITE_SEQUENCER_17 0x1011
214 #define WM8962_WRITE_SEQUENCER_18 0x1012
215 #define WM8962_WRITE_SEQUENCER_19 0x1013
216 #define WM8962_WRITE_SEQUENCER_20 0x1014
217 #define WM8962_WRITE_SEQUENCER_21 0x1015
218 #define WM8962_WRITE_SEQUENCER_22 0x1016
219 #define WM8962_WRITE_SEQUENCER_23 0x1017
220 #define WM8962_WRITE_SEQUENCER_24 0x1018
221 #define WM8962_WRITE_SEQUENCER_25 0x1019
222 #define WM8962_WRITE_SEQUENCER_26 0x101A
223 #define WM8962_WRITE_SEQUENCER_27 0x101B
224 #define WM8962_WRITE_SEQUENCER_28 0x101C
225 #define WM8962_WRITE_SEQUENCER_29 0x101D
226 #define WM8962_WRITE_SEQUENCER_30 0x101E
227 #define WM8962_WRITE_SEQUENCER_31 0x101F
228 #define WM8962_WRITE_SEQUENCER_32 0x1020
229 #define WM8962_WRITE_SEQUENCER_33 0x1021
230 #define WM8962_WRITE_SEQUENCER_34 0x1022
231 #define WM8962_WRITE_SEQUENCER_35 0x1023
232 #define WM8962_WRITE_SEQUENCER_36 0x1024
233 #define WM8962_WRITE_SEQUENCER_37 0x1025
234 #define WM8962_WRITE_SEQUENCER_38 0x1026
235 #define WM8962_WRITE_SEQUENCER_39 0x1027
236 #define WM8962_WRITE_SEQUENCER_40 0x1028
237 #define WM8962_WRITE_SEQUENCER_41 0x1029
238 #define WM8962_WRITE_SEQUENCER_42 0x102A
239 #define WM8962_WRITE_SEQUENCER_43 0x102B
240 #define WM8962_WRITE_SEQUENCER_44 0x102C
241 #define WM8962_WRITE_SEQUENCER_45 0x102D
242 #define WM8962_WRITE_SEQUENCER_46 0x102E
243 #define WM8962_WRITE_SEQUENCER_47 0x102F
244 #define WM8962_WRITE_SEQUENCER_48 0x1030
245 #define WM8962_WRITE_SEQUENCER_49 0x1031
246 #define WM8962_WRITE_SEQUENCER_50 0x1032
247 #define WM8962_WRITE_SEQUENCER_51 0x1033
248 #define WM8962_WRITE_SEQUENCER_52 0x1034
249 #define WM8962_WRITE_SEQUENCER_53 0x1035
250 #define WM8962_WRITE_SEQUENCER_54 0x1036
251 #define WM8962_WRITE_SEQUENCER_55 0x1037
252 #define WM8962_WRITE_SEQUENCER_56 0x1038
253 #define WM8962_WRITE_SEQUENCER_57 0x1039
254 #define WM8962_WRITE_SEQUENCER_58 0x103A
255 #define WM8962_WRITE_SEQUENCER_59 0x103B
256 #define WM8962_WRITE_SEQUENCER_60 0x103C
257 #define WM8962_WRITE_SEQUENCER_61 0x103D
258 #define WM8962_WRITE_SEQUENCER_62 0x103E
259 #define WM8962_WRITE_SEQUENCER_63 0x103F
260 #define WM8962_WRITE_SEQUENCER_64 0x1040
261 #define WM8962_WRITE_SEQUENCER_65 0x1041
262 #define WM8962_WRITE_SEQUENCER_66 0x1042
263 #define WM8962_WRITE_SEQUENCER_67 0x1043
264 #define WM8962_WRITE_SEQUENCER_68 0x1044
265 #define WM8962_WRITE_SEQUENCER_69 0x1045
266 #define WM8962_WRITE_SEQUENCER_70 0x1046
267 #define WM8962_WRITE_SEQUENCER_71 0x1047
268 #define WM8962_WRITE_SEQUENCER_72 0x1048
269 #define WM8962_WRITE_SEQUENCER_73 0x1049
270 #define WM8962_WRITE_SEQUENCER_74 0x104A
271 #define WM8962_WRITE_SEQUENCER_75 0x104B
272 #define WM8962_WRITE_SEQUENCER_76 0x104C
273 #define WM8962_WRITE_SEQUENCER_77 0x104D
274 #define WM8962_WRITE_SEQUENCER_78 0x104E
275 #define WM8962_WRITE_SEQUENCER_79 0x104F
276 #define WM8962_WRITE_SEQUENCER_80 0x1050
277 #define WM8962_WRITE_SEQUENCER_81 0x1051
278 #define WM8962_WRITE_SEQUENCER_82 0x1052
279 #define WM8962_WRITE_SEQUENCER_83 0x1053
280 #define WM8962_WRITE_SEQUENCER_84 0x1054
281 #define WM8962_WRITE_SEQUENCER_85 0x1055
282 #define WM8962_WRITE_SEQUENCER_86 0x1056
283 #define WM8962_WRITE_SEQUENCER_87 0x1057
284 #define WM8962_WRITE_SEQUENCER_88 0x1058
285 #define WM8962_WRITE_SEQUENCER_89 0x1059
286 #define WM8962_WRITE_SEQUENCER_90 0x105A
287 #define WM8962_WRITE_SEQUENCER_91 0x105B
288 #define WM8962_WRITE_SEQUENCER_92 0x105C
289 #define WM8962_WRITE_SEQUENCER_93 0x105D
290 #define WM8962_WRITE_SEQUENCER_94 0x105E
291 #define WM8962_WRITE_SEQUENCER_95 0x105F
292 #define WM8962_WRITE_SEQUENCER_96 0x1060
293 #define WM8962_WRITE_SEQUENCER_97 0x1061
294 #define WM8962_WRITE_SEQUENCER_98 0x1062
295 #define WM8962_WRITE_SEQUENCER_99 0x1063
296 #define WM8962_WRITE_SEQUENCER_100 0x1064
297 #define WM8962_WRITE_SEQUENCER_101 0x1065
298 #define WM8962_WRITE_SEQUENCER_102 0x1066
299 #define WM8962_WRITE_SEQUENCER_103 0x1067
300 #define WM8962_WRITE_SEQUENCER_104 0x1068
301 #define WM8962_WRITE_SEQUENCER_105 0x1069
302 #define WM8962_WRITE_SEQUENCER_106 0x106A
303 #define WM8962_WRITE_SEQUENCER_107 0x106B
304 #define WM8962_WRITE_SEQUENCER_108 0x106C
305 #define WM8962_WRITE_SEQUENCER_109 0x106D
306 #define WM8962_WRITE_SEQUENCER_110 0x106E
307 #define WM8962_WRITE_SEQUENCER_111 0x106F
308 #define WM8962_WRITE_SEQUENCER_112 0x1070
309 #define WM8962_WRITE_SEQUENCER_113 0x1071
310 #define WM8962_WRITE_SEQUENCER_114 0x1072
311 #define WM8962_WRITE_SEQUENCER_115 0x1073
312 #define WM8962_WRITE_SEQUENCER_116 0x1074
313 #define WM8962_WRITE_SEQUENCER_117 0x1075
314 #define WM8962_WRITE_SEQUENCER_118 0x1076
315 #define WM8962_WRITE_SEQUENCER_119 0x1077
316 #define WM8962_WRITE_SEQUENCER_120 0x1078
317 #define WM8962_WRITE_SEQUENCER_121 0x1079
318 #define WM8962_WRITE_SEQUENCER_122 0x107A
319 #define WM8962_WRITE_SEQUENCER_123 0x107B
320 #define WM8962_WRITE_SEQUENCER_124 0x107C
321 #define WM8962_WRITE_SEQUENCER_125 0x107D
322 #define WM8962_WRITE_SEQUENCER_126 0x107E
323 #define WM8962_WRITE_SEQUENCER_127 0x107F
324 #define WM8962_WRITE_SEQUENCER_128 0x1080
325 #define WM8962_WRITE_SEQUENCER_129 0x1081
326 #define WM8962_WRITE_SEQUENCER_130 0x1082
327 #define WM8962_WRITE_SEQUENCER_131 0x1083
328 #define WM8962_WRITE_SEQUENCER_132 0x1084
329 #define WM8962_WRITE_SEQUENCER_133 0x1085
330 #define WM8962_WRITE_SEQUENCER_134 0x1086
331 #define WM8962_WRITE_SEQUENCER_135 0x1087
332 #define WM8962_WRITE_SEQUENCER_136 0x1088
333 #define WM8962_WRITE_SEQUENCER_137 0x1089
334 #define WM8962_WRITE_SEQUENCER_138 0x108A
335 #define WM8962_WRITE_SEQUENCER_139 0x108B
336 #define WM8962_WRITE_SEQUENCER_140 0x108C
337 #define WM8962_WRITE_SEQUENCER_141 0x108D
338 #define WM8962_WRITE_SEQUENCER_142 0x108E
339 #define WM8962_WRITE_SEQUENCER_143 0x108F
340 #define WM8962_WRITE_SEQUENCER_144 0x1090
341 #define WM8962_WRITE_SEQUENCER_145 0x1091
342 #define WM8962_WRITE_SEQUENCER_146 0x1092
343 #define WM8962_WRITE_SEQUENCER_147 0x1093
344 #define WM8962_WRITE_SEQUENCER_148 0x1094
345 #define WM8962_WRITE_SEQUENCER_149 0x1095
346 #define WM8962_WRITE_SEQUENCER_150 0x1096
347 #define WM8962_WRITE_SEQUENCER_151 0x1097
348 #define WM8962_WRITE_SEQUENCER_152 0x1098
349 #define WM8962_WRITE_SEQUENCER_153 0x1099
350 #define WM8962_WRITE_SEQUENCER_154 0x109A
351 #define WM8962_WRITE_SEQUENCER_155 0x109B
352 #define WM8962_WRITE_SEQUENCER_156 0x109C
353 #define WM8962_WRITE_SEQUENCER_157 0x109D
354 #define WM8962_WRITE_SEQUENCER_158 0x109E
355 #define WM8962_WRITE_SEQUENCER_159 0x109F
356 #define WM8962_WRITE_SEQUENCER_160 0x10A0
357 #define WM8962_WRITE_SEQUENCER_161 0x10A1
358 #define WM8962_WRITE_SEQUENCER_162 0x10A2
359 #define WM8962_WRITE_SEQUENCER_163 0x10A3
360 #define WM8962_WRITE_SEQUENCER_164 0x10A4
361 #define WM8962_WRITE_SEQUENCER_165 0x10A5
362 #define WM8962_WRITE_SEQUENCER_166 0x10A6
363 #define WM8962_WRITE_SEQUENCER_167 0x10A7
364 #define WM8962_WRITE_SEQUENCER_168 0x10A8
365 #define WM8962_WRITE_SEQUENCER_169 0x10A9
366 #define WM8962_WRITE_SEQUENCER_170 0x10AA
367 #define WM8962_WRITE_SEQUENCER_171 0x10AB
368 #define WM8962_WRITE_SEQUENCER_172 0x10AC
369 #define WM8962_WRITE_SEQUENCER_173 0x10AD
370 #define WM8962_WRITE_SEQUENCER_174 0x10AE
371 #define WM8962_WRITE_SEQUENCER_175 0x10AF
372 #define WM8962_WRITE_SEQUENCER_176 0x10B0
373 #define WM8962_WRITE_SEQUENCER_177 0x10B1
374 #define WM8962_WRITE_SEQUENCER_178 0x10B2
375 #define WM8962_WRITE_SEQUENCER_179 0x10B3
376 #define WM8962_WRITE_SEQUENCER_180 0x10B4
377 #define WM8962_WRITE_SEQUENCER_181 0x10B5
378 #define WM8962_WRITE_SEQUENCER_182 0x10B6
379 #define WM8962_WRITE_SEQUENCER_183 0x10B7
380 #define WM8962_WRITE_SEQUENCER_184 0x10B8
381 #define WM8962_WRITE_SEQUENCER_185 0x10B9
382 #define WM8962_WRITE_SEQUENCER_186 0x10BA
383 #define WM8962_WRITE_SEQUENCER_187 0x10BB
384 #define WM8962_WRITE_SEQUENCER_188 0x10BC
385 #define WM8962_WRITE_SEQUENCER_189 0x10BD
386 #define WM8962_WRITE_SEQUENCER_190 0x10BE
387 #define WM8962_WRITE_SEQUENCER_191 0x10BF
388 #define WM8962_WRITE_SEQUENCER_192 0x10C0
389 #define WM8962_WRITE_SEQUENCER_193 0x10C1
390 #define WM8962_WRITE_SEQUENCER_194 0x10C2
391 #define WM8962_WRITE_SEQUENCER_195 0x10C3
392 #define WM8962_WRITE_SEQUENCER_196 0x10C4
393 #define WM8962_WRITE_SEQUENCER_197 0x10C5
394 #define WM8962_WRITE_SEQUENCER_198 0x10C6
395 #define WM8962_WRITE_SEQUENCER_199 0x10C7
396 #define WM8962_WRITE_SEQUENCER_200 0x10C8
397 #define WM8962_WRITE_SEQUENCER_201 0x10C9
398 #define WM8962_WRITE_SEQUENCER_202 0x10CA
399 #define WM8962_WRITE_SEQUENCER_203 0x10CB
400 #define WM8962_WRITE_SEQUENCER_204 0x10CC
401 #define WM8962_WRITE_SEQUENCER_205 0x10CD
402 #define WM8962_WRITE_SEQUENCER_206 0x10CE
403 #define WM8962_WRITE_SEQUENCER_207 0x10CF
404 #define WM8962_WRITE_SEQUENCER_208 0x10D0
405 #define WM8962_WRITE_SEQUENCER_209 0x10D1
406 #define WM8962_WRITE_SEQUENCER_210 0x10D2
407 #define WM8962_WRITE_SEQUENCER_211 0x10D3
408 #define WM8962_WRITE_SEQUENCER_212 0x10D4
409 #define WM8962_WRITE_SEQUENCER_213 0x10D5
410 #define WM8962_WRITE_SEQUENCER_214 0x10D6
411 #define WM8962_WRITE_SEQUENCER_215 0x10D7
412 #define WM8962_WRITE_SEQUENCER_216 0x10D8
413 #define WM8962_WRITE_SEQUENCER_217 0x10D9
414 #define WM8962_WRITE_SEQUENCER_218 0x10DA
415 #define WM8962_WRITE_SEQUENCER_219 0x10DB
416 #define WM8962_WRITE_SEQUENCER_220 0x10DC
417 #define WM8962_WRITE_SEQUENCER_221 0x10DD
418 #define WM8962_WRITE_SEQUENCER_222 0x10DE
419 #define WM8962_WRITE_SEQUENCER_223 0x10DF
420 #define WM8962_WRITE_SEQUENCER_224 0x10E0
421 #define WM8962_WRITE_SEQUENCER_225 0x10E1
422 #define WM8962_WRITE_SEQUENCER_226 0x10E2
423 #define WM8962_WRITE_SEQUENCER_227 0x10E3
424 #define WM8962_WRITE_SEQUENCER_228 0x10E4
425 #define WM8962_WRITE_SEQUENCER_229 0x10E5
426 #define WM8962_WRITE_SEQUENCER_230 0x10E6
427 #define WM8962_WRITE_SEQUENCER_231 0x10E7
428 #define WM8962_WRITE_SEQUENCER_232 0x10E8
429 #define WM8962_WRITE_SEQUENCER_233 0x10E9
430 #define WM8962_WRITE_SEQUENCER_234 0x10EA
431 #define WM8962_WRITE_SEQUENCER_235 0x10EB
432 #define WM8962_WRITE_SEQUENCER_236 0x10EC
433 #define WM8962_WRITE_SEQUENCER_237 0x10ED
434 #define WM8962_WRITE_SEQUENCER_238 0x10EE
435 #define WM8962_WRITE_SEQUENCER_239 0x10EF
436 #define WM8962_WRITE_SEQUENCER_240 0x10F0
437 #define WM8962_WRITE_SEQUENCER_241 0x10F1
438 #define WM8962_WRITE_SEQUENCER_242 0x10F2
439 #define WM8962_WRITE_SEQUENCER_243 0x10F3
440 #define WM8962_WRITE_SEQUENCER_244 0x10F4
441 #define WM8962_WRITE_SEQUENCER_245 0x10F5
442 #define WM8962_WRITE_SEQUENCER_246 0x10F6
443 #define WM8962_WRITE_SEQUENCER_247 0x10F7
444 #define WM8962_WRITE_SEQUENCER_248 0x10F8
445 #define WM8962_WRITE_SEQUENCER_249 0x10F9
446 #define WM8962_WRITE_SEQUENCER_250 0x10FA
447 #define WM8962_WRITE_SEQUENCER_251 0x10FB
448 #define WM8962_WRITE_SEQUENCER_252 0x10FC
449 #define WM8962_WRITE_SEQUENCER_253 0x10FD
450 #define WM8962_WRITE_SEQUENCER_254 0x10FE
451 #define WM8962_WRITE_SEQUENCER_255 0x10FF
452 #define WM8962_WRITE_SEQUENCER_256 0x1100
453 #define WM8962_WRITE_SEQUENCER_257 0x1101
454 #define WM8962_WRITE_SEQUENCER_258 0x1102
455 #define WM8962_WRITE_SEQUENCER_259 0x1103
456 #define WM8962_WRITE_SEQUENCER_260 0x1104
457 #define WM8962_WRITE_SEQUENCER_261 0x1105
458 #define WM8962_WRITE_SEQUENCER_262 0x1106
459 #define WM8962_WRITE_SEQUENCER_263 0x1107
460 #define WM8962_WRITE_SEQUENCER_264 0x1108
461 #define WM8962_WRITE_SEQUENCER_265 0x1109
462 #define WM8962_WRITE_SEQUENCER_266 0x110A
463 #define WM8962_WRITE_SEQUENCER_267 0x110B
464 #define WM8962_WRITE_SEQUENCER_268 0x110C
465 #define WM8962_WRITE_SEQUENCER_269 0x110D
466 #define WM8962_WRITE_SEQUENCER_270 0x110E
467 #define WM8962_WRITE_SEQUENCER_271 0x110F
468 #define WM8962_WRITE_SEQUENCER_272 0x1110
469 #define WM8962_WRITE_SEQUENCER_273 0x1111
470 #define WM8962_WRITE_SEQUENCER_274 0x1112
471 #define WM8962_WRITE_SEQUENCER_275 0x1113
472 #define WM8962_WRITE_SEQUENCER_276 0x1114
473 #define WM8962_WRITE_SEQUENCER_277 0x1115
474 #define WM8962_WRITE_SEQUENCER_278 0x1116
475 #define WM8962_WRITE_SEQUENCER_279 0x1117
476 #define WM8962_WRITE_SEQUENCER_280 0x1118
477 #define WM8962_WRITE_SEQUENCER_281 0x1119
478 #define WM8962_WRITE_SEQUENCER_282 0x111A
479 #define WM8962_WRITE_SEQUENCER_283 0x111B
480 #define WM8962_WRITE_SEQUENCER_284 0x111C
481 #define WM8962_WRITE_SEQUENCER_285 0x111D
482 #define WM8962_WRITE_SEQUENCER_286 0x111E
483 #define WM8962_WRITE_SEQUENCER_287 0x111F
484 #define WM8962_WRITE_SEQUENCER_288 0x1120
485 #define WM8962_WRITE_SEQUENCER_289 0x1121
486 #define WM8962_WRITE_SEQUENCER_290 0x1122
487 #define WM8962_WRITE_SEQUENCER_291 0x1123
488 #define WM8962_WRITE_SEQUENCER_292 0x1124
489 #define WM8962_WRITE_SEQUENCER_293 0x1125
490 #define WM8962_WRITE_SEQUENCER_294 0x1126
491 #define WM8962_WRITE_SEQUENCER_295 0x1127
492 #define WM8962_WRITE_SEQUENCER_296 0x1128
493 #define WM8962_WRITE_SEQUENCER_297 0x1129
494 #define WM8962_WRITE_SEQUENCER_298 0x112A
495 #define WM8962_WRITE_SEQUENCER_299 0x112B
496 #define WM8962_WRITE_SEQUENCER_300 0x112C
497 #define WM8962_WRITE_SEQUENCER_301 0x112D
498 #define WM8962_WRITE_SEQUENCER_302 0x112E
499 #define WM8962_WRITE_SEQUENCER_303 0x112F
500 #define WM8962_WRITE_SEQUENCER_304 0x1130
501 #define WM8962_WRITE_SEQUENCER_305 0x1131
502 #define WM8962_WRITE_SEQUENCER_306 0x1132
503 #define WM8962_WRITE_SEQUENCER_307 0x1133
504 #define WM8962_WRITE_SEQUENCER_308 0x1134
505 #define WM8962_WRITE_SEQUENCER_309 0x1135
506 #define WM8962_WRITE_SEQUENCER_310 0x1136
507 #define WM8962_WRITE_SEQUENCER_311 0x1137
508 #define WM8962_WRITE_SEQUENCER_312 0x1138
509 #define WM8962_WRITE_SEQUENCER_313 0x1139
510 #define WM8962_WRITE_SEQUENCER_314 0x113A
511 #define WM8962_WRITE_SEQUENCER_315 0x113B
512 #define WM8962_WRITE_SEQUENCER_316 0x113C
513 #define WM8962_WRITE_SEQUENCER_317 0x113D
514 #define WM8962_WRITE_SEQUENCER_318 0x113E
515 #define WM8962_WRITE_SEQUENCER_319 0x113F
516 #define WM8962_WRITE_SEQUENCER_320 0x1140
517 #define WM8962_WRITE_SEQUENCER_321 0x1141
518 #define WM8962_WRITE_SEQUENCER_322 0x1142
519 #define WM8962_WRITE_SEQUENCER_323 0x1143
520 #define WM8962_WRITE_SEQUENCER_324 0x1144
521 #define WM8962_WRITE_SEQUENCER_325 0x1145
522 #define WM8962_WRITE_SEQUENCER_326 0x1146
523 #define WM8962_WRITE_SEQUENCER_327 0x1147
524 #define WM8962_WRITE_SEQUENCER_328 0x1148
525 #define WM8962_WRITE_SEQUENCER_329 0x1149
526 #define WM8962_WRITE_SEQUENCER_330 0x114A
527 #define WM8962_WRITE_SEQUENCER_331 0x114B
528 #define WM8962_WRITE_SEQUENCER_332 0x114C
529 #define WM8962_WRITE_SEQUENCER_333 0x114D
530 #define WM8962_WRITE_SEQUENCER_334 0x114E
531 #define WM8962_WRITE_SEQUENCER_335 0x114F
532 #define WM8962_WRITE_SEQUENCER_336 0x1150
533 #define WM8962_WRITE_SEQUENCER_337 0x1151
534 #define WM8962_WRITE_SEQUENCER_338 0x1152
535 #define WM8962_WRITE_SEQUENCER_339 0x1153
536 #define WM8962_WRITE_SEQUENCER_340 0x1154
537 #define WM8962_WRITE_SEQUENCER_341 0x1155
538 #define WM8962_WRITE_SEQUENCER_342 0x1156
539 #define WM8962_WRITE_SEQUENCER_343 0x1157
540 #define WM8962_WRITE_SEQUENCER_344 0x1158
541 #define WM8962_WRITE_SEQUENCER_345 0x1159
542 #define WM8962_WRITE_SEQUENCER_346 0x115A
543 #define WM8962_WRITE_SEQUENCER_347 0x115B
544 #define WM8962_WRITE_SEQUENCER_348 0x115C
545 #define WM8962_WRITE_SEQUENCER_349 0x115D
546 #define WM8962_WRITE_SEQUENCER_350 0x115E
547 #define WM8962_WRITE_SEQUENCER_351 0x115F
548 #define WM8962_WRITE_SEQUENCER_352 0x1160
549 #define WM8962_WRITE_SEQUENCER_353 0x1161
550 #define WM8962_WRITE_SEQUENCER_354 0x1162
551 #define WM8962_WRITE_SEQUENCER_355 0x1163
552 #define WM8962_WRITE_SEQUENCER_356 0x1164
553 #define WM8962_WRITE_SEQUENCER_357 0x1165
554 #define WM8962_WRITE_SEQUENCER_358 0x1166
555 #define WM8962_WRITE_SEQUENCER_359 0x1167
556 #define WM8962_WRITE_SEQUENCER_360 0x1168
557 #define WM8962_WRITE_SEQUENCER_361 0x1169
558 #define WM8962_WRITE_SEQUENCER_362 0x116A
559 #define WM8962_WRITE_SEQUENCER_363 0x116B
560 #define WM8962_WRITE_SEQUENCER_364 0x116C
561 #define WM8962_WRITE_SEQUENCER_365 0x116D
562 #define WM8962_WRITE_SEQUENCER_366 0x116E
563 #define WM8962_WRITE_SEQUENCER_367 0x116F
564 #define WM8962_WRITE_SEQUENCER_368 0x1170
565 #define WM8962_WRITE_SEQUENCER_369 0x1171
566 #define WM8962_WRITE_SEQUENCER_370 0x1172
567 #define WM8962_WRITE_SEQUENCER_371 0x1173
568 #define WM8962_WRITE_SEQUENCER_372 0x1174
569 #define WM8962_WRITE_SEQUENCER_373 0x1175
570 #define WM8962_WRITE_SEQUENCER_374 0x1176
571 #define WM8962_WRITE_SEQUENCER_375 0x1177
572 #define WM8962_WRITE_SEQUENCER_376 0x1178
573 #define WM8962_WRITE_SEQUENCER_377 0x1179
574 #define WM8962_WRITE_SEQUENCER_378 0x117A
575 #define WM8962_WRITE_SEQUENCER_379 0x117B
576 #define WM8962_WRITE_SEQUENCER_380 0x117C
577 #define WM8962_WRITE_SEQUENCER_381 0x117D
578 #define WM8962_WRITE_SEQUENCER_382 0x117E
579 #define WM8962_WRITE_SEQUENCER_383 0x117F
580 #define WM8962_WRITE_SEQUENCER_384 0x1180
581 #define WM8962_WRITE_SEQUENCER_385 0x1181
582 #define WM8962_WRITE_SEQUENCER_386 0x1182
583 #define WM8962_WRITE_SEQUENCER_387 0x1183
584 #define WM8962_WRITE_SEQUENCER_388 0x1184
585 #define WM8962_WRITE_SEQUENCER_389 0x1185
586 #define WM8962_WRITE_SEQUENCER_390 0x1186
587 #define WM8962_WRITE_SEQUENCER_391 0x1187
588 #define WM8962_WRITE_SEQUENCER_392 0x1188
589 #define WM8962_WRITE_SEQUENCER_393 0x1189
590 #define WM8962_WRITE_SEQUENCER_394 0x118A
591 #define WM8962_WRITE_SEQUENCER_395 0x118B
592 #define WM8962_WRITE_SEQUENCER_396 0x118C
593 #define WM8962_WRITE_SEQUENCER_397 0x118D
594 #define WM8962_WRITE_SEQUENCER_398 0x118E
595 #define WM8962_WRITE_SEQUENCER_399 0x118F
596 #define WM8962_WRITE_SEQUENCER_400 0x1190
597 #define WM8962_WRITE_SEQUENCER_401 0x1191
598 #define WM8962_WRITE_SEQUENCER_402 0x1192
599 #define WM8962_WRITE_SEQUENCER_403 0x1193
600 #define WM8962_WRITE_SEQUENCER_404 0x1194
601 #define WM8962_WRITE_SEQUENCER_405 0x1195
602 #define WM8962_WRITE_SEQUENCER_406 0x1196
603 #define WM8962_WRITE_SEQUENCER_407 0x1197
604 #define WM8962_WRITE_SEQUENCER_408 0x1198
605 #define WM8962_WRITE_SEQUENCER_409 0x1199
606 #define WM8962_WRITE_SEQUENCER_410 0x119A
607 #define WM8962_WRITE_SEQUENCER_411 0x119B
608 #define WM8962_WRITE_SEQUENCER_412 0x119C
609 #define WM8962_WRITE_SEQUENCER_413 0x119D
610 #define WM8962_WRITE_SEQUENCER_414 0x119E
611 #define WM8962_WRITE_SEQUENCER_415 0x119F
612 #define WM8962_WRITE_SEQUENCER_416 0x11A0
613 #define WM8962_WRITE_SEQUENCER_417 0x11A1
614 #define WM8962_WRITE_SEQUENCER_418 0x11A2
615 #define WM8962_WRITE_SEQUENCER_419 0x11A3
616 #define WM8962_WRITE_SEQUENCER_420 0x11A4
617 #define WM8962_WRITE_SEQUENCER_421 0x11A5
618 #define WM8962_WRITE_SEQUENCER_422 0x11A6
619 #define WM8962_WRITE_SEQUENCER_423 0x11A7
620 #define WM8962_WRITE_SEQUENCER_424 0x11A8
621 #define WM8962_WRITE_SEQUENCER_425 0x11A9
622 #define WM8962_WRITE_SEQUENCER_426 0x11AA
623 #define WM8962_WRITE_SEQUENCER_427 0x11AB
624 #define WM8962_WRITE_SEQUENCER_428 0x11AC
625 #define WM8962_WRITE_SEQUENCER_429 0x11AD
626 #define WM8962_WRITE_SEQUENCER_430 0x11AE
627 #define WM8962_WRITE_SEQUENCER_431 0x11AF
628 #define WM8962_WRITE_SEQUENCER_432 0x11B0
629 #define WM8962_WRITE_SEQUENCER_433 0x11B1
630 #define WM8962_WRITE_SEQUENCER_434 0x11B2
631 #define WM8962_WRITE_SEQUENCER_435 0x11B3
632 #define WM8962_WRITE_SEQUENCER_436 0x11B4
633 #define WM8962_WRITE_SEQUENCER_437 0x11B5
634 #define WM8962_WRITE_SEQUENCER_438 0x11B6
635 #define WM8962_WRITE_SEQUENCER_439 0x11B7
636 #define WM8962_WRITE_SEQUENCER_440 0x11B8
637 #define WM8962_WRITE_SEQUENCER_441 0x11B9
638 #define WM8962_WRITE_SEQUENCER_442 0x11BA
639 #define WM8962_WRITE_SEQUENCER_443 0x11BB
640 #define WM8962_WRITE_SEQUENCER_444 0x11BC
641 #define WM8962_WRITE_SEQUENCER_445 0x11BD
642 #define WM8962_WRITE_SEQUENCER_446 0x11BE
643 #define WM8962_WRITE_SEQUENCER_447 0x11BF
644 #define WM8962_WRITE_SEQUENCER_448 0x11C0
645 #define WM8962_WRITE_SEQUENCER_449 0x11C1
646 #define WM8962_WRITE_SEQUENCER_450 0x11C2
647 #define WM8962_WRITE_SEQUENCER_451 0x11C3
648 #define WM8962_WRITE_SEQUENCER_452 0x11C4
649 #define WM8962_WRITE_SEQUENCER_453 0x11C5
650 #define WM8962_WRITE_SEQUENCER_454 0x11C6
651 #define WM8962_WRITE_SEQUENCER_455 0x11C7
652 #define WM8962_WRITE_SEQUENCER_456 0x11C8
653 #define WM8962_WRITE_SEQUENCER_457 0x11C9
654 #define WM8962_WRITE_SEQUENCER_458 0x11CA
655 #define WM8962_WRITE_SEQUENCER_459 0x11CB
656 #define WM8962_WRITE_SEQUENCER_460 0x11CC
657 #define WM8962_WRITE_SEQUENCER_461 0x11CD
658 #define WM8962_WRITE_SEQUENCER_462 0x11CE
659 #define WM8962_WRITE_SEQUENCER_463 0x11CF
660 #define WM8962_WRITE_SEQUENCER_464 0x11D0
661 #define WM8962_WRITE_SEQUENCER_465 0x11D1
662 #define WM8962_WRITE_SEQUENCER_466 0x11D2
663 #define WM8962_WRITE_SEQUENCER_467 0x11D3
664 #define WM8962_WRITE_SEQUENCER_468 0x11D4
665 #define WM8962_WRITE_SEQUENCER_469 0x11D5
666 #define WM8962_WRITE_SEQUENCER_470 0x11D6
667 #define WM8962_WRITE_SEQUENCER_471 0x11D7
668 #define WM8962_WRITE_SEQUENCER_472 0x11D8
669 #define WM8962_WRITE_SEQUENCER_473 0x11D9
670 #define WM8962_WRITE_SEQUENCER_474 0x11DA
671 #define WM8962_WRITE_SEQUENCER_475 0x11DB
672 #define WM8962_WRITE_SEQUENCER_476 0x11DC
673 #define WM8962_WRITE_SEQUENCER_477 0x11DD
674 #define WM8962_WRITE_SEQUENCER_478 0x11DE
675 #define WM8962_WRITE_SEQUENCER_479 0x11DF
676 #define WM8962_WRITE_SEQUENCER_480 0x11E0
677 #define WM8962_WRITE_SEQUENCER_481 0x11E1
678 #define WM8962_WRITE_SEQUENCER_482 0x11E2
679 #define WM8962_WRITE_SEQUENCER_483 0x11E3
680 #define WM8962_WRITE_SEQUENCER_484 0x11E4
681 #define WM8962_WRITE_SEQUENCER_485 0x11E5
682 #define WM8962_WRITE_SEQUENCER_486 0x11E6
683 #define WM8962_WRITE_SEQUENCER_487 0x11E7
684 #define WM8962_WRITE_SEQUENCER_488 0x11E8
685 #define WM8962_WRITE_SEQUENCER_489 0x11E9
686 #define WM8962_WRITE_SEQUENCER_490 0x11EA
687 #define WM8962_WRITE_SEQUENCER_491 0x11EB
688 #define WM8962_WRITE_SEQUENCER_492 0x11EC
689 #define WM8962_WRITE_SEQUENCER_493 0x11ED
690 #define WM8962_WRITE_SEQUENCER_494 0x11EE
691 #define WM8962_WRITE_SEQUENCER_495 0x11EF
692 #define WM8962_WRITE_SEQUENCER_496 0x11F0
693 #define WM8962_WRITE_SEQUENCER_497 0x11F1
694 #define WM8962_WRITE_SEQUENCER_498 0x11F2
695 #define WM8962_WRITE_SEQUENCER_499 0x11F3
696 #define WM8962_WRITE_SEQUENCER_500 0x11F4
697 #define WM8962_WRITE_SEQUENCER_501 0x11F5
698 #define WM8962_WRITE_SEQUENCER_502 0x11F6
699 #define WM8962_WRITE_SEQUENCER_503 0x11F7
700 #define WM8962_WRITE_SEQUENCER_504 0x11F8
701 #define WM8962_WRITE_SEQUENCER_505 0x11F9
702 #define WM8962_WRITE_SEQUENCER_506 0x11FA
703 #define WM8962_WRITE_SEQUENCER_507 0x11FB
704 #define WM8962_WRITE_SEQUENCER_508 0x11FC
705 #define WM8962_WRITE_SEQUENCER_509 0x11FD
706 #define WM8962_WRITE_SEQUENCER_510 0x11FE
707 #define WM8962_WRITE_SEQUENCER_511 0x11FF
708 #define WM8962_DSP2_INSTRUCTION_RAM_0 0x2000
709 #define WM8962_DSP2_ADDRESS_RAM_2 0x2400
710 #define WM8962_DSP2_ADDRESS_RAM_1 0x2401
711 #define WM8962_DSP2_ADDRESS_RAM_0 0x2402
712 #define WM8962_DSP2_DATA1_RAM_1 0x3000
713 #define WM8962_DSP2_DATA1_RAM_0 0x3001
714 #define WM8962_DSP2_DATA2_RAM_1 0x3400
715 #define WM8962_DSP2_DATA2_RAM_0 0x3401
716 #define WM8962_DSP2_DATA3_RAM_1 0x3800
717 #define WM8962_DSP2_DATA3_RAM_0 0x3801
718 #define WM8962_DSP2_COEFF_RAM_0 0x3C00
719 #define WM8962_RETUNEADC_SHARED_COEFF_1 0x4000
720 #define WM8962_RETUNEADC_SHARED_COEFF_0 0x4001
721 #define WM8962_RETUNEDAC_SHARED_COEFF_1 0x4002
722 #define WM8962_RETUNEDAC_SHARED_COEFF_0 0x4003
723 #define WM8962_SOUNDSTAGE_ENABLES_1 0x4004
724 #define WM8962_SOUNDSTAGE_ENABLES_0 0x4005
725 #define WM8962_HDBASS_AI_1 0x4200
726 #define WM8962_HDBASS_AI_0 0x4201
727 #define WM8962_HDBASS_AR_1 0x4202
728 #define WM8962_HDBASS_AR_0 0x4203
729 #define WM8962_HDBASS_B_1 0x4204
730 #define WM8962_HDBASS_B_0 0x4205
731 #define WM8962_HDBASS_K_1 0x4206
732 #define WM8962_HDBASS_K_0 0x4207
733 #define WM8962_HDBASS_N1_1 0x4208
734 #define WM8962_HDBASS_N1_0 0x4209
735 #define WM8962_HDBASS_N2_1 0x420A
736 #define WM8962_HDBASS_N2_0 0x420B
737 #define WM8962_HDBASS_N3_1 0x420C
738 #define WM8962_HDBASS_N3_0 0x420D
739 #define WM8962_HDBASS_N4_1 0x420E
740 #define WM8962_HDBASS_N4_0 0x420F
741 #define WM8962_HDBASS_N5_1 0x4210
742 #define WM8962_HDBASS_N5_0 0x4211
743 #define WM8962_HDBASS_X1_1 0x4212
744 #define WM8962_HDBASS_X1_0 0x4213
745 #define WM8962_HDBASS_X2_1 0x4214
746 #define WM8962_HDBASS_X2_0 0x4215
747 #define WM8962_HDBASS_X3_1 0x4216
748 #define WM8962_HDBASS_X3_0 0x4217
749 #define WM8962_HDBASS_ATK_1 0x4218
750 #define WM8962_HDBASS_ATK_0 0x4219
751 #define WM8962_HDBASS_DCY_1 0x421A
752 #define WM8962_HDBASS_DCY_0 0x421B
753 #define WM8962_HDBASS_PG_1 0x421C
754 #define WM8962_HDBASS_PG_0 0x421D
755 #define WM8962_HPF_C_1 0x4400
756 #define WM8962_HPF_C_0 0x4401
757 #define WM8962_ADCL_RETUNE_C1_1 0x4600
758 #define WM8962_ADCL_RETUNE_C1_0 0x4601
759 #define WM8962_ADCL_RETUNE_C2_1 0x4602
760 #define WM8962_ADCL_RETUNE_C2_0 0x4603
761 #define WM8962_ADCL_RETUNE_C3_1 0x4604
762 #define WM8962_ADCL_RETUNE_C3_0 0x4605
763 #define WM8962_ADCL_RETUNE_C4_1 0x4606
764 #define WM8962_ADCL_RETUNE_C4_0 0x4607
765 #define WM8962_ADCL_RETUNE_C5_1 0x4608
766 #define WM8962_ADCL_RETUNE_C5_0 0x4609
767 #define WM8962_ADCL_RETUNE_C6_1 0x460A
768 #define WM8962_ADCL_RETUNE_C6_0 0x460B
769 #define WM8962_ADCL_RETUNE_C7_1 0x460C
770 #define WM8962_ADCL_RETUNE_C7_0 0x460D
771 #define WM8962_ADCL_RETUNE_C8_1 0x460E
772 #define WM8962_ADCL_RETUNE_C8_0 0x460F
773 #define WM8962_ADCL_RETUNE_C9_1 0x4610
774 #define WM8962_ADCL_RETUNE_C9_0 0x4611
775 #define WM8962_ADCL_RETUNE_C10_1 0x4612
776 #define WM8962_ADCL_RETUNE_C10_0 0x4613
777 #define WM8962_ADCL_RETUNE_C11_1 0x4614
778 #define WM8962_ADCL_RETUNE_C11_0 0x4615
779 #define WM8962_ADCL_RETUNE_C12_1 0x4616
780 #define WM8962_ADCL_RETUNE_C12_0 0x4617
781 #define WM8962_ADCL_RETUNE_C13_1 0x4618
782 #define WM8962_ADCL_RETUNE_C13_0 0x4619
783 #define WM8962_ADCL_RETUNE_C14_1 0x461A
784 #define WM8962_ADCL_RETUNE_C14_0 0x461B
785 #define WM8962_ADCL_RETUNE_C15_1 0x461C
786 #define WM8962_ADCL_RETUNE_C15_0 0x461D
787 #define WM8962_ADCL_RETUNE_C16_1 0x461E
788 #define WM8962_ADCL_RETUNE_C16_0 0x461F
789 #define WM8962_ADCL_RETUNE_C17_1 0x4620
790 #define WM8962_ADCL_RETUNE_C17_0 0x4621
791 #define WM8962_ADCL_RETUNE_C18_1 0x4622
792 #define WM8962_ADCL_RETUNE_C18_0 0x4623
793 #define WM8962_ADCL_RETUNE_C19_1 0x4624
794 #define WM8962_ADCL_RETUNE_C19_0 0x4625
795 #define WM8962_ADCL_RETUNE_C20_1 0x4626
796 #define WM8962_ADCL_RETUNE_C20_0 0x4627
797 #define WM8962_ADCL_RETUNE_C21_1 0x4628
798 #define WM8962_ADCL_RETUNE_C21_0 0x4629
799 #define WM8962_ADCL_RETUNE_C22_1 0x462A
800 #define WM8962_ADCL_RETUNE_C22_0 0x462B
801 #define WM8962_ADCL_RETUNE_C23_1 0x462C
802 #define WM8962_ADCL_RETUNE_C23_0 0x462D
803 #define WM8962_ADCL_RETUNE_C24_1 0x462E
804 #define WM8962_ADCL_RETUNE_C24_0 0x462F
805 #define WM8962_ADCL_RETUNE_C25_1 0x4630
806 #define WM8962_ADCL_RETUNE_C25_0 0x4631
807 #define WM8962_ADCL_RETUNE_C26_1 0x4632
808 #define WM8962_ADCL_RETUNE_C26_0 0x4633
809 #define WM8962_ADCL_RETUNE_C27_1 0x4634
810 #define WM8962_ADCL_RETUNE_C27_0 0x4635
811 #define WM8962_ADCL_RETUNE_C28_1 0x4636
812 #define WM8962_ADCL_RETUNE_C28_0 0x4637
813 #define WM8962_ADCL_RETUNE_C29_1 0x4638
814 #define WM8962_ADCL_RETUNE_C29_0 0x4639
815 #define WM8962_ADCL_RETUNE_C30_1 0x463A
816 #define WM8962_ADCL_RETUNE_C30_0 0x463B
817 #define WM8962_ADCL_RETUNE_C31_1 0x463C
818 #define WM8962_ADCL_RETUNE_C31_0 0x463D
819 #define WM8962_ADCL_RETUNE_C32_1 0x463E
820 #define WM8962_ADCL_RETUNE_C32_0 0x463F
821 #define WM8962_RETUNEADC_PG2_1 0x4800
822 #define WM8962_RETUNEADC_PG2_0 0x4801
823 #define WM8962_RETUNEADC_PG_1 0x4802
824 #define WM8962_RETUNEADC_PG_0 0x4803
825 #define WM8962_ADCR_RETUNE_C1_1 0x4A00
826 #define WM8962_ADCR_RETUNE_C1_0 0x4A01
827 #define WM8962_ADCR_RETUNE_C2_1 0x4A02
828 #define WM8962_ADCR_RETUNE_C2_0 0x4A03
829 #define WM8962_ADCR_RETUNE_C3_1 0x4A04
830 #define WM8962_ADCR_RETUNE_C3_0 0x4A05
831 #define WM8962_ADCR_RETUNE_C4_1 0x4A06
832 #define WM8962_ADCR_RETUNE_C4_0 0x4A07
833 #define WM8962_ADCR_RETUNE_C5_1 0x4A08
834 #define WM8962_ADCR_RETUNE_C5_0 0x4A09
835 #define WM8962_ADCR_RETUNE_C6_1 0x4A0A
836 #define WM8962_ADCR_RETUNE_C6_0 0x4A0B
837 #define WM8962_ADCR_RETUNE_C7_1 0x4A0C
838 #define WM8962_ADCR_RETUNE_C7_0 0x4A0D
839 #define WM8962_ADCR_RETUNE_C8_1 0x4A0E
840 #define WM8962_ADCR_RETUNE_C8_0 0x4A0F
841 #define WM8962_ADCR_RETUNE_C9_1 0x4A10
842 #define WM8962_ADCR_RETUNE_C9_0 0x4A11
843 #define WM8962_ADCR_RETUNE_C10_1 0x4A12
844 #define WM8962_ADCR_RETUNE_C10_0 0x4A13
845 #define WM8962_ADCR_RETUNE_C11_1 0x4A14
846 #define WM8962_ADCR_RETUNE_C11_0 0x4A15
847 #define WM8962_ADCR_RETUNE_C12_1 0x4A16
848 #define WM8962_ADCR_RETUNE_C12_0 0x4A17
849 #define WM8962_ADCR_RETUNE_C13_1 0x4A18
850 #define WM8962_ADCR_RETUNE_C13_0 0x4A19
851 #define WM8962_ADCR_RETUNE_C14_1 0x4A1A
852 #define WM8962_ADCR_RETUNE_C14_0 0x4A1B
853 #define WM8962_ADCR_RETUNE_C15_1 0x4A1C
854 #define WM8962_ADCR_RETUNE_C15_0 0x4A1D
855 #define WM8962_ADCR_RETUNE_C16_1 0x4A1E
856 #define WM8962_ADCR_RETUNE_C16_0 0x4A1F
857 #define WM8962_ADCR_RETUNE_C17_1 0x4A20
858 #define WM8962_ADCR_RETUNE_C17_0 0x4A21
859 #define WM8962_ADCR_RETUNE_C18_1 0x4A22
860 #define WM8962_ADCR_RETUNE_C18_0 0x4A23
861 #define WM8962_ADCR_RETUNE_C19_1 0x4A24
862 #define WM8962_ADCR_RETUNE_C19_0 0x4A25
863 #define WM8962_ADCR_RETUNE_C20_1 0x4A26
864 #define WM8962_ADCR_RETUNE_C20_0 0x4A27
865 #define WM8962_ADCR_RETUNE_C21_1 0x4A28
866 #define WM8962_ADCR_RETUNE_C21_0 0x4A29
867 #define WM8962_ADCR_RETUNE_C22_1 0x4A2A
868 #define WM8962_ADCR_RETUNE_C22_0 0x4A2B
869 #define WM8962_ADCR_RETUNE_C23_1 0x4A2C
870 #define WM8962_ADCR_RETUNE_C23_0 0x4A2D
871 #define WM8962_ADCR_RETUNE_C24_1 0x4A2E
872 #define WM8962_ADCR_RETUNE_C24_0 0x4A2F
873 #define WM8962_ADCR_RETUNE_C25_1 0x4A30
874 #define WM8962_ADCR_RETUNE_C25_0 0x4A31
875 #define WM8962_ADCR_RETUNE_C26_1 0x4A32
876 #define WM8962_ADCR_RETUNE_C26_0 0x4A33
877 #define WM8962_ADCR_RETUNE_C27_1 0x4A34
878 #define WM8962_ADCR_RETUNE_C27_0 0x4A35
879 #define WM8962_ADCR_RETUNE_C28_1 0x4A36
880 #define WM8962_ADCR_RETUNE_C28_0 0x4A37
881 #define WM8962_ADCR_RETUNE_C29_1 0x4A38
882 #define WM8962_ADCR_RETUNE_C29_0 0x4A39
883 #define WM8962_ADCR_RETUNE_C30_1 0x4A3A
884 #define WM8962_ADCR_RETUNE_C30_0 0x4A3B
885 #define WM8962_ADCR_RETUNE_C31_1 0x4A3C
886 #define WM8962_ADCR_RETUNE_C31_0 0x4A3D
887 #define WM8962_ADCR_RETUNE_C32_1 0x4A3E
888 #define WM8962_ADCR_RETUNE_C32_0 0x4A3F
889 #define WM8962_DACL_RETUNE_C1_1 0x4C00
890 #define WM8962_DACL_RETUNE_C1_0 0x4C01
891 #define WM8962_DACL_RETUNE_C2_1 0x4C02
892 #define WM8962_DACL_RETUNE_C2_0 0x4C03
893 #define WM8962_DACL_RETUNE_C3_1 0x4C04
894 #define WM8962_DACL_RETUNE_C3_0 0x4C05
895 #define WM8962_DACL_RETUNE_C4_1 0x4C06
896 #define WM8962_DACL_RETUNE_C4_0 0x4C07
897 #define WM8962_DACL_RETUNE_C5_1 0x4C08
898 #define WM8962_DACL_RETUNE_C5_0 0x4C09
899 #define WM8962_DACL_RETUNE_C6_1 0x4C0A
900 #define WM8962_DACL_RETUNE_C6_0 0x4C0B
901 #define WM8962_DACL_RETUNE_C7_1 0x4C0C
902 #define WM8962_DACL_RETUNE_C7_0 0x4C0D
903 #define WM8962_DACL_RETUNE_C8_1 0x4C0E
904 #define WM8962_DACL_RETUNE_C8_0 0x4C0F
905 #define WM8962_DACL_RETUNE_C9_1 0x4C10
906 #define WM8962_DACL_RETUNE_C9_0 0x4C11
907 #define WM8962_DACL_RETUNE_C10_1 0x4C12
908 #define WM8962_DACL_RETUNE_C10_0 0x4C13
909 #define WM8962_DACL_RETUNE_C11_1 0x4C14
910 #define WM8962_DACL_RETUNE_C11_0 0x4C15
911 #define WM8962_DACL_RETUNE_C12_1 0x4C16
912 #define WM8962_DACL_RETUNE_C12_0 0x4C17
913 #define WM8962_DACL_RETUNE_C13_1 0x4C18
914 #define WM8962_DACL_RETUNE_C13_0 0x4C19
915 #define WM8962_DACL_RETUNE_C14_1 0x4C1A
916 #define WM8962_DACL_RETUNE_C14_0 0x4C1B
917 #define WM8962_DACL_RETUNE_C15_1 0x4C1C
918 #define WM8962_DACL_RETUNE_C15_0 0x4C1D
919 #define WM8962_DACL_RETUNE_C16_1 0x4C1E
920 #define WM8962_DACL_RETUNE_C16_0 0x4C1F
921 #define WM8962_DACL_RETUNE_C17_1 0x4C20
922 #define WM8962_DACL_RETUNE_C17_0 0x4C21
923 #define WM8962_DACL_RETUNE_C18_1 0x4C22
924 #define WM8962_DACL_RETUNE_C18_0 0x4C23
925 #define WM8962_DACL_RETUNE_C19_1 0x4C24
926 #define WM8962_DACL_RETUNE_C19_0 0x4C25
927 #define WM8962_DACL_RETUNE_C20_1 0x4C26
928 #define WM8962_DACL_RETUNE_C20_0 0x4C27
929 #define WM8962_DACL_RETUNE_C21_1 0x4C28
930 #define WM8962_DACL_RETUNE_C21_0 0x4C29
931 #define WM8962_DACL_RETUNE_C22_1 0x4C2A
932 #define WM8962_DACL_RETUNE_C22_0 0x4C2B
933 #define WM8962_DACL_RETUNE_C23_1 0x4C2C
934 #define WM8962_DACL_RETUNE_C23_0 0x4C2D
935 #define WM8962_DACL_RETUNE_C24_1 0x4C2E
936 #define WM8962_DACL_RETUNE_C24_0 0x4C2F
937 #define WM8962_DACL_RETUNE_C25_1 0x4C30
938 #define WM8962_DACL_RETUNE_C25_0 0x4C31
939 #define WM8962_DACL_RETUNE_C26_1 0x4C32
940 #define WM8962_DACL_RETUNE_C26_0 0x4C33
941 #define WM8962_DACL_RETUNE_C27_1 0x4C34
942 #define WM8962_DACL_RETUNE_C27_0 0x4C35
943 #define WM8962_DACL_RETUNE_C28_1 0x4C36
944 #define WM8962_DACL_RETUNE_C28_0 0x4C37
945 #define WM8962_DACL_RETUNE_C29_1 0x4C38
946 #define WM8962_DACL_RETUNE_C29_0 0x4C39
947 #define WM8962_DACL_RETUNE_C30_1 0x4C3A
948 #define WM8962_DACL_RETUNE_C30_0 0x4C3B
949 #define WM8962_DACL_RETUNE_C31_1 0x4C3C
950 #define WM8962_DACL_RETUNE_C31_0 0x4C3D
951 #define WM8962_DACL_RETUNE_C32_1 0x4C3E
952 #define WM8962_DACL_RETUNE_C32_0 0x4C3F
953 #define WM8962_RETUNEDAC_PG2_1 0x4E00
954 #define WM8962_RETUNEDAC_PG2_0 0x4E01
955 #define WM8962_RETUNEDAC_PG_1 0x4E02
956 #define WM8962_RETUNEDAC_PG_0 0x4E03
957 #define WM8962_DACR_RETUNE_C1_1 0x5000
958 #define WM8962_DACR_RETUNE_C1_0 0x5001
959 #define WM8962_DACR_RETUNE_C2_1 0x5002
960 #define WM8962_DACR_RETUNE_C2_0 0x5003
961 #define WM8962_DACR_RETUNE_C3_1 0x5004
962 #define WM8962_DACR_RETUNE_C3_0 0x5005
963 #define WM8962_DACR_RETUNE_C4_1 0x5006
964 #define WM8962_DACR_RETUNE_C4_0 0x5007
965 #define WM8962_DACR_RETUNE_C5_1 0x5008
966 #define WM8962_DACR_RETUNE_C5_0 0x5009
967 #define WM8962_DACR_RETUNE_C6_1 0x500A
968 #define WM8962_DACR_RETUNE_C6_0 0x500B
969 #define WM8962_DACR_RETUNE_C7_1 0x500C
970 #define WM8962_DACR_RETUNE_C7_0 0x500D
971 #define WM8962_DACR_RETUNE_C8_1 0x500E
972 #define WM8962_DACR_RETUNE_C8_0 0x500F
973 #define WM8962_DACR_RETUNE_C9_1 0x5010
974 #define WM8962_DACR_RETUNE_C9_0 0x5011
975 #define WM8962_DACR_RETUNE_C10_1 0x5012
976 #define WM8962_DACR_RETUNE_C10_0 0x5013
977 #define WM8962_DACR_RETUNE_C11_1 0x5014
978 #define WM8962_DACR_RETUNE_C11_0 0x5015
979 #define WM8962_DACR_RETUNE_C12_1 0x5016
980 #define WM8962_DACR_RETUNE_C12_0 0x5017
981 #define WM8962_DACR_RETUNE_C13_1 0x5018
982 #define WM8962_DACR_RETUNE_C13_0 0x5019
983 #define WM8962_DACR_RETUNE_C14_1 0x501A
984 #define WM8962_DACR_RETUNE_C14_0 0x501B
985 #define WM8962_DACR_RETUNE_C15_1 0x501C
986 #define WM8962_DACR_RETUNE_C15_0 0x501D
987 #define WM8962_DACR_RETUNE_C16_1 0x501E
988 #define WM8962_DACR_RETUNE_C16_0 0x501F
989 #define WM8962_DACR_RETUNE_C17_1 0x5020
990 #define WM8962_DACR_RETUNE_C17_0 0x5021
991 #define WM8962_DACR_RETUNE_C18_1 0x5022
992 #define WM8962_DACR_RETUNE_C18_0 0x5023
993 #define WM8962_DACR_RETUNE_C19_1 0x5024
994 #define WM8962_DACR_RETUNE_C19_0 0x5025
995 #define WM8962_DACR_RETUNE_C20_1 0x5026
996 #define WM8962_DACR_RETUNE_C20_0 0x5027
997 #define WM8962_DACR_RETUNE_C21_1 0x5028
998 #define WM8962_DACR_RETUNE_C21_0 0x5029
999 #define WM8962_DACR_RETUNE_C22_1 0x502A
1000 #define WM8962_DACR_RETUNE_C22_0 0x502B
1001 #define WM8962_DACR_RETUNE_C23_1 0x502C
1002 #define WM8962_DACR_RETUNE_C23_0 0x502D
1003 #define WM8962_DACR_RETUNE_C24_1 0x502E
1004 #define WM8962_DACR_RETUNE_C24_0 0x502F
1005 #define WM8962_DACR_RETUNE_C25_1 0x5030
1006 #define WM8962_DACR_RETUNE_C25_0 0x5031
1007 #define WM8962_DACR_RETUNE_C26_1 0x5032
1008 #define WM8962_DACR_RETUNE_C26_0 0x5033
1009 #define WM8962_DACR_RETUNE_C27_1 0x5034
1010 #define WM8962_DACR_RETUNE_C27_0 0x5035
1011 #define WM8962_DACR_RETUNE_C28_1 0x5036
1012 #define WM8962_DACR_RETUNE_C28_0 0x5037
1013 #define WM8962_DACR_RETUNE_C29_1 0x5038
1014 #define WM8962_DACR_RETUNE_C29_0 0x5039
1015 #define WM8962_DACR_RETUNE_C30_1 0x503A
1016 #define WM8962_DACR_RETUNE_C30_0 0x503B
1017 #define WM8962_DACR_RETUNE_C31_1 0x503C
1018 #define WM8962_DACR_RETUNE_C31_0 0x503D
1019 #define WM8962_DACR_RETUNE_C32_1 0x503E
1020 #define WM8962_DACR_RETUNE_C32_0 0x503F
1021 #define WM8962_VSS_XHD2_1 0x5200
1022 #define WM8962_VSS_XHD2_0 0x5201
1023 #define WM8962_VSS_XHD3_1 0x5202
1024 #define WM8962_VSS_XHD3_0 0x5203
1025 #define WM8962_VSS_XHN1_1 0x5204
1026 #define WM8962_VSS_XHN1_0 0x5205
1027 #define WM8962_VSS_XHN2_1 0x5206
1028 #define WM8962_VSS_XHN2_0 0x5207
1029 #define WM8962_VSS_XHN3_1 0x5208
1030 #define WM8962_VSS_XHN3_0 0x5209
1031 #define WM8962_VSS_XLA_1 0x520A
1032 #define WM8962_VSS_XLA_0 0x520B
1033 #define WM8962_VSS_XLB_1 0x520C
1034 #define WM8962_VSS_XLB_0 0x520D
1035 #define WM8962_VSS_XLG_1 0x520E
1036 #define WM8962_VSS_XLG_0 0x520F
1037 #define WM8962_VSS_PG2_1 0x5210
1038 #define WM8962_VSS_PG2_0 0x5211
1039 #define WM8962_VSS_PG_1 0x5212
1040 #define WM8962_VSS_PG_0 0x5213
1041 #define WM8962_VSS_XTD1_1 0x5214
1042 #define WM8962_VSS_XTD1_0 0x5215
1043 #define WM8962_VSS_XTD2_1 0x5216
1044 #define WM8962_VSS_XTD2_0 0x5217
1045 #define WM8962_VSS_XTD3_1 0x5218
1046 #define WM8962_VSS_XTD3_0 0x5219
1047 #define WM8962_VSS_XTD4_1 0x521A
1048 #define WM8962_VSS_XTD4_0 0x521B
1049 #define WM8962_VSS_XTD5_1 0x521C
1050 #define WM8962_VSS_XTD5_0 0x521D
1051 #define WM8962_VSS_XTD6_1 0x521E
1052 #define WM8962_VSS_XTD6_0 0x521F
1053 #define WM8962_VSS_XTD7_1 0x5220
1054 #define WM8962_VSS_XTD7_0 0x5221
1055 #define WM8962_VSS_XTD8_1 0x5222
1056 #define WM8962_VSS_XTD8_0 0x5223
1057 #define WM8962_VSS_XTD9_1 0x5224
1058 #define WM8962_VSS_XTD9_0 0x5225
1059 #define WM8962_VSS_XTD10_1 0x5226
1060 #define WM8962_VSS_XTD10_0 0x5227
1061 #define WM8962_VSS_XTD11_1 0x5228
1062 #define WM8962_VSS_XTD11_0 0x5229
1063 #define WM8962_VSS_XTD12_1 0x522A
1064 #define WM8962_VSS_XTD12_0 0x522B
1065 #define WM8962_VSS_XTD13_1 0x522C
1066 #define WM8962_VSS_XTD13_0 0x522D
1067 #define WM8962_VSS_XTD14_1 0x522E
1068 #define WM8962_VSS_XTD14_0 0x522F
1069 #define WM8962_VSS_XTD15_1 0x5230
1070 #define WM8962_VSS_XTD15_0 0x5231
1071 #define WM8962_VSS_XTD16_1 0x5232
1072 #define WM8962_VSS_XTD16_0 0x5233
1073 #define WM8962_VSS_XTD17_1 0x5234
1074 #define WM8962_VSS_XTD17_0 0x5235
1075 #define WM8962_VSS_XTD18_1 0x5236
1076 #define WM8962_VSS_XTD18_0 0x5237
1077 #define WM8962_VSS_XTD19_1 0x5238
1078 #define WM8962_VSS_XTD19_0 0x5239
1079 #define WM8962_VSS_XTD20_1 0x523A
1080 #define WM8962_VSS_XTD20_0 0x523B
1081 #define WM8962_VSS_XTD21_1 0x523C
1082 #define WM8962_VSS_XTD21_0 0x523D
1083 #define WM8962_VSS_XTD22_1 0x523E
1084 #define WM8962_VSS_XTD22_0 0x523F
1085 #define WM8962_VSS_XTD23_1 0x5240
1086 #define WM8962_VSS_XTD23_0 0x5241
1087 #define WM8962_VSS_XTD24_1 0x5242
1088 #define WM8962_VSS_XTD24_0 0x5243
1089 #define WM8962_VSS_XTD25_1 0x5244
1090 #define WM8962_VSS_XTD25_0 0x5245
1091 #define WM8962_VSS_XTD26_1 0x5246
1092 #define WM8962_VSS_XTD26_0 0x5247
1093 #define WM8962_VSS_XTD27_1 0x5248
1094 #define WM8962_VSS_XTD27_0 0x5249
1095 #define WM8962_VSS_XTD28_1 0x524A
1096 #define WM8962_VSS_XTD28_0 0x524B
1097 #define WM8962_VSS_XTD29_1 0x524C
1098 #define WM8962_VSS_XTD29_0 0x524D
1099 #define WM8962_VSS_XTD30_1 0x524E
1100 #define WM8962_VSS_XTD30_0 0x524F
1101 #define WM8962_VSS_XTD31_1 0x5250
1102 #define WM8962_VSS_XTD31_0 0x5251
1103 #define WM8962_VSS_XTD32_1 0x5252
1104 #define WM8962_VSS_XTD32_0 0x5253
1105 #define WM8962_VSS_XTS1_1 0x5254
1106 #define WM8962_VSS_XTS1_0 0x5255
1107 #define WM8962_VSS_XTS2_1 0x5256
1108 #define WM8962_VSS_XTS2_0 0x5257
1109 #define WM8962_VSS_XTS3_1 0x5258
1110 #define WM8962_VSS_XTS3_0 0x5259
1111 #define WM8962_VSS_XTS4_1 0x525A
1112 #define WM8962_VSS_XTS4_0 0x525B
1113 #define WM8962_VSS_XTS5_1 0x525C
1114 #define WM8962_VSS_XTS5_0 0x525D
1115 #define WM8962_VSS_XTS6_1 0x525E
1116 #define WM8962_VSS_XTS6_0 0x525F
1117 #define WM8962_VSS_XTS7_1 0x5260
1118 #define WM8962_VSS_XTS7_0 0x5261
1119 #define WM8962_VSS_XTS8_1 0x5262
1120 #define WM8962_VSS_XTS8_0 0x5263
1121 #define WM8962_VSS_XTS9_1 0x5264
1122 #define WM8962_VSS_XTS9_0 0x5265
1123 #define WM8962_VSS_XTS10_1 0x5266
1124 #define WM8962_VSS_XTS10_0 0x5267
1125 #define WM8962_VSS_XTS11_1 0x5268
1126 #define WM8962_VSS_XTS11_0 0x5269
1127 #define WM8962_VSS_XTS12_1 0x526A
1128 #define WM8962_VSS_XTS12_0 0x526B
1129 #define WM8962_VSS_XTS13_1 0x526C
1130 #define WM8962_VSS_XTS13_0 0x526D
1131 #define WM8962_VSS_XTS14_1 0x526E
1132 #define WM8962_VSS_XTS14_0 0x526F
1133 #define WM8962_VSS_XTS15_1 0x5270
1134 #define WM8962_VSS_XTS15_0 0x5271
1135 #define WM8962_VSS_XTS16_1 0x5272
1136 #define WM8962_VSS_XTS16_0 0x5273
1137 #define WM8962_VSS_XTS17_1 0x5274
1138 #define WM8962_VSS_XTS17_0 0x5275
1139 #define WM8962_VSS_XTS18_1 0x5276
1140 #define WM8962_VSS_XTS18_0 0x5277
1141 #define WM8962_VSS_XTS19_1 0x5278
1142 #define WM8962_VSS_XTS19_0 0x5279
1143 #define WM8962_VSS_XTS20_1 0x527A
1144 #define WM8962_VSS_XTS20_0 0x527B
1145 #define WM8962_VSS_XTS21_1 0x527C
1146 #define WM8962_VSS_XTS21_0 0x527D
1147 #define WM8962_VSS_XTS22_1 0x527E
1148 #define WM8962_VSS_XTS22_0 0x527F
1149 #define WM8962_VSS_XTS23_1 0x5280
1150 #define WM8962_VSS_XTS23_0 0x5281
1151 #define WM8962_VSS_XTS24_1 0x5282
1152 #define WM8962_VSS_XTS24_0 0x5283
1153 #define WM8962_VSS_XTS25_1 0x5284
1154 #define WM8962_VSS_XTS25_0 0x5285
1155 #define WM8962_VSS_XTS26_1 0x5286
1156 #define WM8962_VSS_XTS26_0 0x5287
1157 #define WM8962_VSS_XTS27_1 0x5288
1158 #define WM8962_VSS_XTS27_0 0x5289
1159 #define WM8962_VSS_XTS28_1 0x528A
1160 #define WM8962_VSS_XTS28_0 0x528B
1161 #define WM8962_VSS_XTS29_1 0x528C
1162 #define WM8962_VSS_XTS29_0 0x528D
1163 #define WM8962_VSS_XTS30_1 0x528E
1164 #define WM8962_VSS_XTS30_0 0x528F
1165 #define WM8962_VSS_XTS31_1 0x5290
1166 #define WM8962_VSS_XTS31_0 0x5291
1167 #define WM8962_VSS_XTS32_1 0x5292
1168 #define WM8962_VSS_XTS32_0 0x5293
1169
1170 #define WM8962_REGISTER_COUNT 1138
1171 #define WM8962_MAX_REGISTER 0x5293
1172
1173
1174
1175
1176
1177
1178
1179
1180 #define WM8962_IN_VU 0x0100
1181 #define WM8962_IN_VU_MASK 0x0100
1182 #define WM8962_IN_VU_SHIFT 8
1183 #define WM8962_IN_VU_WIDTH 1
1184 #define WM8962_INPGAL_MUTE 0x0080
1185 #define WM8962_INPGAL_MUTE_MASK 0x0080
1186 #define WM8962_INPGAL_MUTE_SHIFT 7
1187 #define WM8962_INPGAL_MUTE_WIDTH 1
1188 #define WM8962_INL_ZC 0x0040
1189 #define WM8962_INL_ZC_MASK 0x0040
1190 #define WM8962_INL_ZC_SHIFT 6
1191 #define WM8962_INL_ZC_WIDTH 1
1192 #define WM8962_INL_VOL_MASK 0x003F
1193 #define WM8962_INL_VOL_SHIFT 0
1194 #define WM8962_INL_VOL_WIDTH 6
1195
1196
1197
1198
1199 #define WM8962_CUST_ID_MASK 0xF000
1200 #define WM8962_CUST_ID_SHIFT 12
1201 #define WM8962_CUST_ID_WIDTH 4
1202 #define WM8962_CHIP_REV_MASK 0x0E00
1203 #define WM8962_CHIP_REV_SHIFT 9
1204 #define WM8962_CHIP_REV_WIDTH 3
1205 #define WM8962_IN_VU 0x0100
1206 #define WM8962_IN_VU_MASK 0x0100
1207 #define WM8962_IN_VU_SHIFT 8
1208 #define WM8962_IN_VU_WIDTH 1
1209 #define WM8962_INPGAR_MUTE 0x0080
1210 #define WM8962_INPGAR_MUTE_MASK 0x0080
1211 #define WM8962_INPGAR_MUTE_SHIFT 7
1212 #define WM8962_INPGAR_MUTE_WIDTH 1
1213 #define WM8962_INR_ZC 0x0040
1214 #define WM8962_INR_ZC_MASK 0x0040
1215 #define WM8962_INR_ZC_SHIFT 6
1216 #define WM8962_INR_ZC_WIDTH 1
1217 #define WM8962_INR_VOL_MASK 0x003F
1218 #define WM8962_INR_VOL_SHIFT 0
1219 #define WM8962_INR_VOL_WIDTH 6
1220
1221
1222
1223
1224 #define WM8962_HPOUT_VU 0x0100
1225 #define WM8962_HPOUT_VU_MASK 0x0100
1226 #define WM8962_HPOUT_VU_SHIFT 8
1227 #define WM8962_HPOUT_VU_WIDTH 1
1228 #define WM8962_HPOUTL_ZC 0x0080
1229 #define WM8962_HPOUTL_ZC_MASK 0x0080
1230 #define WM8962_HPOUTL_ZC_SHIFT 7
1231 #define WM8962_HPOUTL_ZC_WIDTH 1
1232 #define WM8962_HPOUTL_VOL_MASK 0x007F
1233 #define WM8962_HPOUTL_VOL_SHIFT 0
1234 #define WM8962_HPOUTL_VOL_WIDTH 7
1235
1236
1237
1238
1239 #define WM8962_HPOUT_VU 0x0100
1240 #define WM8962_HPOUT_VU_MASK 0x0100
1241 #define WM8962_HPOUT_VU_SHIFT 8
1242 #define WM8962_HPOUT_VU_WIDTH 1
1243 #define WM8962_HPOUTR_ZC 0x0080
1244 #define WM8962_HPOUTR_ZC_MASK 0x0080
1245 #define WM8962_HPOUTR_ZC_SHIFT 7
1246 #define WM8962_HPOUTR_ZC_WIDTH 1
1247 #define WM8962_HPOUTR_VOL_MASK 0x007F
1248 #define WM8962_HPOUTR_VOL_SHIFT 0
1249 #define WM8962_HPOUTR_VOL_WIDTH 7
1250
1251
1252
1253
1254 #define WM8962_DSPCLK_DIV_MASK 0x0600
1255 #define WM8962_DSPCLK_DIV_SHIFT 9
1256 #define WM8962_DSPCLK_DIV_WIDTH 2
1257 #define WM8962_ADCSYS_CLK_DIV_MASK 0x01C0
1258 #define WM8962_ADCSYS_CLK_DIV_SHIFT 6
1259 #define WM8962_ADCSYS_CLK_DIV_WIDTH 3
1260 #define WM8962_DACSYS_CLK_DIV_MASK 0x0038
1261 #define WM8962_DACSYS_CLK_DIV_SHIFT 3
1262 #define WM8962_DACSYS_CLK_DIV_WIDTH 3
1263 #define WM8962_MCLKDIV_MASK 0x0006
1264 #define WM8962_MCLKDIV_SHIFT 1
1265 #define WM8962_MCLKDIV_WIDTH 2
1266
1267
1268
1269
1270 #define WM8962_ADCR_DAT_INV 0x0040
1271 #define WM8962_ADCR_DAT_INV_MASK 0x0040
1272 #define WM8962_ADCR_DAT_INV_SHIFT 6
1273 #define WM8962_ADCR_DAT_INV_WIDTH 1
1274 #define WM8962_ADCL_DAT_INV 0x0020
1275 #define WM8962_ADCL_DAT_INV_MASK 0x0020
1276 #define WM8962_ADCL_DAT_INV_SHIFT 5
1277 #define WM8962_ADCL_DAT_INV_WIDTH 1
1278 #define WM8962_DAC_MUTE_RAMP 0x0010
1279 #define WM8962_DAC_MUTE_RAMP_MASK 0x0010
1280 #define WM8962_DAC_MUTE_RAMP_SHIFT 4
1281 #define WM8962_DAC_MUTE_RAMP_WIDTH 1
1282 #define WM8962_DAC_MUTE 0x0008
1283 #define WM8962_DAC_MUTE_MASK 0x0008
1284 #define WM8962_DAC_MUTE_SHIFT 3
1285 #define WM8962_DAC_MUTE_WIDTH 1
1286 #define WM8962_DAC_DEEMP_MASK 0x0006
1287 #define WM8962_DAC_DEEMP_SHIFT 1
1288 #define WM8962_DAC_DEEMP_WIDTH 2
1289 #define WM8962_ADC_HPF_DIS 0x0001
1290 #define WM8962_ADC_HPF_DIS_MASK 0x0001
1291 #define WM8962_ADC_HPF_DIS_SHIFT 0
1292 #define WM8962_ADC_HPF_DIS_WIDTH 1
1293
1294
1295
1296
1297 #define WM8962_ADC_HPF_SR_MASK 0x3000
1298 #define WM8962_ADC_HPF_SR_SHIFT 12
1299 #define WM8962_ADC_HPF_SR_WIDTH 2
1300 #define WM8962_ADC_HPF_MODE 0x0400
1301 #define WM8962_ADC_HPF_MODE_MASK 0x0400
1302 #define WM8962_ADC_HPF_MODE_SHIFT 10
1303 #define WM8962_ADC_HPF_MODE_WIDTH 1
1304 #define WM8962_ADC_HPF_CUT_MASK 0x0380
1305 #define WM8962_ADC_HPF_CUT_SHIFT 7
1306 #define WM8962_ADC_HPF_CUT_WIDTH 3
1307 #define WM8962_DACR_DAT_INV 0x0040
1308 #define WM8962_DACR_DAT_INV_MASK 0x0040
1309 #define WM8962_DACR_DAT_INV_SHIFT 6
1310 #define WM8962_DACR_DAT_INV_WIDTH 1
1311 #define WM8962_DACL_DAT_INV 0x0020
1312 #define WM8962_DACL_DAT_INV_MASK 0x0020
1313 #define WM8962_DACL_DAT_INV_SHIFT 5
1314 #define WM8962_DACL_DAT_INV_WIDTH 1
1315 #define WM8962_DAC_UNMUTE_RAMP 0x0008
1316 #define WM8962_DAC_UNMUTE_RAMP_MASK 0x0008
1317 #define WM8962_DAC_UNMUTE_RAMP_SHIFT 3
1318 #define WM8962_DAC_UNMUTE_RAMP_WIDTH 1
1319 #define WM8962_DAC_MUTERATE 0x0004
1320 #define WM8962_DAC_MUTERATE_MASK 0x0004
1321 #define WM8962_DAC_MUTERATE_SHIFT 2
1322 #define WM8962_DAC_MUTERATE_WIDTH 1
1323 #define WM8962_DAC_HP 0x0001
1324 #define WM8962_DAC_HP_MASK 0x0001
1325 #define WM8962_DAC_HP_SHIFT 0
1326 #define WM8962_DAC_HP_WIDTH 1
1327
1328
1329
1330
1331 #define WM8962_AIFDAC_TDM_MODE 0x1000
1332 #define WM8962_AIFDAC_TDM_MODE_MASK 0x1000
1333 #define WM8962_AIFDAC_TDM_MODE_SHIFT 12
1334 #define WM8962_AIFDAC_TDM_MODE_WIDTH 1
1335 #define WM8962_AIFDAC_TDM_SLOT 0x0800
1336 #define WM8962_AIFDAC_TDM_SLOT_MASK 0x0800
1337 #define WM8962_AIFDAC_TDM_SLOT_SHIFT 11
1338 #define WM8962_AIFDAC_TDM_SLOT_WIDTH 1
1339 #define WM8962_AIFADC_TDM_MODE 0x0400
1340 #define WM8962_AIFADC_TDM_MODE_MASK 0x0400
1341 #define WM8962_AIFADC_TDM_MODE_SHIFT 10
1342 #define WM8962_AIFADC_TDM_MODE_WIDTH 1
1343 #define WM8962_AIFADC_TDM_SLOT 0x0200
1344 #define WM8962_AIFADC_TDM_SLOT_MASK 0x0200
1345 #define WM8962_AIFADC_TDM_SLOT_SHIFT 9
1346 #define WM8962_AIFADC_TDM_SLOT_WIDTH 1
1347 #define WM8962_ADC_LRSWAP 0x0100
1348 #define WM8962_ADC_LRSWAP_MASK 0x0100
1349 #define WM8962_ADC_LRSWAP_SHIFT 8
1350 #define WM8962_ADC_LRSWAP_WIDTH 1
1351 #define WM8962_BCLK_INV 0x0080
1352 #define WM8962_BCLK_INV_MASK 0x0080
1353 #define WM8962_BCLK_INV_SHIFT 7
1354 #define WM8962_BCLK_INV_WIDTH 1
1355 #define WM8962_MSTR 0x0040
1356 #define WM8962_MSTR_MASK 0x0040
1357 #define WM8962_MSTR_SHIFT 6
1358 #define WM8962_MSTR_WIDTH 1
1359 #define WM8962_DAC_LRSWAP 0x0020
1360 #define WM8962_DAC_LRSWAP_MASK 0x0020
1361 #define WM8962_DAC_LRSWAP_SHIFT 5
1362 #define WM8962_DAC_LRSWAP_WIDTH 1
1363 #define WM8962_LRCLK_INV 0x0010
1364 #define WM8962_LRCLK_INV_MASK 0x0010
1365 #define WM8962_LRCLK_INV_SHIFT 4
1366 #define WM8962_LRCLK_INV_WIDTH 1
1367 #define WM8962_WL_MASK 0x000C
1368 #define WM8962_WL_SHIFT 2
1369 #define WM8962_WL_WIDTH 2
1370 #define WM8962_FMT_MASK 0x0003
1371 #define WM8962_FMT_SHIFT 0
1372 #define WM8962_FMT_WIDTH 2
1373
1374
1375
1376
1377 #define WM8962_CLKREG_OVD 0x0800
1378 #define WM8962_CLKREG_OVD_MASK 0x0800
1379 #define WM8962_CLKREG_OVD_SHIFT 11
1380 #define WM8962_CLKREG_OVD_WIDTH 1
1381 #define WM8962_SYSCLK_SRC_MASK 0x0600
1382 #define WM8962_SYSCLK_SRC_SHIFT 9
1383 #define WM8962_SYSCLK_SRC_WIDTH 2
1384 #define WM8962_CLASSD_CLK_DIV_MASK 0x01C0
1385 #define WM8962_CLASSD_CLK_DIV_SHIFT 6
1386 #define WM8962_CLASSD_CLK_DIV_WIDTH 3
1387 #define WM8962_SYSCLK_ENA 0x0020
1388 #define WM8962_SYSCLK_ENA_MASK 0x0020
1389 #define WM8962_SYSCLK_ENA_SHIFT 5
1390 #define WM8962_SYSCLK_ENA_WIDTH 1
1391 #define WM8962_BCLK_DIV_MASK 0x000F
1392 #define WM8962_BCLK_DIV_SHIFT 0
1393 #define WM8962_BCLK_DIV_WIDTH 4
1394
1395
1396
1397
1398 #define WM8962_AUTOMUTE_STS 0x0800
1399 #define WM8962_AUTOMUTE_STS_MASK 0x0800
1400 #define WM8962_AUTOMUTE_STS_SHIFT 11
1401 #define WM8962_AUTOMUTE_STS_WIDTH 1
1402 #define WM8962_DAC_AUTOMUTE_SAMPLES_MASK 0x0300
1403 #define WM8962_DAC_AUTOMUTE_SAMPLES_SHIFT 8
1404 #define WM8962_DAC_AUTOMUTE_SAMPLES_WIDTH 2
1405 #define WM8962_DAC_AUTOMUTE 0x0080
1406 #define WM8962_DAC_AUTOMUTE_MASK 0x0080
1407 #define WM8962_DAC_AUTOMUTE_SHIFT 7
1408 #define WM8962_DAC_AUTOMUTE_WIDTH 1
1409 #define WM8962_DAC_COMP 0x0010
1410 #define WM8962_DAC_COMP_MASK 0x0010
1411 #define WM8962_DAC_COMP_SHIFT 4
1412 #define WM8962_DAC_COMP_WIDTH 1
1413 #define WM8962_DAC_COMPMODE 0x0008
1414 #define WM8962_DAC_COMPMODE_MASK 0x0008
1415 #define WM8962_DAC_COMPMODE_SHIFT 3
1416 #define WM8962_DAC_COMPMODE_WIDTH 1
1417 #define WM8962_ADC_COMP 0x0004
1418 #define WM8962_ADC_COMP_MASK 0x0004
1419 #define WM8962_ADC_COMP_SHIFT 2
1420 #define WM8962_ADC_COMP_WIDTH 1
1421 #define WM8962_ADC_COMPMODE 0x0002
1422 #define WM8962_ADC_COMPMODE_MASK 0x0002
1423 #define WM8962_ADC_COMPMODE_SHIFT 1
1424 #define WM8962_ADC_COMPMODE_WIDTH 1
1425 #define WM8962_LOOPBACK 0x0001
1426 #define WM8962_LOOPBACK_MASK 0x0001
1427 #define WM8962_LOOPBACK_SHIFT 0
1428 #define WM8962_LOOPBACK_WIDTH 1
1429
1430
1431
1432
1433 #define WM8962_DAC_VU 0x0100
1434 #define WM8962_DAC_VU_MASK 0x0100
1435 #define WM8962_DAC_VU_SHIFT 8
1436 #define WM8962_DAC_VU_WIDTH 1
1437 #define WM8962_DACL_VOL_MASK 0x00FF
1438 #define WM8962_DACL_VOL_SHIFT 0
1439 #define WM8962_DACL_VOL_WIDTH 8
1440
1441
1442
1443
1444 #define WM8962_DAC_VU 0x0100
1445 #define WM8962_DAC_VU_MASK 0x0100
1446 #define WM8962_DAC_VU_SHIFT 8
1447 #define WM8962_DAC_VU_WIDTH 1
1448 #define WM8962_DACR_VOL_MASK 0x00FF
1449 #define WM8962_DACR_VOL_SHIFT 0
1450 #define WM8962_DACR_VOL_WIDTH 8
1451
1452
1453
1454
1455 #define WM8962_AIF_RATE_MASK 0x07FF
1456 #define WM8962_AIF_RATE_SHIFT 0
1457 #define WM8962_AIF_RATE_WIDTH 11
1458
1459
1460
1461
1462 #define WM8962_SW_RESET_MASK 0xFFFF
1463 #define WM8962_SW_RESET_SHIFT 0
1464 #define WM8962_SW_RESET_WIDTH 16
1465
1466
1467
1468
1469 #define WM8962_ALC_INACTIVE_ENA 0x0400
1470 #define WM8962_ALC_INACTIVE_ENA_MASK 0x0400
1471 #define WM8962_ALC_INACTIVE_ENA_SHIFT 10
1472 #define WM8962_ALC_INACTIVE_ENA_WIDTH 1
1473 #define WM8962_ALC_LVL_MODE 0x0200
1474 #define WM8962_ALC_LVL_MODE_MASK 0x0200
1475 #define WM8962_ALC_LVL_MODE_SHIFT 9
1476 #define WM8962_ALC_LVL_MODE_WIDTH 1
1477 #define WM8962_ALCL_ENA 0x0100
1478 #define WM8962_ALCL_ENA_MASK 0x0100
1479 #define WM8962_ALCL_ENA_SHIFT 8
1480 #define WM8962_ALCL_ENA_WIDTH 1
1481 #define WM8962_ALCR_ENA 0x0080
1482 #define WM8962_ALCR_ENA_MASK 0x0080
1483 #define WM8962_ALCR_ENA_SHIFT 7
1484 #define WM8962_ALCR_ENA_WIDTH 1
1485 #define WM8962_ALC_MAXGAIN_MASK 0x0070
1486 #define WM8962_ALC_MAXGAIN_SHIFT 4
1487 #define WM8962_ALC_MAXGAIN_WIDTH 3
1488 #define WM8962_ALC_LVL_MASK 0x000F
1489 #define WM8962_ALC_LVL_SHIFT 0
1490 #define WM8962_ALC_LVL_WIDTH 4
1491
1492
1493
1494
1495 #define WM8962_ALC_LOCK_STS 0x8000
1496 #define WM8962_ALC_LOCK_STS_MASK 0x8000
1497 #define WM8962_ALC_LOCK_STS_SHIFT 15
1498 #define WM8962_ALC_LOCK_STS_WIDTH 1
1499 #define WM8962_ALC_THRESH_STS 0x4000
1500 #define WM8962_ALC_THRESH_STS_MASK 0x4000
1501 #define WM8962_ALC_THRESH_STS_SHIFT 14
1502 #define WM8962_ALC_THRESH_STS_WIDTH 1
1503 #define WM8962_ALC_SAT_STS 0x2000
1504 #define WM8962_ALC_SAT_STS_MASK 0x2000
1505 #define WM8962_ALC_SAT_STS_SHIFT 13
1506 #define WM8962_ALC_SAT_STS_WIDTH 1
1507 #define WM8962_ALC_PKOVR_STS 0x1000
1508 #define WM8962_ALC_PKOVR_STS_MASK 0x1000
1509 #define WM8962_ALC_PKOVR_STS_SHIFT 12
1510 #define WM8962_ALC_PKOVR_STS_WIDTH 1
1511 #define WM8962_ALC_NGATE_STS 0x0800
1512 #define WM8962_ALC_NGATE_STS_MASK 0x0800
1513 #define WM8962_ALC_NGATE_STS_SHIFT 11
1514 #define WM8962_ALC_NGATE_STS_WIDTH 1
1515 #define WM8962_ALC_ZC 0x0080
1516 #define WM8962_ALC_ZC_MASK 0x0080
1517 #define WM8962_ALC_ZC_SHIFT 7
1518 #define WM8962_ALC_ZC_WIDTH 1
1519 #define WM8962_ALC_MINGAIN_MASK 0x0070
1520 #define WM8962_ALC_MINGAIN_SHIFT 4
1521 #define WM8962_ALC_MINGAIN_WIDTH 3
1522 #define WM8962_ALC_HLD_MASK 0x000F
1523 #define WM8962_ALC_HLD_SHIFT 0
1524 #define WM8962_ALC_HLD_WIDTH 4
1525
1526
1527
1528
1529 #define WM8962_ALC_NGATE_GAIN_MASK 0x1C00
1530 #define WM8962_ALC_NGATE_GAIN_SHIFT 10
1531 #define WM8962_ALC_NGATE_GAIN_WIDTH 3
1532 #define WM8962_ALC_MODE 0x0100
1533 #define WM8962_ALC_MODE_MASK 0x0100
1534 #define WM8962_ALC_MODE_SHIFT 8
1535 #define WM8962_ALC_MODE_WIDTH 1
1536 #define WM8962_ALC_DCY_MASK 0x00F0
1537 #define WM8962_ALC_DCY_SHIFT 4
1538 #define WM8962_ALC_DCY_WIDTH 4
1539 #define WM8962_ALC_ATK_MASK 0x000F
1540 #define WM8962_ALC_ATK_SHIFT 0
1541 #define WM8962_ALC_ATK_WIDTH 4
1542
1543
1544
1545
1546 #define WM8962_ALC_NGATE_DCY_MASK 0xF000
1547 #define WM8962_ALC_NGATE_DCY_SHIFT 12
1548 #define WM8962_ALC_NGATE_DCY_WIDTH 4
1549 #define WM8962_ALC_NGATE_ATK_MASK 0x0F00
1550 #define WM8962_ALC_NGATE_ATK_SHIFT 8
1551 #define WM8962_ALC_NGATE_ATK_WIDTH 4
1552 #define WM8962_ALC_NGATE_THR_MASK 0x00F8
1553 #define WM8962_ALC_NGATE_THR_SHIFT 3
1554 #define WM8962_ALC_NGATE_THR_WIDTH 5
1555 #define WM8962_ALC_NGATE_MODE_MASK 0x0006
1556 #define WM8962_ALC_NGATE_MODE_SHIFT 1
1557 #define WM8962_ALC_NGATE_MODE_WIDTH 2
1558 #define WM8962_ALC_NGATE_ENA 0x0001
1559 #define WM8962_ALC_NGATE_ENA_MASK 0x0001
1560 #define WM8962_ALC_NGATE_ENA_SHIFT 0
1561 #define WM8962_ALC_NGATE_ENA_WIDTH 1
1562
1563
1564
1565
1566 #define WM8962_ADC_VU 0x0100
1567 #define WM8962_ADC_VU_MASK 0x0100
1568 #define WM8962_ADC_VU_SHIFT 8
1569 #define WM8962_ADC_VU_WIDTH 1
1570 #define WM8962_ADCL_VOL_MASK 0x00FF
1571 #define WM8962_ADCL_VOL_SHIFT 0
1572 #define WM8962_ADCL_VOL_WIDTH 8
1573
1574
1575
1576
1577 #define WM8962_ADC_VU 0x0100
1578 #define WM8962_ADC_VU_MASK 0x0100
1579 #define WM8962_ADC_VU_SHIFT 8
1580 #define WM8962_ADC_VU_WIDTH 1
1581 #define WM8962_ADCR_VOL_MASK 0x00FF
1582 #define WM8962_ADCR_VOL_SHIFT 0
1583 #define WM8962_ADCR_VOL_WIDTH 8
1584
1585
1586
1587
1588 #define WM8962_THERR_ACT 0x0100
1589 #define WM8962_THERR_ACT_MASK 0x0100
1590 #define WM8962_THERR_ACT_SHIFT 8
1591 #define WM8962_THERR_ACT_WIDTH 1
1592 #define WM8962_ADC_BIAS 0x0040
1593 #define WM8962_ADC_BIAS_MASK 0x0040
1594 #define WM8962_ADC_BIAS_SHIFT 6
1595 #define WM8962_ADC_BIAS_WIDTH 1
1596 #define WM8962_ADC_HP 0x0020
1597 #define WM8962_ADC_HP_MASK 0x0020
1598 #define WM8962_ADC_HP_SHIFT 5
1599 #define WM8962_ADC_HP_WIDTH 1
1600 #define WM8962_TOCLK_ENA 0x0001
1601 #define WM8962_TOCLK_ENA_MASK 0x0001
1602 #define WM8962_TOCLK_ENA_SHIFT 0
1603 #define WM8962_TOCLK_ENA_WIDTH 1
1604
1605
1606
1607
1608 #define WM8962_AIF_TRI 0x0008
1609 #define WM8962_AIF_TRI_MASK 0x0008
1610 #define WM8962_AIF_TRI_SHIFT 3
1611 #define WM8962_AIF_TRI_WIDTH 1
1612
1613
1614
1615
1616 #define WM8962_DMIC_ENA 0x0400
1617 #define WM8962_DMIC_ENA_MASK 0x0400
1618 #define WM8962_DMIC_ENA_SHIFT 10
1619 #define WM8962_DMIC_ENA_WIDTH 1
1620 #define WM8962_OPCLK_ENA 0x0200
1621 #define WM8962_OPCLK_ENA_MASK 0x0200
1622 #define WM8962_OPCLK_ENA_SHIFT 9
1623 #define WM8962_OPCLK_ENA_WIDTH 1
1624 #define WM8962_VMID_SEL_MASK 0x0180
1625 #define WM8962_VMID_SEL_SHIFT 7
1626 #define WM8962_VMID_SEL_WIDTH 2
1627 #define WM8962_BIAS_ENA 0x0040
1628 #define WM8962_BIAS_ENA_MASK 0x0040
1629 #define WM8962_BIAS_ENA_SHIFT 6
1630 #define WM8962_BIAS_ENA_WIDTH 1
1631 #define WM8962_INL_ENA 0x0020
1632 #define WM8962_INL_ENA_MASK 0x0020
1633 #define WM8962_INL_ENA_SHIFT 5
1634 #define WM8962_INL_ENA_WIDTH 1
1635 #define WM8962_INR_ENA 0x0010
1636 #define WM8962_INR_ENA_MASK 0x0010
1637 #define WM8962_INR_ENA_SHIFT 4
1638 #define WM8962_INR_ENA_WIDTH 1
1639 #define WM8962_ADCL_ENA 0x0008
1640 #define WM8962_ADCL_ENA_MASK 0x0008
1641 #define WM8962_ADCL_ENA_SHIFT 3
1642 #define WM8962_ADCL_ENA_WIDTH 1
1643 #define WM8962_ADCR_ENA 0x0004
1644 #define WM8962_ADCR_ENA_MASK 0x0004
1645 #define WM8962_ADCR_ENA_SHIFT 2
1646 #define WM8962_ADCR_ENA_WIDTH 1
1647 #define WM8962_MICBIAS_ENA 0x0002
1648 #define WM8962_MICBIAS_ENA_MASK 0x0002
1649 #define WM8962_MICBIAS_ENA_SHIFT 1
1650 #define WM8962_MICBIAS_ENA_WIDTH 1
1651
1652
1653
1654
1655 #define WM8962_DACL_ENA 0x0100
1656 #define WM8962_DACL_ENA_MASK 0x0100
1657 #define WM8962_DACL_ENA_SHIFT 8
1658 #define WM8962_DACL_ENA_WIDTH 1
1659 #define WM8962_DACR_ENA 0x0080
1660 #define WM8962_DACR_ENA_MASK 0x0080
1661 #define WM8962_DACR_ENA_SHIFT 7
1662 #define WM8962_DACR_ENA_WIDTH 1
1663 #define WM8962_HPOUTL_PGA_ENA 0x0040
1664 #define WM8962_HPOUTL_PGA_ENA_MASK 0x0040
1665 #define WM8962_HPOUTL_PGA_ENA_SHIFT 6
1666 #define WM8962_HPOUTL_PGA_ENA_WIDTH 1
1667 #define WM8962_HPOUTR_PGA_ENA 0x0020
1668 #define WM8962_HPOUTR_PGA_ENA_MASK 0x0020
1669 #define WM8962_HPOUTR_PGA_ENA_SHIFT 5
1670 #define WM8962_HPOUTR_PGA_ENA_WIDTH 1
1671 #define WM8962_SPKOUTL_PGA_ENA 0x0010
1672 #define WM8962_SPKOUTL_PGA_ENA_MASK 0x0010
1673 #define WM8962_SPKOUTL_PGA_ENA_SHIFT 4
1674 #define WM8962_SPKOUTL_PGA_ENA_WIDTH 1
1675 #define WM8962_SPKOUTR_PGA_ENA 0x0008
1676 #define WM8962_SPKOUTR_PGA_ENA_MASK 0x0008
1677 #define WM8962_SPKOUTR_PGA_ENA_SHIFT 3
1678 #define WM8962_SPKOUTR_PGA_ENA_WIDTH 1
1679 #define WM8962_HPOUTL_PGA_MUTE 0x0002
1680 #define WM8962_HPOUTL_PGA_MUTE_MASK 0x0002
1681 #define WM8962_HPOUTL_PGA_MUTE_SHIFT 1
1682 #define WM8962_HPOUTL_PGA_MUTE_WIDTH 1
1683 #define WM8962_HPOUTR_PGA_MUTE 0x0001
1684 #define WM8962_HPOUTR_PGA_MUTE_MASK 0x0001
1685 #define WM8962_HPOUTR_PGA_MUTE_SHIFT 0
1686 #define WM8962_HPOUTR_PGA_MUTE_WIDTH 1
1687
1688
1689
1690
1691 #define WM8962_SAMPLE_RATE_INT_MODE 0x0010
1692 #define WM8962_SAMPLE_RATE_INT_MODE_MASK 0x0010
1693 #define WM8962_SAMPLE_RATE_INT_MODE_SHIFT 4
1694 #define WM8962_SAMPLE_RATE_INT_MODE_WIDTH 1
1695 #define WM8962_SAMPLE_RATE_MASK 0x0007
1696 #define WM8962_SAMPLE_RATE_SHIFT 0
1697 #define WM8962_SAMPLE_RATE_WIDTH 3
1698
1699
1700
1701
1702 #define WM8962_STARTUP_BIAS_ENA 0x0010
1703 #define WM8962_STARTUP_BIAS_ENA_MASK 0x0010
1704 #define WM8962_STARTUP_BIAS_ENA_SHIFT 4
1705 #define WM8962_STARTUP_BIAS_ENA_WIDTH 1
1706 #define WM8962_VMID_BUF_ENA 0x0008
1707 #define WM8962_VMID_BUF_ENA_MASK 0x0008
1708 #define WM8962_VMID_BUF_ENA_SHIFT 3
1709 #define WM8962_VMID_BUF_ENA_WIDTH 1
1710 #define WM8962_VMID_RAMP 0x0004
1711 #define WM8962_VMID_RAMP_MASK 0x0004
1712 #define WM8962_VMID_RAMP_SHIFT 2
1713 #define WM8962_VMID_RAMP_WIDTH 1
1714
1715
1716
1717
1718 #define WM8962_DBCLK_DIV_MASK 0xE000
1719 #define WM8962_DBCLK_DIV_SHIFT 13
1720 #define WM8962_DBCLK_DIV_WIDTH 3
1721 #define WM8962_OPCLK_DIV_MASK 0x1C00
1722 #define WM8962_OPCLK_DIV_SHIFT 10
1723 #define WM8962_OPCLK_DIV_WIDTH 3
1724 #define WM8962_TOCLK_DIV_MASK 0x0380
1725 #define WM8962_TOCLK_DIV_SHIFT 7
1726 #define WM8962_TOCLK_DIV_WIDTH 3
1727 #define WM8962_F256KCLK_DIV_MASK 0x007E
1728 #define WM8962_F256KCLK_DIV_SHIFT 1
1729 #define WM8962_F256KCLK_DIV_WIDTH 6
1730
1731
1732
1733
1734 #define WM8962_MIXINL_MUTE 0x0008
1735 #define WM8962_MIXINL_MUTE_MASK 0x0008
1736 #define WM8962_MIXINL_MUTE_SHIFT 3
1737 #define WM8962_MIXINL_MUTE_WIDTH 1
1738 #define WM8962_MIXINR_MUTE 0x0004
1739 #define WM8962_MIXINR_MUTE_MASK 0x0004
1740 #define WM8962_MIXINR_MUTE_SHIFT 2
1741 #define WM8962_MIXINR_MUTE_WIDTH 1
1742 #define WM8962_MIXINL_ENA 0x0002
1743 #define WM8962_MIXINL_ENA_MASK 0x0002
1744 #define WM8962_MIXINL_ENA_SHIFT 1
1745 #define WM8962_MIXINL_ENA_WIDTH 1
1746 #define WM8962_MIXINR_ENA 0x0001
1747 #define WM8962_MIXINR_ENA_MASK 0x0001
1748 #define WM8962_MIXINR_ENA_SHIFT 0
1749 #define WM8962_MIXINR_ENA_WIDTH 1
1750
1751
1752
1753
1754 #define WM8962_IN2L_MIXINL_VOL_MASK 0x01C0
1755 #define WM8962_IN2L_MIXINL_VOL_SHIFT 6
1756 #define WM8962_IN2L_MIXINL_VOL_WIDTH 3
1757 #define WM8962_INPGAL_MIXINL_VOL_MASK 0x0038
1758 #define WM8962_INPGAL_MIXINL_VOL_SHIFT 3
1759 #define WM8962_INPGAL_MIXINL_VOL_WIDTH 3
1760 #define WM8962_IN3L_MIXINL_VOL_MASK 0x0007
1761 #define WM8962_IN3L_MIXINL_VOL_SHIFT 0
1762 #define WM8962_IN3L_MIXINL_VOL_WIDTH 3
1763
1764
1765
1766
1767 #define WM8962_IN2R_MIXINR_VOL_MASK 0x01C0
1768 #define WM8962_IN2R_MIXINR_VOL_SHIFT 6
1769 #define WM8962_IN2R_MIXINR_VOL_WIDTH 3
1770 #define WM8962_INPGAR_MIXINR_VOL_MASK 0x0038
1771 #define WM8962_INPGAR_MIXINR_VOL_SHIFT 3
1772 #define WM8962_INPGAR_MIXINR_VOL_WIDTH 3
1773 #define WM8962_IN3R_MIXINR_VOL_MASK 0x0007
1774 #define WM8962_IN3R_MIXINR_VOL_SHIFT 0
1775 #define WM8962_IN3R_MIXINR_VOL_WIDTH 3
1776
1777
1778
1779
1780 #define WM8962_IN2L_TO_MIXINL 0x0020
1781 #define WM8962_IN2L_TO_MIXINL_MASK 0x0020
1782 #define WM8962_IN2L_TO_MIXINL_SHIFT 5
1783 #define WM8962_IN2L_TO_MIXINL_WIDTH 1
1784 #define WM8962_IN3L_TO_MIXINL 0x0010
1785 #define WM8962_IN3L_TO_MIXINL_MASK 0x0010
1786 #define WM8962_IN3L_TO_MIXINL_SHIFT 4
1787 #define WM8962_IN3L_TO_MIXINL_WIDTH 1
1788 #define WM8962_INPGAL_TO_MIXINL 0x0008
1789 #define WM8962_INPGAL_TO_MIXINL_MASK 0x0008
1790 #define WM8962_INPGAL_TO_MIXINL_SHIFT 3
1791 #define WM8962_INPGAL_TO_MIXINL_WIDTH 1
1792 #define WM8962_IN2R_TO_MIXINR 0x0004
1793 #define WM8962_IN2R_TO_MIXINR_MASK 0x0004
1794 #define WM8962_IN2R_TO_MIXINR_SHIFT 2
1795 #define WM8962_IN2R_TO_MIXINR_WIDTH 1
1796 #define WM8962_IN3R_TO_MIXINR 0x0002
1797 #define WM8962_IN3R_TO_MIXINR_MASK 0x0002
1798 #define WM8962_IN3R_TO_MIXINR_SHIFT 1
1799 #define WM8962_IN3R_TO_MIXINR_WIDTH 1
1800 #define WM8962_INPGAR_TO_MIXINR 0x0001
1801 #define WM8962_INPGAR_TO_MIXINR_MASK 0x0001
1802 #define WM8962_INPGAR_TO_MIXINR_SHIFT 0
1803 #define WM8962_INPGAR_TO_MIXINR_WIDTH 1
1804
1805
1806
1807
1808 #define WM8962_MIXIN_BIAS_MASK 0x0038
1809 #define WM8962_MIXIN_BIAS_SHIFT 3
1810 #define WM8962_MIXIN_BIAS_WIDTH 3
1811 #define WM8962_INPGA_BIAS_MASK 0x0007
1812 #define WM8962_INPGA_BIAS_SHIFT 0
1813 #define WM8962_INPGA_BIAS_WIDTH 3
1814
1815
1816
1817
1818 #define WM8962_INPGAL_ENA 0x0010
1819 #define WM8962_INPGAL_ENA_MASK 0x0010
1820 #define WM8962_INPGAL_ENA_SHIFT 4
1821 #define WM8962_INPGAL_ENA_WIDTH 1
1822 #define WM8962_IN1L_TO_INPGAL 0x0008
1823 #define WM8962_IN1L_TO_INPGAL_MASK 0x0008
1824 #define WM8962_IN1L_TO_INPGAL_SHIFT 3
1825 #define WM8962_IN1L_TO_INPGAL_WIDTH 1
1826 #define WM8962_IN2L_TO_INPGAL 0x0004
1827 #define WM8962_IN2L_TO_INPGAL_MASK 0x0004
1828 #define WM8962_IN2L_TO_INPGAL_SHIFT 2
1829 #define WM8962_IN2L_TO_INPGAL_WIDTH 1
1830 #define WM8962_IN3L_TO_INPGAL 0x0002
1831 #define WM8962_IN3L_TO_INPGAL_MASK 0x0002
1832 #define WM8962_IN3L_TO_INPGAL_SHIFT 1
1833 #define WM8962_IN3L_TO_INPGAL_WIDTH 1
1834 #define WM8962_IN4L_TO_INPGAL 0x0001
1835 #define WM8962_IN4L_TO_INPGAL_MASK 0x0001
1836 #define WM8962_IN4L_TO_INPGAL_SHIFT 0
1837 #define WM8962_IN4L_TO_INPGAL_WIDTH 1
1838
1839
1840
1841
1842 #define WM8962_INPGAR_ENA 0x0010
1843 #define WM8962_INPGAR_ENA_MASK 0x0010
1844 #define WM8962_INPGAR_ENA_SHIFT 4
1845 #define WM8962_INPGAR_ENA_WIDTH 1
1846 #define WM8962_IN1R_TO_INPGAR 0x0008
1847 #define WM8962_IN1R_TO_INPGAR_MASK 0x0008
1848 #define WM8962_IN1R_TO_INPGAR_SHIFT 3
1849 #define WM8962_IN1R_TO_INPGAR_WIDTH 1
1850 #define WM8962_IN2R_TO_INPGAR 0x0004
1851 #define WM8962_IN2R_TO_INPGAR_MASK 0x0004
1852 #define WM8962_IN2R_TO_INPGAR_SHIFT 2
1853 #define WM8962_IN2R_TO_INPGAR_WIDTH 1
1854 #define WM8962_IN3R_TO_INPGAR 0x0002
1855 #define WM8962_IN3R_TO_INPGAR_MASK 0x0002
1856 #define WM8962_IN3R_TO_INPGAR_SHIFT 1
1857 #define WM8962_IN3R_TO_INPGAR_WIDTH 1
1858 #define WM8962_IN4R_TO_INPGAR 0x0001
1859 #define WM8962_IN4R_TO_INPGAR_MASK 0x0001
1860 #define WM8962_IN4R_TO_INPGAR_SHIFT 0
1861 #define WM8962_IN4R_TO_INPGAR_WIDTH 1
1862
1863
1864
1865
1866 #define WM8962_SPKOUT_VU 0x0100
1867 #define WM8962_SPKOUT_VU_MASK 0x0100
1868 #define WM8962_SPKOUT_VU_SHIFT 8
1869 #define WM8962_SPKOUT_VU_WIDTH 1
1870 #define WM8962_SPKOUTL_ZC 0x0080
1871 #define WM8962_SPKOUTL_ZC_MASK 0x0080
1872 #define WM8962_SPKOUTL_ZC_SHIFT 7
1873 #define WM8962_SPKOUTL_ZC_WIDTH 1
1874 #define WM8962_SPKOUTL_VOL_MASK 0x007F
1875 #define WM8962_SPKOUTL_VOL_SHIFT 0
1876 #define WM8962_SPKOUTL_VOL_WIDTH 7
1877
1878
1879
1880
1881 #define WM8962_SPKOUTR_ZC 0x0080
1882 #define WM8962_SPKOUTR_ZC_MASK 0x0080
1883 #define WM8962_SPKOUTR_ZC_SHIFT 7
1884 #define WM8962_SPKOUTR_ZC_WIDTH 1
1885 #define WM8962_SPKOUTR_VOL_MASK 0x007F
1886 #define WM8962_SPKOUTR_VOL_SHIFT 0
1887 #define WM8962_SPKOUTR_VOL_WIDTH 7
1888
1889
1890
1891
1892 #define WM8962_TEMP_ERR_HP 0x0008
1893 #define WM8962_TEMP_ERR_HP_MASK 0x0008
1894 #define WM8962_TEMP_ERR_HP_SHIFT 3
1895 #define WM8962_TEMP_ERR_HP_WIDTH 1
1896 #define WM8962_TEMP_WARN_HP 0x0004
1897 #define WM8962_TEMP_WARN_HP_MASK 0x0004
1898 #define WM8962_TEMP_WARN_HP_SHIFT 2
1899 #define WM8962_TEMP_WARN_HP_WIDTH 1
1900 #define WM8962_TEMP_ERR_SPK 0x0002
1901 #define WM8962_TEMP_ERR_SPK_MASK 0x0002
1902 #define WM8962_TEMP_ERR_SPK_SHIFT 1
1903 #define WM8962_TEMP_ERR_SPK_WIDTH 1
1904 #define WM8962_TEMP_WARN_SPK 0x0001
1905 #define WM8962_TEMP_WARN_SPK_MASK 0x0001
1906 #define WM8962_TEMP_WARN_SPK_SHIFT 0
1907 #define WM8962_TEMP_WARN_SPK_WIDTH 1
1908
1909
1910
1911
1912 #define WM8962_MICDET_THR_MASK 0x7000
1913 #define WM8962_MICDET_THR_SHIFT 12
1914 #define WM8962_MICDET_THR_WIDTH 3
1915 #define WM8962_MICSHORT_THR_MASK 0x0C00
1916 #define WM8962_MICSHORT_THR_SHIFT 10
1917 #define WM8962_MICSHORT_THR_WIDTH 2
1918 #define WM8962_MICDET_ENA 0x0200
1919 #define WM8962_MICDET_ENA_MASK 0x0200
1920 #define WM8962_MICDET_ENA_SHIFT 9
1921 #define WM8962_MICDET_ENA_WIDTH 1
1922 #define WM8962_MICDET_STS 0x0080
1923 #define WM8962_MICDET_STS_MASK 0x0080
1924 #define WM8962_MICDET_STS_SHIFT 7
1925 #define WM8962_MICDET_STS_WIDTH 1
1926 #define WM8962_MICSHORT_STS 0x0040
1927 #define WM8962_MICSHORT_STS_MASK 0x0040
1928 #define WM8962_MICSHORT_STS_SHIFT 6
1929 #define WM8962_MICSHORT_STS_WIDTH 1
1930 #define WM8962_TEMP_ENA_HP 0x0004
1931 #define WM8962_TEMP_ENA_HP_MASK 0x0004
1932 #define WM8962_TEMP_ENA_HP_SHIFT 2
1933 #define WM8962_TEMP_ENA_HP_WIDTH 1
1934 #define WM8962_TEMP_ENA_SPK 0x0002
1935 #define WM8962_TEMP_ENA_SPK_MASK 0x0002
1936 #define WM8962_TEMP_ENA_SPK_SHIFT 1
1937 #define WM8962_TEMP_ENA_SPK_WIDTH 1
1938 #define WM8962_MICBIAS_LVL 0x0001
1939 #define WM8962_MICBIAS_LVL_MASK 0x0001
1940 #define WM8962_MICBIAS_LVL_SHIFT 0
1941 #define WM8962_MICBIAS_LVL_WIDTH 1
1942
1943
1944
1945
1946 #define WM8962_SPKOUTR_ENA 0x0080
1947 #define WM8962_SPKOUTR_ENA_MASK 0x0080
1948 #define WM8962_SPKOUTR_ENA_SHIFT 7
1949 #define WM8962_SPKOUTR_ENA_WIDTH 1
1950 #define WM8962_SPKOUTL_ENA 0x0040
1951 #define WM8962_SPKOUTL_ENA_MASK 0x0040
1952 #define WM8962_SPKOUTL_ENA_SHIFT 6
1953 #define WM8962_SPKOUTL_ENA_WIDTH 1
1954 #define WM8962_DAC_MUTE_ALT 0x0010
1955 #define WM8962_DAC_MUTE_ALT_MASK 0x0010
1956 #define WM8962_DAC_MUTE_ALT_SHIFT 4
1957 #define WM8962_DAC_MUTE_ALT_WIDTH 1
1958 #define WM8962_SPKOUTL_PGA_MUTE 0x0002
1959 #define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002
1960 #define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1
1961 #define WM8962_SPKOUTL_PGA_MUTE_WIDTH 1
1962 #define WM8962_SPKOUTR_PGA_MUTE 0x0001
1963 #define WM8962_SPKOUTR_PGA_MUTE_MASK 0x0001
1964 #define WM8962_SPKOUTR_PGA_MUTE_SHIFT 0
1965 #define WM8962_SPKOUTR_PGA_MUTE_WIDTH 1
1966
1967
1968
1969
1970 #define WM8962_SPK_MONO 0x0040
1971 #define WM8962_SPK_MONO_MASK 0x0040
1972 #define WM8962_SPK_MONO_SHIFT 6
1973 #define WM8962_SPK_MONO_WIDTH 1
1974 #define WM8962_CLASSD_VOL_MASK 0x0007
1975 #define WM8962_CLASSD_VOL_SHIFT 0
1976 #define WM8962_CLASSD_VOL_WIDTH 3
1977
1978
1979
1980
1981 #define WM8962_SYSCLK_RATE_MASK 0x001E
1982 #define WM8962_SYSCLK_RATE_SHIFT 1
1983 #define WM8962_SYSCLK_RATE_WIDTH 4
1984
1985
1986
1987
1988 #define WM8962_DAC_MONOMIX 0x0200
1989 #define WM8962_DAC_MONOMIX_MASK 0x0200
1990 #define WM8962_DAC_MONOMIX_SHIFT 9
1991 #define WM8962_DAC_MONOMIX_WIDTH 1
1992 #define WM8962_ADCR_DAC_SVOL_MASK 0x00F0
1993 #define WM8962_ADCR_DAC_SVOL_SHIFT 4
1994 #define WM8962_ADCR_DAC_SVOL_WIDTH 4
1995 #define WM8962_ADC_TO_DACR_MASK 0x000C
1996 #define WM8962_ADC_TO_DACR_SHIFT 2
1997 #define WM8962_ADC_TO_DACR_WIDTH 2
1998
1999
2000
2001
2002 #define WM8962_ADCL_DAC_SVOL_MASK 0x00F0
2003 #define WM8962_ADCL_DAC_SVOL_SHIFT 4
2004 #define WM8962_ADCL_DAC_SVOL_WIDTH 4
2005 #define WM8962_ADC_TO_DACL_MASK 0x000C
2006 #define WM8962_ADC_TO_DACL_SHIFT 2
2007 #define WM8962_ADC_TO_DACL_WIDTH 2
2008
2009
2010
2011
2012 #define WM8962_INL_DCS_ENA 0x0080
2013 #define WM8962_INL_DCS_ENA_MASK 0x0080
2014 #define WM8962_INL_DCS_ENA_SHIFT 7
2015 #define WM8962_INL_DCS_ENA_WIDTH 1
2016 #define WM8962_INL_DCS_STARTUP 0x0040
2017 #define WM8962_INL_DCS_STARTUP_MASK 0x0040
2018 #define WM8962_INL_DCS_STARTUP_SHIFT 6
2019 #define WM8962_INL_DCS_STARTUP_WIDTH 1
2020 #define WM8962_INR_DCS_ENA 0x0008
2021 #define WM8962_INR_DCS_ENA_MASK 0x0008
2022 #define WM8962_INR_DCS_ENA_SHIFT 3
2023 #define WM8962_INR_DCS_ENA_WIDTH 1
2024 #define WM8962_INR_DCS_STARTUP 0x0004
2025 #define WM8962_INR_DCS_STARTUP_MASK 0x0004
2026 #define WM8962_INR_DCS_STARTUP_SHIFT 2
2027 #define WM8962_INR_DCS_STARTUP_WIDTH 1
2028
2029
2030
2031
2032 #define WM8962_HP1L_DCS_ENA 0x0080
2033 #define WM8962_HP1L_DCS_ENA_MASK 0x0080
2034 #define WM8962_HP1L_DCS_ENA_SHIFT 7
2035 #define WM8962_HP1L_DCS_ENA_WIDTH 1
2036 #define WM8962_HP1L_DCS_STARTUP 0x0040
2037 #define WM8962_HP1L_DCS_STARTUP_MASK 0x0040
2038 #define WM8962_HP1L_DCS_STARTUP_SHIFT 6
2039 #define WM8962_HP1L_DCS_STARTUP_WIDTH 1
2040 #define WM8962_HP1L_DCS_SYNC 0x0010
2041 #define WM8962_HP1L_DCS_SYNC_MASK 0x0010
2042 #define WM8962_HP1L_DCS_SYNC_SHIFT 4
2043 #define WM8962_HP1L_DCS_SYNC_WIDTH 1
2044 #define WM8962_HP1R_DCS_ENA 0x0008
2045 #define WM8962_HP1R_DCS_ENA_MASK 0x0008
2046 #define WM8962_HP1R_DCS_ENA_SHIFT 3
2047 #define WM8962_HP1R_DCS_ENA_WIDTH 1
2048 #define WM8962_HP1R_DCS_STARTUP 0x0004
2049 #define WM8962_HP1R_DCS_STARTUP_MASK 0x0004
2050 #define WM8962_HP1R_DCS_STARTUP_SHIFT 2
2051 #define WM8962_HP1R_DCS_STARTUP_WIDTH 1
2052 #define WM8962_HP1R_DCS_SYNC 0x0001
2053 #define WM8962_HP1R_DCS_SYNC_MASK 0x0001
2054 #define WM8962_HP1R_DCS_SYNC_SHIFT 0
2055 #define WM8962_HP1R_DCS_SYNC_WIDTH 1
2056
2057
2058
2059
2060 #define WM8962_HP1_DCS_SYNC_STEPS_MASK 0x3F80
2061 #define WM8962_HP1_DCS_SYNC_STEPS_SHIFT 7
2062 #define WM8962_HP1_DCS_SYNC_STEPS_WIDTH 7
2063
2064
2065
2066
2067 #define WM8962_DCS_STARTUP_DONE_INL 0x0400
2068 #define WM8962_DCS_STARTUP_DONE_INL_MASK 0x0400
2069 #define WM8962_DCS_STARTUP_DONE_INL_SHIFT 10
2070 #define WM8962_DCS_STARTUP_DONE_INL_WIDTH 1
2071 #define WM8962_DCS_STARTUP_DONE_INR 0x0200
2072 #define WM8962_DCS_STARTUP_DONE_INR_MASK 0x0200
2073 #define WM8962_DCS_STARTUP_DONE_INR_SHIFT 9
2074 #define WM8962_DCS_STARTUP_DONE_INR_WIDTH 1
2075 #define WM8962_DCS_STARTUP_DONE_HP1L 0x0100
2076 #define WM8962_DCS_STARTUP_DONE_HP1L_MASK 0x0100
2077 #define WM8962_DCS_STARTUP_DONE_HP1L_SHIFT 8
2078 #define WM8962_DCS_STARTUP_DONE_HP1L_WIDTH 1
2079 #define WM8962_DCS_STARTUP_DONE_HP1R 0x0080
2080 #define WM8962_DCS_STARTUP_DONE_HP1R_MASK 0x0080
2081 #define WM8962_DCS_STARTUP_DONE_HP1R_SHIFT 7
2082 #define WM8962_DCS_STARTUP_DONE_HP1R_WIDTH 1
2083
2084
2085
2086
2087 #define WM8962_HP_PGAS_BIAS_MASK 0x0007
2088 #define WM8962_HP_PGAS_BIAS_SHIFT 0
2089 #define WM8962_HP_PGAS_BIAS_WIDTH 3
2090
2091
2092
2093
2094 #define WM8962_HP1L_RMV_SHORT 0x0080
2095 #define WM8962_HP1L_RMV_SHORT_MASK 0x0080
2096 #define WM8962_HP1L_RMV_SHORT_SHIFT 7
2097 #define WM8962_HP1L_RMV_SHORT_WIDTH 1
2098 #define WM8962_HP1L_ENA_OUTP 0x0040
2099 #define WM8962_HP1L_ENA_OUTP_MASK 0x0040
2100 #define WM8962_HP1L_ENA_OUTP_SHIFT 6
2101 #define WM8962_HP1L_ENA_OUTP_WIDTH 1
2102 #define WM8962_HP1L_ENA_DLY 0x0020
2103 #define WM8962_HP1L_ENA_DLY_MASK 0x0020
2104 #define WM8962_HP1L_ENA_DLY_SHIFT 5
2105 #define WM8962_HP1L_ENA_DLY_WIDTH 1
2106 #define WM8962_HP1L_ENA 0x0010
2107 #define WM8962_HP1L_ENA_MASK 0x0010
2108 #define WM8962_HP1L_ENA_SHIFT 4
2109 #define WM8962_HP1L_ENA_WIDTH 1
2110 #define WM8962_HP1R_RMV_SHORT 0x0008
2111 #define WM8962_HP1R_RMV_SHORT_MASK 0x0008
2112 #define WM8962_HP1R_RMV_SHORT_SHIFT 3
2113 #define WM8962_HP1R_RMV_SHORT_WIDTH 1
2114 #define WM8962_HP1R_ENA_OUTP 0x0004
2115 #define WM8962_HP1R_ENA_OUTP_MASK 0x0004
2116 #define WM8962_HP1R_ENA_OUTP_SHIFT 2
2117 #define WM8962_HP1R_ENA_OUTP_WIDTH 1
2118 #define WM8962_HP1R_ENA_DLY 0x0002
2119 #define WM8962_HP1R_ENA_DLY_MASK 0x0002
2120 #define WM8962_HP1R_ENA_DLY_SHIFT 1
2121 #define WM8962_HP1R_ENA_DLY_WIDTH 1
2122 #define WM8962_HP1R_ENA 0x0001
2123 #define WM8962_HP1R_ENA_MASK 0x0001
2124 #define WM8962_HP1R_ENA_SHIFT 0
2125 #define WM8962_HP1R_ENA_WIDTH 1
2126
2127
2128
2129
2130 #define WM8962_HP1L_VOL_MASK 0x01C0
2131 #define WM8962_HP1L_VOL_SHIFT 6
2132 #define WM8962_HP1L_VOL_WIDTH 3
2133 #define WM8962_HP1R_VOL_MASK 0x0038
2134 #define WM8962_HP1R_VOL_SHIFT 3
2135 #define WM8962_HP1R_VOL_WIDTH 3
2136 #define WM8962_HP_BIAS_BOOST_MASK 0x0007
2137 #define WM8962_HP_BIAS_BOOST_SHIFT 0
2138 #define WM8962_HP_BIAS_BOOST_WIDTH 3
2139
2140
2141
2142
2143 #define WM8962_CP_ENA 0x0001
2144 #define WM8962_CP_ENA_MASK 0x0001
2145 #define WM8962_CP_ENA_SHIFT 0
2146 #define WM8962_CP_ENA_WIDTH 1
2147
2148
2149
2150
2151 #define WM8962_CP_DYN_PWR 0x0001
2152 #define WM8962_CP_DYN_PWR_MASK 0x0001
2153 #define WM8962_CP_DYN_PWR_SHIFT 0
2154 #define WM8962_CP_DYN_PWR_WIDTH 1
2155
2156
2157
2158
2159 #define WM8962_WSEQ_AUTOSEQ_ENA 0x0080
2160 #define WM8962_WSEQ_AUTOSEQ_ENA_MASK 0x0080
2161 #define WM8962_WSEQ_AUTOSEQ_ENA_SHIFT 7
2162 #define WM8962_WSEQ_AUTOSEQ_ENA_WIDTH 1
2163 #define WM8962_WSEQ_ENA 0x0020
2164 #define WM8962_WSEQ_ENA_MASK 0x0020
2165 #define WM8962_WSEQ_ENA_SHIFT 5
2166 #define WM8962_WSEQ_ENA_WIDTH 1
2167
2168
2169
2170
2171 #define WM8962_WSEQ_ABORT 0x0100
2172 #define WM8962_WSEQ_ABORT_MASK 0x0100
2173 #define WM8962_WSEQ_ABORT_SHIFT 8
2174 #define WM8962_WSEQ_ABORT_WIDTH 1
2175 #define WM8962_WSEQ_START 0x0080
2176 #define WM8962_WSEQ_START_MASK 0x0080
2177 #define WM8962_WSEQ_START_SHIFT 7
2178 #define WM8962_WSEQ_START_WIDTH 1
2179 #define WM8962_WSEQ_START_INDEX_MASK 0x007F
2180 #define WM8962_WSEQ_START_INDEX_SHIFT 0
2181 #define WM8962_WSEQ_START_INDEX_WIDTH 7
2182
2183
2184
2185
2186 #define WM8962_WSEQ_CURRENT_INDEX_MASK 0x03F8
2187 #define WM8962_WSEQ_CURRENT_INDEX_SHIFT 3
2188 #define WM8962_WSEQ_CURRENT_INDEX_WIDTH 7
2189 #define WM8962_WSEQ_BUSY 0x0001
2190 #define WM8962_WSEQ_BUSY_MASK 0x0001
2191 #define WM8962_WSEQ_BUSY_SHIFT 0
2192 #define WM8962_WSEQ_BUSY_WIDTH 1
2193
2194
2195
2196
2197 #define WM8962_SPI_CONTRD 0x0040
2198 #define WM8962_SPI_CONTRD_MASK 0x0040
2199 #define WM8962_SPI_CONTRD_SHIFT 6
2200 #define WM8962_SPI_CONTRD_WIDTH 1
2201 #define WM8962_SPI_4WIRE 0x0020
2202 #define WM8962_SPI_4WIRE_MASK 0x0020
2203 #define WM8962_SPI_4WIRE_SHIFT 5
2204 #define WM8962_SPI_4WIRE_WIDTH 1
2205 #define WM8962_SPI_CFG 0x0010
2206 #define WM8962_SPI_CFG_MASK 0x0010
2207 #define WM8962_SPI_CFG_SHIFT 4
2208 #define WM8962_SPI_CFG_WIDTH 1
2209
2210
2211
2212
2213 #define WM8962_HPMIXL_ENA 0x0008
2214 #define WM8962_HPMIXL_ENA_MASK 0x0008
2215 #define WM8962_HPMIXL_ENA_SHIFT 3
2216 #define WM8962_HPMIXL_ENA_WIDTH 1
2217 #define WM8962_HPMIXR_ENA 0x0004
2218 #define WM8962_HPMIXR_ENA_MASK 0x0004
2219 #define WM8962_HPMIXR_ENA_SHIFT 2
2220 #define WM8962_HPMIXR_ENA_WIDTH 1
2221 #define WM8962_SPKMIXL_ENA 0x0002
2222 #define WM8962_SPKMIXL_ENA_MASK 0x0002
2223 #define WM8962_SPKMIXL_ENA_SHIFT 1
2224 #define WM8962_SPKMIXL_ENA_WIDTH 1
2225 #define WM8962_SPKMIXR_ENA 0x0001
2226 #define WM8962_SPKMIXR_ENA_MASK 0x0001
2227 #define WM8962_SPKMIXR_ENA_SHIFT 0
2228 #define WM8962_SPKMIXR_ENA_WIDTH 1
2229
2230
2231
2232
2233 #define WM8962_HPMIXL_TO_HPOUTL_PGA 0x0080
2234 #define WM8962_HPMIXL_TO_HPOUTL_PGA_MASK 0x0080
2235 #define WM8962_HPMIXL_TO_HPOUTL_PGA_SHIFT 7
2236 #define WM8962_HPMIXL_TO_HPOUTL_PGA_WIDTH 1
2237 #define WM8962_DACL_TO_HPMIXL 0x0020
2238 #define WM8962_DACL_TO_HPMIXL_MASK 0x0020
2239 #define WM8962_DACL_TO_HPMIXL_SHIFT 5
2240 #define WM8962_DACL_TO_HPMIXL_WIDTH 1
2241 #define WM8962_DACR_TO_HPMIXL 0x0010
2242 #define WM8962_DACR_TO_HPMIXL_MASK 0x0010
2243 #define WM8962_DACR_TO_HPMIXL_SHIFT 4
2244 #define WM8962_DACR_TO_HPMIXL_WIDTH 1
2245 #define WM8962_MIXINL_TO_HPMIXL 0x0008
2246 #define WM8962_MIXINL_TO_HPMIXL_MASK 0x0008
2247 #define WM8962_MIXINL_TO_HPMIXL_SHIFT 3
2248 #define WM8962_MIXINL_TO_HPMIXL_WIDTH 1
2249 #define WM8962_MIXINR_TO_HPMIXL 0x0004
2250 #define WM8962_MIXINR_TO_HPMIXL_MASK 0x0004
2251 #define WM8962_MIXINR_TO_HPMIXL_SHIFT 2
2252 #define WM8962_MIXINR_TO_HPMIXL_WIDTH 1
2253 #define WM8962_IN4L_TO_HPMIXL 0x0002
2254 #define WM8962_IN4L_TO_HPMIXL_MASK 0x0002
2255 #define WM8962_IN4L_TO_HPMIXL_SHIFT 1
2256 #define WM8962_IN4L_TO_HPMIXL_WIDTH 1
2257 #define WM8962_IN4R_TO_HPMIXL 0x0001
2258 #define WM8962_IN4R_TO_HPMIXL_MASK 0x0001
2259 #define WM8962_IN4R_TO_HPMIXL_SHIFT 0
2260 #define WM8962_IN4R_TO_HPMIXL_WIDTH 1
2261
2262
2263
2264
2265 #define WM8962_HPMIXR_TO_HPOUTR_PGA 0x0080
2266 #define WM8962_HPMIXR_TO_HPOUTR_PGA_MASK 0x0080
2267 #define WM8962_HPMIXR_TO_HPOUTR_PGA_SHIFT 7
2268 #define WM8962_HPMIXR_TO_HPOUTR_PGA_WIDTH 1
2269 #define WM8962_DACL_TO_HPMIXR 0x0020
2270 #define WM8962_DACL_TO_HPMIXR_MASK 0x0020
2271 #define WM8962_DACL_TO_HPMIXR_SHIFT 5
2272 #define WM8962_DACL_TO_HPMIXR_WIDTH 1
2273 #define WM8962_DACR_TO_HPMIXR 0x0010
2274 #define WM8962_DACR_TO_HPMIXR_MASK 0x0010
2275 #define WM8962_DACR_TO_HPMIXR_SHIFT 4
2276 #define WM8962_DACR_TO_HPMIXR_WIDTH 1
2277 #define WM8962_MIXINL_TO_HPMIXR 0x0008
2278 #define WM8962_MIXINL_TO_HPMIXR_MASK 0x0008
2279 #define WM8962_MIXINL_TO_HPMIXR_SHIFT 3
2280 #define WM8962_MIXINL_TO_HPMIXR_WIDTH 1
2281 #define WM8962_MIXINR_TO_HPMIXR 0x0004
2282 #define WM8962_MIXINR_TO_HPMIXR_MASK 0x0004
2283 #define WM8962_MIXINR_TO_HPMIXR_SHIFT 2
2284 #define WM8962_MIXINR_TO_HPMIXR_WIDTH 1
2285 #define WM8962_IN4L_TO_HPMIXR 0x0002
2286 #define WM8962_IN4L_TO_HPMIXR_MASK 0x0002
2287 #define WM8962_IN4L_TO_HPMIXR_SHIFT 1
2288 #define WM8962_IN4L_TO_HPMIXR_WIDTH 1
2289 #define WM8962_IN4R_TO_HPMIXR 0x0001
2290 #define WM8962_IN4R_TO_HPMIXR_MASK 0x0001
2291 #define WM8962_IN4R_TO_HPMIXR_SHIFT 0
2292 #define WM8962_IN4R_TO_HPMIXR_WIDTH 1
2293
2294
2295
2296
2297 #define WM8962_HPMIXL_MUTE 0x0100
2298 #define WM8962_HPMIXL_MUTE_MASK 0x0100
2299 #define WM8962_HPMIXL_MUTE_SHIFT 8
2300 #define WM8962_HPMIXL_MUTE_WIDTH 1
2301 #define WM8962_MIXINL_HPMIXL_VOL 0x0080
2302 #define WM8962_MIXINL_HPMIXL_VOL_MASK 0x0080
2303 #define WM8962_MIXINL_HPMIXL_VOL_SHIFT 7
2304 #define WM8962_MIXINL_HPMIXL_VOL_WIDTH 1
2305 #define WM8962_MIXINR_HPMIXL_VOL 0x0040
2306 #define WM8962_MIXINR_HPMIXL_VOL_MASK 0x0040
2307 #define WM8962_MIXINR_HPMIXL_VOL_SHIFT 6
2308 #define WM8962_MIXINR_HPMIXL_VOL_WIDTH 1
2309 #define WM8962_IN4L_HPMIXL_VOL_MASK 0x0038
2310 #define WM8962_IN4L_HPMIXL_VOL_SHIFT 3
2311 #define WM8962_IN4L_HPMIXL_VOL_WIDTH 3
2312 #define WM8962_IN4R_HPMIXL_VOL_MASK 0x0007
2313 #define WM8962_IN4R_HPMIXL_VOL_SHIFT 0
2314 #define WM8962_IN4R_HPMIXL_VOL_WIDTH 3
2315
2316
2317
2318
2319 #define WM8962_HPMIXR_MUTE 0x0100
2320 #define WM8962_HPMIXR_MUTE_MASK 0x0100
2321 #define WM8962_HPMIXR_MUTE_SHIFT 8
2322 #define WM8962_HPMIXR_MUTE_WIDTH 1
2323 #define WM8962_MIXINL_HPMIXR_VOL 0x0080
2324 #define WM8962_MIXINL_HPMIXR_VOL_MASK 0x0080
2325 #define WM8962_MIXINL_HPMIXR_VOL_SHIFT 7
2326 #define WM8962_MIXINL_HPMIXR_VOL_WIDTH 1
2327 #define WM8962_MIXINR_HPMIXR_VOL 0x0040
2328 #define WM8962_MIXINR_HPMIXR_VOL_MASK 0x0040
2329 #define WM8962_MIXINR_HPMIXR_VOL_SHIFT 6
2330 #define WM8962_MIXINR_HPMIXR_VOL_WIDTH 1
2331 #define WM8962_IN4L_HPMIXR_VOL_MASK 0x0038
2332 #define WM8962_IN4L_HPMIXR_VOL_SHIFT 3
2333 #define WM8962_IN4L_HPMIXR_VOL_WIDTH 3
2334 #define WM8962_IN4R_HPMIXR_VOL_MASK 0x0007
2335 #define WM8962_IN4R_HPMIXR_VOL_SHIFT 0
2336 #define WM8962_IN4R_HPMIXR_VOL_WIDTH 3
2337
2338
2339
2340
2341 #define WM8962_SPKMIXL_TO_SPKOUTL_PGA 0x0080
2342 #define WM8962_SPKMIXL_TO_SPKOUTL_PGA_MASK 0x0080
2343 #define WM8962_SPKMIXL_TO_SPKOUTL_PGA_SHIFT 7
2344 #define WM8962_SPKMIXL_TO_SPKOUTL_PGA_WIDTH 1
2345 #define WM8962_DACL_TO_SPKMIXL 0x0020
2346 #define WM8962_DACL_TO_SPKMIXL_MASK 0x0020
2347 #define WM8962_DACL_TO_SPKMIXL_SHIFT 5
2348 #define WM8962_DACL_TO_SPKMIXL_WIDTH 1
2349 #define WM8962_DACR_TO_SPKMIXL 0x0010
2350 #define WM8962_DACR_TO_SPKMIXL_MASK 0x0010
2351 #define WM8962_DACR_TO_SPKMIXL_SHIFT 4
2352 #define WM8962_DACR_TO_SPKMIXL_WIDTH 1
2353 #define WM8962_MIXINL_TO_SPKMIXL 0x0008
2354 #define WM8962_MIXINL_TO_SPKMIXL_MASK 0x0008
2355 #define WM8962_MIXINL_TO_SPKMIXL_SHIFT 3
2356 #define WM8962_MIXINL_TO_SPKMIXL_WIDTH 1
2357 #define WM8962_MIXINR_TO_SPKMIXL 0x0004
2358 #define WM8962_MIXINR_TO_SPKMIXL_MASK 0x0004
2359 #define WM8962_MIXINR_TO_SPKMIXL_SHIFT 2
2360 #define WM8962_MIXINR_TO_SPKMIXL_WIDTH 1
2361 #define WM8962_IN4L_TO_SPKMIXL 0x0002
2362 #define WM8962_IN4L_TO_SPKMIXL_MASK 0x0002
2363 #define WM8962_IN4L_TO_SPKMIXL_SHIFT 1
2364 #define WM8962_IN4L_TO_SPKMIXL_WIDTH 1
2365 #define WM8962_IN4R_TO_SPKMIXL 0x0001
2366 #define WM8962_IN4R_TO_SPKMIXL_MASK 0x0001
2367 #define WM8962_IN4R_TO_SPKMIXL_SHIFT 0
2368 #define WM8962_IN4R_TO_SPKMIXL_WIDTH 1
2369
2370
2371
2372
2373 #define WM8962_SPKMIXR_TO_SPKOUTR_PGA 0x0080
2374 #define WM8962_SPKMIXR_TO_SPKOUTR_PGA_MASK 0x0080
2375 #define WM8962_SPKMIXR_TO_SPKOUTR_PGA_SHIFT 7
2376 #define WM8962_SPKMIXR_TO_SPKOUTR_PGA_WIDTH 1
2377 #define WM8962_DACL_TO_SPKMIXR 0x0020
2378 #define WM8962_DACL_TO_SPKMIXR_MASK 0x0020
2379 #define WM8962_DACL_TO_SPKMIXR_SHIFT 5
2380 #define WM8962_DACL_TO_SPKMIXR_WIDTH 1
2381 #define WM8962_DACR_TO_SPKMIXR 0x0010
2382 #define WM8962_DACR_TO_SPKMIXR_MASK 0x0010
2383 #define WM8962_DACR_TO_SPKMIXR_SHIFT 4
2384 #define WM8962_DACR_TO_SPKMIXR_WIDTH 1
2385 #define WM8962_MIXINL_TO_SPKMIXR 0x0008
2386 #define WM8962_MIXINL_TO_SPKMIXR_MASK 0x0008
2387 #define WM8962_MIXINL_TO_SPKMIXR_SHIFT 3
2388 #define WM8962_MIXINL_TO_SPKMIXR_WIDTH 1
2389 #define WM8962_MIXINR_TO_SPKMIXR 0x0004
2390 #define WM8962_MIXINR_TO_SPKMIXR_MASK 0x0004
2391 #define WM8962_MIXINR_TO_SPKMIXR_SHIFT 2
2392 #define WM8962_MIXINR_TO_SPKMIXR_WIDTH 1
2393 #define WM8962_IN4L_TO_SPKMIXR 0x0002
2394 #define WM8962_IN4L_TO_SPKMIXR_MASK 0x0002
2395 #define WM8962_IN4L_TO_SPKMIXR_SHIFT 1
2396 #define WM8962_IN4L_TO_SPKMIXR_WIDTH 1
2397 #define WM8962_IN4R_TO_SPKMIXR 0x0001
2398 #define WM8962_IN4R_TO_SPKMIXR_MASK 0x0001
2399 #define WM8962_IN4R_TO_SPKMIXR_SHIFT 0
2400 #define WM8962_IN4R_TO_SPKMIXR_WIDTH 1
2401
2402
2403
2404
2405 #define WM8962_SPKMIXL_MUTE 0x0100
2406 #define WM8962_SPKMIXL_MUTE_MASK 0x0100
2407 #define WM8962_SPKMIXL_MUTE_SHIFT 8
2408 #define WM8962_SPKMIXL_MUTE_WIDTH 1
2409 #define WM8962_MIXINL_SPKMIXL_VOL 0x0080
2410 #define WM8962_MIXINL_SPKMIXL_VOL_MASK 0x0080
2411 #define WM8962_MIXINL_SPKMIXL_VOL_SHIFT 7
2412 #define WM8962_MIXINL_SPKMIXL_VOL_WIDTH 1
2413 #define WM8962_MIXINR_SPKMIXL_VOL 0x0040
2414 #define WM8962_MIXINR_SPKMIXL_VOL_MASK 0x0040
2415 #define WM8962_MIXINR_SPKMIXL_VOL_SHIFT 6
2416 #define WM8962_MIXINR_SPKMIXL_VOL_WIDTH 1
2417 #define WM8962_IN4L_SPKMIXL_VOL_MASK 0x0038
2418 #define WM8962_IN4L_SPKMIXL_VOL_SHIFT 3
2419 #define WM8962_IN4L_SPKMIXL_VOL_WIDTH 3
2420 #define WM8962_IN4R_SPKMIXL_VOL_MASK 0x0007
2421 #define WM8962_IN4R_SPKMIXL_VOL_SHIFT 0
2422 #define WM8962_IN4R_SPKMIXL_VOL_WIDTH 3
2423
2424
2425
2426
2427 #define WM8962_SPKMIXR_MUTE 0x0100
2428 #define WM8962_SPKMIXR_MUTE_MASK 0x0100
2429 #define WM8962_SPKMIXR_MUTE_SHIFT 8
2430 #define WM8962_SPKMIXR_MUTE_WIDTH 1
2431 #define WM8962_MIXINL_SPKMIXR_VOL 0x0080
2432 #define WM8962_MIXINL_SPKMIXR_VOL_MASK 0x0080
2433 #define WM8962_MIXINL_SPKMIXR_VOL_SHIFT 7
2434 #define WM8962_MIXINL_SPKMIXR_VOL_WIDTH 1
2435 #define WM8962_MIXINR_SPKMIXR_VOL 0x0040
2436 #define WM8962_MIXINR_SPKMIXR_VOL_MASK 0x0040
2437 #define WM8962_MIXINR_SPKMIXR_VOL_SHIFT 6
2438 #define WM8962_MIXINR_SPKMIXR_VOL_WIDTH 1
2439 #define WM8962_IN4L_SPKMIXR_VOL_MASK 0x0038
2440 #define WM8962_IN4L_SPKMIXR_VOL_SHIFT 3
2441 #define WM8962_IN4L_SPKMIXR_VOL_WIDTH 3
2442 #define WM8962_IN4R_SPKMIXR_VOL_MASK 0x0007
2443 #define WM8962_IN4R_SPKMIXR_VOL_SHIFT 0
2444 #define WM8962_IN4R_SPKMIXR_VOL_WIDTH 3
2445
2446
2447
2448
2449 #define WM8962_DACL_SPKMIXL_VOL 0x0080
2450 #define WM8962_DACL_SPKMIXL_VOL_MASK 0x0080
2451 #define WM8962_DACL_SPKMIXL_VOL_SHIFT 7
2452 #define WM8962_DACL_SPKMIXL_VOL_WIDTH 1
2453 #define WM8962_DACR_SPKMIXL_VOL 0x0040
2454 #define WM8962_DACR_SPKMIXL_VOL_MASK 0x0040
2455 #define WM8962_DACR_SPKMIXL_VOL_SHIFT 6
2456 #define WM8962_DACR_SPKMIXL_VOL_WIDTH 1
2457 #define WM8962_DACL_SPKMIXR_VOL 0x0020
2458 #define WM8962_DACL_SPKMIXR_VOL_MASK 0x0020
2459 #define WM8962_DACL_SPKMIXR_VOL_SHIFT 5
2460 #define WM8962_DACL_SPKMIXR_VOL_WIDTH 1
2461 #define WM8962_DACR_SPKMIXR_VOL 0x0010
2462 #define WM8962_DACR_SPKMIXR_VOL_MASK 0x0010
2463 #define WM8962_DACR_SPKMIXR_VOL_SHIFT 4
2464 #define WM8962_DACR_SPKMIXR_VOL_WIDTH 1
2465
2466
2467
2468
2469 #define WM8962_BEEP_GAIN_MASK 0x00F0
2470 #define WM8962_BEEP_GAIN_SHIFT 4
2471 #define WM8962_BEEP_GAIN_WIDTH 4
2472 #define WM8962_BEEP_RATE_MASK 0x0006
2473 #define WM8962_BEEP_RATE_SHIFT 1
2474 #define WM8962_BEEP_RATE_WIDTH 2
2475 #define WM8962_BEEP_ENA 0x0001
2476 #define WM8962_BEEP_ENA_MASK 0x0001
2477 #define WM8962_BEEP_ENA_SHIFT 0
2478 #define WM8962_BEEP_ENA_WIDTH 1
2479
2480
2481
2482
2483 #define WM8962_OSC_TRIM_XTI_MASK 0x001F
2484 #define WM8962_OSC_TRIM_XTI_SHIFT 0
2485 #define WM8962_OSC_TRIM_XTI_WIDTH 5
2486
2487
2488
2489
2490 #define WM8962_OSC_TRIM_XTO_MASK 0x001F
2491 #define WM8962_OSC_TRIM_XTO_SHIFT 0
2492 #define WM8962_OSC_TRIM_XTO_WIDTH 5
2493
2494
2495
2496
2497 #define WM8962_XTO_CAP_SEL_MASK 0x00F0
2498 #define WM8962_XTO_CAP_SEL_SHIFT 4
2499 #define WM8962_XTO_CAP_SEL_WIDTH 4
2500 #define WM8962_XTI_CAP_SEL_MASK 0x000F
2501 #define WM8962_XTI_CAP_SEL_SHIFT 0
2502 #define WM8962_XTI_CAP_SEL_WIDTH 4
2503
2504
2505
2506
2507 #define WM8962_CLKOUT2_SEL_MASK 0x0060
2508 #define WM8962_CLKOUT2_SEL_SHIFT 5
2509 #define WM8962_CLKOUT2_SEL_WIDTH 2
2510 #define WM8962_CLKOUT3_SEL_MASK 0x0018
2511 #define WM8962_CLKOUT3_SEL_SHIFT 3
2512 #define WM8962_CLKOUT3_SEL_WIDTH 2
2513 #define WM8962_CLKOUT5_SEL 0x0001
2514 #define WM8962_CLKOUT5_SEL_MASK 0x0001
2515 #define WM8962_CLKOUT5_SEL_SHIFT 0
2516 #define WM8962_CLKOUT5_SEL_WIDTH 1
2517
2518
2519
2520
2521 #define WM8962_PLL2_OUTDIV 0x0080
2522 #define WM8962_PLL2_OUTDIV_MASK 0x0080
2523 #define WM8962_PLL2_OUTDIV_SHIFT 7
2524 #define WM8962_PLL2_OUTDIV_WIDTH 1
2525 #define WM8962_PLL3_OUTDIV 0x0040
2526 #define WM8962_PLL3_OUTDIV_MASK 0x0040
2527 #define WM8962_PLL3_OUTDIV_SHIFT 6
2528 #define WM8962_PLL3_OUTDIV_WIDTH 1
2529 #define WM8962_PLL_SYSCLK_DIV_MASK 0x0018
2530 #define WM8962_PLL_SYSCLK_DIV_SHIFT 3
2531 #define WM8962_PLL_SYSCLK_DIV_WIDTH 2
2532 #define WM8962_CLKOUT3_DIV 0x0004
2533 #define WM8962_CLKOUT3_DIV_MASK 0x0004
2534 #define WM8962_CLKOUT3_DIV_SHIFT 2
2535 #define WM8962_CLKOUT3_DIV_WIDTH 1
2536 #define WM8962_CLKOUT2_DIV 0x0002
2537 #define WM8962_CLKOUT2_DIV_MASK 0x0002
2538 #define WM8962_CLKOUT2_DIV_SHIFT 1
2539 #define WM8962_CLKOUT2_DIV_WIDTH 1
2540 #define WM8962_CLKOUT5_DIV 0x0001
2541 #define WM8962_CLKOUT5_DIV_MASK 0x0001
2542 #define WM8962_CLKOUT5_DIV_SHIFT 0
2543 #define WM8962_CLKOUT5_DIV_WIDTH 1
2544
2545
2546
2547
2548 #define WM8962_CLKOUT2_OE 0x0008
2549 #define WM8962_CLKOUT2_OE_MASK 0x0008
2550 #define WM8962_CLKOUT2_OE_SHIFT 3
2551 #define WM8962_CLKOUT2_OE_WIDTH 1
2552 #define WM8962_CLKOUT3_OE 0x0004
2553 #define WM8962_CLKOUT3_OE_MASK 0x0004
2554 #define WM8962_CLKOUT3_OE_SHIFT 2
2555 #define WM8962_CLKOUT3_OE_WIDTH 1
2556 #define WM8962_CLKOUT5_OE 0x0001
2557 #define WM8962_CLKOUT5_OE_MASK 0x0001
2558 #define WM8962_CLKOUT5_OE_SHIFT 0
2559 #define WM8962_CLKOUT5_OE_WIDTH 1
2560
2561
2562
2563
2564 #define WM8962_SW_RESET_PLL_MASK 0xFFFF
2565 #define WM8962_SW_RESET_PLL_SHIFT 0
2566 #define WM8962_SW_RESET_PLL_WIDTH 16
2567
2568
2569
2570
2571 #define WM8962_OSC_ENA 0x0080
2572 #define WM8962_OSC_ENA_MASK 0x0080
2573 #define WM8962_OSC_ENA_SHIFT 7
2574 #define WM8962_OSC_ENA_WIDTH 1
2575 #define WM8962_PLL2_ENA 0x0020
2576 #define WM8962_PLL2_ENA_MASK 0x0020
2577 #define WM8962_PLL2_ENA_SHIFT 5
2578 #define WM8962_PLL2_ENA_WIDTH 1
2579 #define WM8962_PLL3_ENA 0x0010
2580 #define WM8962_PLL3_ENA_MASK 0x0010
2581 #define WM8962_PLL3_ENA_SHIFT 4
2582 #define WM8962_PLL3_ENA_WIDTH 1
2583
2584
2585
2586
2587 #define WM8962_PLL_CLK_SRC 0x0002
2588 #define WM8962_PLL_CLK_SRC_MASK 0x0002
2589 #define WM8962_PLL_CLK_SRC_SHIFT 1
2590 #define WM8962_PLL_CLK_SRC_WIDTH 1
2591 #define WM8962_FLL_TO_PLL3 0x0001
2592 #define WM8962_FLL_TO_PLL3_MASK 0x0001
2593 #define WM8962_FLL_TO_PLL3_SHIFT 0
2594 #define WM8962_FLL_TO_PLL3_WIDTH 1
2595
2596
2597
2598
2599 #define WM8962_PLL2_FRAC 0x0040
2600 #define WM8962_PLL2_FRAC_MASK 0x0040
2601 #define WM8962_PLL2_FRAC_SHIFT 6
2602 #define WM8962_PLL2_FRAC_WIDTH 1
2603 #define WM8962_PLL2_N_MASK 0x001F
2604 #define WM8962_PLL2_N_SHIFT 0
2605 #define WM8962_PLL2_N_WIDTH 5
2606
2607
2608
2609
2610 #define WM8962_PLL2_K_MASK 0x00FF
2611 #define WM8962_PLL2_K_SHIFT 0
2612 #define WM8962_PLL2_K_WIDTH 8
2613
2614
2615
2616
2617 #define WM8962_PLL2_K_MASK 0x00FF
2618 #define WM8962_PLL2_K_SHIFT 0
2619 #define WM8962_PLL2_K_WIDTH 8
2620
2621
2622
2623
2624 #define WM8962_PLL2_K_MASK 0x00FF
2625 #define WM8962_PLL2_K_SHIFT 0
2626 #define WM8962_PLL2_K_WIDTH 8
2627
2628
2629
2630
2631 #define WM8962_PLL3_FRAC 0x0040
2632 #define WM8962_PLL3_FRAC_MASK 0x0040
2633 #define WM8962_PLL3_FRAC_SHIFT 6
2634 #define WM8962_PLL3_FRAC_WIDTH 1
2635 #define WM8962_PLL3_N_MASK 0x001F
2636 #define WM8962_PLL3_N_SHIFT 0
2637 #define WM8962_PLL3_N_WIDTH 5
2638
2639
2640
2641
2642 #define WM8962_PLL3_K_MASK 0x00FF
2643 #define WM8962_PLL3_K_SHIFT 0
2644 #define WM8962_PLL3_K_WIDTH 8
2645
2646
2647
2648
2649 #define WM8962_PLL3_K_MASK 0x00FF
2650 #define WM8962_PLL3_K_SHIFT 0
2651 #define WM8962_PLL3_K_WIDTH 8
2652
2653
2654
2655
2656 #define WM8962_PLL3_K_MASK 0x00FF
2657 #define WM8962_PLL3_K_SHIFT 0
2658 #define WM8962_PLL3_K_WIDTH 8
2659
2660
2661
2662
2663 #define WM8962_FLL_REFCLK_SRC_MASK 0x0060
2664 #define WM8962_FLL_REFCLK_SRC_SHIFT 5
2665 #define WM8962_FLL_REFCLK_SRC_WIDTH 2
2666 #define WM8962_FLL_FRAC 0x0004
2667 #define WM8962_FLL_FRAC_MASK 0x0004
2668 #define WM8962_FLL_FRAC_SHIFT 2
2669 #define WM8962_FLL_FRAC_WIDTH 1
2670 #define WM8962_FLL_OSC_ENA 0x0002
2671 #define WM8962_FLL_OSC_ENA_MASK 0x0002
2672 #define WM8962_FLL_OSC_ENA_SHIFT 1
2673 #define WM8962_FLL_OSC_ENA_WIDTH 1
2674 #define WM8962_FLL_ENA 0x0001
2675 #define WM8962_FLL_ENA_MASK 0x0001
2676 #define WM8962_FLL_ENA_SHIFT 0
2677 #define WM8962_FLL_ENA_WIDTH 1
2678
2679
2680
2681
2682 #define WM8962_FLL_OUTDIV_MASK 0x01F8
2683 #define WM8962_FLL_OUTDIV_SHIFT 3
2684 #define WM8962_FLL_OUTDIV_WIDTH 6
2685 #define WM8962_FLL_REFCLK_DIV_MASK 0x0003
2686 #define WM8962_FLL_REFCLK_DIV_SHIFT 0
2687 #define WM8962_FLL_REFCLK_DIV_WIDTH 2
2688
2689
2690
2691
2692 #define WM8962_FLL_FRATIO_MASK 0x0007
2693 #define WM8962_FLL_FRATIO_SHIFT 0
2694 #define WM8962_FLL_FRATIO_WIDTH 3
2695
2696
2697
2698
2699 #define WM8962_FLL_FRC_NCO_VAL_MASK 0x007E
2700 #define WM8962_FLL_FRC_NCO_VAL_SHIFT 1
2701 #define WM8962_FLL_FRC_NCO_VAL_WIDTH 6
2702 #define WM8962_FLL_FRC_NCO 0x0001
2703 #define WM8962_FLL_FRC_NCO_MASK 0x0001
2704 #define WM8962_FLL_FRC_NCO_SHIFT 0
2705 #define WM8962_FLL_FRC_NCO_WIDTH 1
2706
2707
2708
2709
2710 #define WM8962_FLL_THETA_MASK 0xFFFF
2711 #define WM8962_FLL_THETA_SHIFT 0
2712 #define WM8962_FLL_THETA_WIDTH 16
2713
2714
2715
2716
2717 #define WM8962_FLL_LAMBDA_MASK 0xFFFF
2718 #define WM8962_FLL_LAMBDA_SHIFT 0
2719 #define WM8962_FLL_LAMBDA_WIDTH 16
2720
2721
2722
2723
2724 #define WM8962_FLL_N_MASK 0x03FF
2725 #define WM8962_FLL_N_SHIFT 0
2726 #define WM8962_FLL_N_WIDTH 10
2727
2728
2729
2730
2731 #define WM8962_REG_SYNC 0x0004
2732 #define WM8962_REG_SYNC_MASK 0x0004
2733 #define WM8962_REG_SYNC_SHIFT 2
2734 #define WM8962_REG_SYNC_WIDTH 1
2735 #define WM8962_AUTO_INC 0x0001
2736 #define WM8962_AUTO_INC_MASK 0x0001
2737 #define WM8962_AUTO_INC_SHIFT 0
2738 #define WM8962_AUTO_INC_WIDTH 1
2739
2740
2741
2742
2743 #define WM8962_DRC_DF1_ENA 0x0008
2744 #define WM8962_DRC_DF1_ENA_MASK 0x0008
2745 #define WM8962_DRC_DF1_ENA_SHIFT 3
2746 #define WM8962_DRC_DF1_ENA_WIDTH 1
2747 #define WM8962_DF1_SHARED_COEFF 0x0004
2748 #define WM8962_DF1_SHARED_COEFF_MASK 0x0004
2749 #define WM8962_DF1_SHARED_COEFF_SHIFT 2
2750 #define WM8962_DF1_SHARED_COEFF_WIDTH 1
2751 #define WM8962_DF1_SHARED_COEFF_SEL 0x0002
2752 #define WM8962_DF1_SHARED_COEFF_SEL_MASK 0x0002
2753 #define WM8962_DF1_SHARED_COEFF_SEL_SHIFT 1
2754 #define WM8962_DF1_SHARED_COEFF_SEL_WIDTH 1
2755 #define WM8962_DF1_ENA 0x0001
2756 #define WM8962_DF1_ENA_MASK 0x0001
2757 #define WM8962_DF1_ENA_SHIFT 0
2758 #define WM8962_DF1_ENA_WIDTH 1
2759
2760
2761
2762
2763 #define WM8962_DF1_COEFF_L0_MASK 0xFFFF
2764 #define WM8962_DF1_COEFF_L0_SHIFT 0
2765 #define WM8962_DF1_COEFF_L0_WIDTH 16
2766
2767
2768
2769
2770 #define WM8962_DF1_COEFF_L1_MASK 0xFFFF
2771 #define WM8962_DF1_COEFF_L1_SHIFT 0
2772 #define WM8962_DF1_COEFF_L1_WIDTH 16
2773
2774
2775
2776
2777 #define WM8962_DF1_COEFF_L2_MASK 0xFFFF
2778 #define WM8962_DF1_COEFF_L2_SHIFT 0
2779 #define WM8962_DF1_COEFF_L2_WIDTH 16
2780
2781
2782
2783
2784 #define WM8962_DF1_COEFF_R0_MASK 0xFFFF
2785 #define WM8962_DF1_COEFF_R0_SHIFT 0
2786 #define WM8962_DF1_COEFF_R0_WIDTH 16
2787
2788
2789
2790
2791 #define WM8962_DF1_COEFF_R1_MASK 0xFFFF
2792 #define WM8962_DF1_COEFF_R1_SHIFT 0
2793 #define WM8962_DF1_COEFF_R1_WIDTH 16
2794
2795
2796
2797
2798 #define WM8962_DF1_COEFF_R2_MASK 0xFFFF
2799 #define WM8962_DF1_COEFF_R2_SHIFT 0
2800 #define WM8962_DF1_COEFF_R2_WIDTH 16
2801
2802
2803
2804
2805 #define WM8962_LHPF_MODE 0x0002
2806 #define WM8962_LHPF_MODE_MASK 0x0002
2807 #define WM8962_LHPF_MODE_SHIFT 1
2808 #define WM8962_LHPF_MODE_WIDTH 1
2809 #define WM8962_LHPF_ENA 0x0001
2810 #define WM8962_LHPF_ENA_MASK 0x0001
2811 #define WM8962_LHPF_ENA_SHIFT 0
2812 #define WM8962_LHPF_ENA_WIDTH 1
2813
2814
2815
2816
2817 #define WM8962_LHPF_COEFF_MASK 0xFFFF
2818 #define WM8962_LHPF_COEFF_SHIFT 0
2819 #define WM8962_LHPF_COEFF_WIDTH 16
2820
2821
2822
2823
2824 #define WM8962_ADC_MONOMIX 0x0040
2825 #define WM8962_ADC_MONOMIX_MASK 0x0040
2826 #define WM8962_ADC_MONOMIX_SHIFT 6
2827 #define WM8962_ADC_MONOMIX_WIDTH 1
2828 #define WM8962_THREED_SIGN_L 0x0020
2829 #define WM8962_THREED_SIGN_L_MASK 0x0020
2830 #define WM8962_THREED_SIGN_L_SHIFT 5
2831 #define WM8962_THREED_SIGN_L_WIDTH 1
2832 #define WM8962_THREED_SIGN_R 0x0010
2833 #define WM8962_THREED_SIGN_R_MASK 0x0010
2834 #define WM8962_THREED_SIGN_R_SHIFT 4
2835 #define WM8962_THREED_SIGN_R_WIDTH 1
2836 #define WM8962_THREED_LHPF_MODE 0x0004
2837 #define WM8962_THREED_LHPF_MODE_MASK 0x0004
2838 #define WM8962_THREED_LHPF_MODE_SHIFT 2
2839 #define WM8962_THREED_LHPF_MODE_WIDTH 1
2840 #define WM8962_THREED_LHPF_ENA 0x0002
2841 #define WM8962_THREED_LHPF_ENA_MASK 0x0002
2842 #define WM8962_THREED_LHPF_ENA_SHIFT 1
2843 #define WM8962_THREED_LHPF_ENA_WIDTH 1
2844 #define WM8962_THREED_ENA 0x0001
2845 #define WM8962_THREED_ENA_MASK 0x0001
2846 #define WM8962_THREED_ENA_SHIFT 0
2847 #define WM8962_THREED_ENA_WIDTH 1
2848
2849
2850
2851
2852 #define WM8962_THREED_FGAINL_MASK 0xF800
2853 #define WM8962_THREED_FGAINL_SHIFT 11
2854 #define WM8962_THREED_FGAINL_WIDTH 5
2855 #define WM8962_THREED_CGAINL_MASK 0x07C0
2856 #define WM8962_THREED_CGAINL_SHIFT 6
2857 #define WM8962_THREED_CGAINL_WIDTH 5
2858 #define WM8962_THREED_DELAYL_MASK 0x003C
2859 #define WM8962_THREED_DELAYL_SHIFT 2
2860 #define WM8962_THREED_DELAYL_WIDTH 4
2861
2862
2863
2864
2865 #define WM8962_THREED_LHPF_COEFF_MASK 0xFFFF
2866 #define WM8962_THREED_LHPF_COEFF_SHIFT 0
2867 #define WM8962_THREED_LHPF_COEFF_WIDTH 16
2868
2869
2870
2871
2872 #define WM8962_THREED_FGAINR_MASK 0xF800
2873 #define WM8962_THREED_FGAINR_SHIFT 11
2874 #define WM8962_THREED_FGAINR_WIDTH 5
2875 #define WM8962_THREED_CGAINR_MASK 0x07C0
2876 #define WM8962_THREED_CGAINR_SHIFT 6
2877 #define WM8962_THREED_CGAINR_WIDTH 5
2878 #define WM8962_THREED_DELAYR_MASK 0x003C
2879 #define WM8962_THREED_DELAYR_SHIFT 2
2880 #define WM8962_THREED_DELAYR_WIDTH 4
2881
2882
2883
2884
2885 #define WM8962_DRC_SIG_DET_RMS_MASK 0x7C00
2886 #define WM8962_DRC_SIG_DET_RMS_SHIFT 10
2887 #define WM8962_DRC_SIG_DET_RMS_WIDTH 5
2888 #define WM8962_DRC_SIG_DET_PK_MASK 0x0300
2889 #define WM8962_DRC_SIG_DET_PK_SHIFT 8
2890 #define WM8962_DRC_SIG_DET_PK_WIDTH 2
2891 #define WM8962_DRC_NG_ENA 0x0080
2892 #define WM8962_DRC_NG_ENA_MASK 0x0080
2893 #define WM8962_DRC_NG_ENA_SHIFT 7
2894 #define WM8962_DRC_NG_ENA_WIDTH 1
2895 #define WM8962_DRC_SIG_DET_MODE 0x0040
2896 #define WM8962_DRC_SIG_DET_MODE_MASK 0x0040
2897 #define WM8962_DRC_SIG_DET_MODE_SHIFT 6
2898 #define WM8962_DRC_SIG_DET_MODE_WIDTH 1
2899 #define WM8962_DRC_SIG_DET 0x0020
2900 #define WM8962_DRC_SIG_DET_MASK 0x0020
2901 #define WM8962_DRC_SIG_DET_SHIFT 5
2902 #define WM8962_DRC_SIG_DET_WIDTH 1
2903 #define WM8962_DRC_KNEE2_OP_ENA 0x0010
2904 #define WM8962_DRC_KNEE2_OP_ENA_MASK 0x0010
2905 #define WM8962_DRC_KNEE2_OP_ENA_SHIFT 4
2906 #define WM8962_DRC_KNEE2_OP_ENA_WIDTH 1
2907 #define WM8962_DRC_QR 0x0008
2908 #define WM8962_DRC_QR_MASK 0x0008
2909 #define WM8962_DRC_QR_SHIFT 3
2910 #define WM8962_DRC_QR_WIDTH 1
2911 #define WM8962_DRC_ANTICLIP 0x0004
2912 #define WM8962_DRC_ANTICLIP_MASK 0x0004
2913 #define WM8962_DRC_ANTICLIP_SHIFT 2
2914 #define WM8962_DRC_ANTICLIP_WIDTH 1
2915 #define WM8962_DRC_MODE 0x0002
2916 #define WM8962_DRC_MODE_MASK 0x0002
2917 #define WM8962_DRC_MODE_SHIFT 1
2918 #define WM8962_DRC_MODE_WIDTH 1
2919 #define WM8962_DRC_ENA 0x0001
2920 #define WM8962_DRC_ENA_MASK 0x0001
2921 #define WM8962_DRC_ENA_SHIFT 0
2922 #define WM8962_DRC_ENA_WIDTH 1
2923
2924
2925
2926
2927 #define WM8962_DRC_ATK_MASK 0x1E00
2928 #define WM8962_DRC_ATK_SHIFT 9
2929 #define WM8962_DRC_ATK_WIDTH 4
2930 #define WM8962_DRC_DCY_MASK 0x01E0
2931 #define WM8962_DRC_DCY_SHIFT 5
2932 #define WM8962_DRC_DCY_WIDTH 4
2933 #define WM8962_DRC_MINGAIN_MASK 0x001C
2934 #define WM8962_DRC_MINGAIN_SHIFT 2
2935 #define WM8962_DRC_MINGAIN_WIDTH 3
2936 #define WM8962_DRC_MAXGAIN_MASK 0x0003
2937 #define WM8962_DRC_MAXGAIN_SHIFT 0
2938 #define WM8962_DRC_MAXGAIN_WIDTH 2
2939
2940
2941
2942
2943 #define WM8962_DRC_NG_MINGAIN_MASK 0xF000
2944 #define WM8962_DRC_NG_MINGAIN_SHIFT 12
2945 #define WM8962_DRC_NG_MINGAIN_WIDTH 4
2946 #define WM8962_DRC_QR_THR_MASK 0x0C00
2947 #define WM8962_DRC_QR_THR_SHIFT 10
2948 #define WM8962_DRC_QR_THR_WIDTH 2
2949 #define WM8962_DRC_QR_DCY_MASK 0x0300
2950 #define WM8962_DRC_QR_DCY_SHIFT 8
2951 #define WM8962_DRC_QR_DCY_WIDTH 2
2952 #define WM8962_DRC_NG_EXP_MASK 0x00C0
2953 #define WM8962_DRC_NG_EXP_SHIFT 6
2954 #define WM8962_DRC_NG_EXP_WIDTH 2
2955 #define WM8962_DRC_HI_COMP_MASK 0x0038
2956 #define WM8962_DRC_HI_COMP_SHIFT 3
2957 #define WM8962_DRC_HI_COMP_WIDTH 3
2958 #define WM8962_DRC_LO_COMP_MASK 0x0007
2959 #define WM8962_DRC_LO_COMP_SHIFT 0
2960 #define WM8962_DRC_LO_COMP_WIDTH 3
2961
2962
2963
2964
2965 #define WM8962_DRC_KNEE_IP_MASK 0x07E0
2966 #define WM8962_DRC_KNEE_IP_SHIFT 5
2967 #define WM8962_DRC_KNEE_IP_WIDTH 6
2968 #define WM8962_DRC_KNEE_OP_MASK 0x001F
2969 #define WM8962_DRC_KNEE_OP_SHIFT 0
2970 #define WM8962_DRC_KNEE_OP_WIDTH 5
2971
2972
2973
2974
2975 #define WM8962_DRC_KNEE2_IP_MASK 0x03E0
2976 #define WM8962_DRC_KNEE2_IP_SHIFT 5
2977 #define WM8962_DRC_KNEE2_IP_WIDTH 5
2978 #define WM8962_DRC_KNEE2_OP_MASK 0x001F
2979 #define WM8962_DRC_KNEE2_OP_SHIFT 0
2980 #define WM8962_DRC_KNEE2_OP_WIDTH 5
2981
2982
2983
2984
2985 #define WM8962_TLB_ENA 0x0002
2986 #define WM8962_TLB_ENA_MASK 0x0002
2987 #define WM8962_TLB_ENA_SHIFT 1
2988 #define WM8962_TLB_ENA_WIDTH 1
2989 #define WM8962_TLB_MODE 0x0001
2990 #define WM8962_TLB_MODE_MASK 0x0001
2991 #define WM8962_TLB_MODE_SHIFT 0
2992 #define WM8962_TLB_MODE_WIDTH 1
2993
2994
2995
2996
2997 #define WM8962_EQ_SHARED_COEFF 0x0004
2998 #define WM8962_EQ_SHARED_COEFF_MASK 0x0004
2999 #define WM8962_EQ_SHARED_COEFF_SHIFT 2
3000 #define WM8962_EQ_SHARED_COEFF_WIDTH 1
3001 #define WM8962_EQ_SHARED_COEFF_SEL 0x0002
3002 #define WM8962_EQ_SHARED_COEFF_SEL_MASK 0x0002
3003 #define WM8962_EQ_SHARED_COEFF_SEL_SHIFT 1
3004 #define WM8962_EQ_SHARED_COEFF_SEL_WIDTH 1
3005 #define WM8962_EQ_ENA 0x0001
3006 #define WM8962_EQ_ENA_MASK 0x0001
3007 #define WM8962_EQ_ENA_SHIFT 0
3008 #define WM8962_EQ_ENA_WIDTH 1
3009
3010
3011
3012
3013 #define WM8962_EQL_B1_GAIN_MASK 0xF800
3014 #define WM8962_EQL_B1_GAIN_SHIFT 11
3015 #define WM8962_EQL_B1_GAIN_WIDTH 5
3016 #define WM8962_EQL_B2_GAIN_MASK 0x07C0
3017 #define WM8962_EQL_B2_GAIN_SHIFT 6
3018 #define WM8962_EQL_B2_GAIN_WIDTH 5
3019 #define WM8962_EQL_B3_GAIN_MASK 0x003E
3020 #define WM8962_EQL_B3_GAIN_SHIFT 1
3021 #define WM8962_EQL_B3_GAIN_WIDTH 5
3022
3023
3024
3025
3026 #define WM8962_EQL_B4_GAIN_MASK 0xF800
3027 #define WM8962_EQL_B4_GAIN_SHIFT 11
3028 #define WM8962_EQL_B4_GAIN_WIDTH 5
3029 #define WM8962_EQL_B5_GAIN_MASK 0x07C0
3030 #define WM8962_EQL_B5_GAIN_SHIFT 6
3031 #define WM8962_EQL_B5_GAIN_WIDTH 5
3032
3033
3034
3035
3036 #define WM8962_EQL_B1_A_MASK 0xFFFF
3037 #define WM8962_EQL_B1_A_SHIFT 0
3038 #define WM8962_EQL_B1_A_WIDTH 16
3039
3040
3041
3042
3043 #define WM8962_EQL_B1_B_MASK 0xFFFF
3044 #define WM8962_EQL_B1_B_SHIFT 0
3045 #define WM8962_EQL_B1_B_WIDTH 16
3046
3047
3048
3049
3050 #define WM8962_EQL_B1_PG_MASK 0xFFFF
3051 #define WM8962_EQL_B1_PG_SHIFT 0
3052 #define WM8962_EQL_B1_PG_WIDTH 16
3053
3054
3055
3056
3057 #define WM8962_EQL_B2_A_MASK 0xFFFF
3058 #define WM8962_EQL_B2_A_SHIFT 0
3059 #define WM8962_EQL_B2_A_WIDTH 16
3060
3061
3062
3063
3064 #define WM8962_EQL_B2_B_MASK 0xFFFF
3065 #define WM8962_EQL_B2_B_SHIFT 0
3066 #define WM8962_EQL_B2_B_WIDTH 16
3067
3068
3069
3070
3071 #define WM8962_EQL_B2_C_MASK 0xFFFF
3072 #define WM8962_EQL_B2_C_SHIFT 0
3073 #define WM8962_EQL_B2_C_WIDTH 16
3074
3075
3076
3077
3078 #define WM8962_EQL_B2_PG_MASK 0xFFFF
3079 #define WM8962_EQL_B2_PG_SHIFT 0
3080 #define WM8962_EQL_B2_PG_WIDTH 16
3081
3082
3083
3084
3085 #define WM8962_EQL_B3_A_MASK 0xFFFF
3086 #define WM8962_EQL_B3_A_SHIFT 0
3087 #define WM8962_EQL_B3_A_WIDTH 16
3088
3089
3090
3091
3092 #define WM8962_EQL_B3_B_MASK 0xFFFF
3093 #define WM8962_EQL_B3_B_SHIFT 0
3094 #define WM8962_EQL_B3_B_WIDTH 16
3095
3096
3097
3098
3099 #define WM8962_EQL_B3_C_MASK 0xFFFF
3100 #define WM8962_EQL_B3_C_SHIFT 0
3101 #define WM8962_EQL_B3_C_WIDTH 16
3102
3103
3104
3105
3106 #define WM8962_EQL_B3_PG_MASK 0xFFFF
3107 #define WM8962_EQL_B3_PG_SHIFT 0
3108 #define WM8962_EQL_B3_PG_WIDTH 16
3109
3110
3111
3112
3113 #define WM8962_EQL_B4_A_MASK 0xFFFF
3114 #define WM8962_EQL_B4_A_SHIFT 0
3115 #define WM8962_EQL_B4_A_WIDTH 16
3116
3117
3118
3119
3120 #define WM8962_EQL_B4_B_MASK 0xFFFF
3121 #define WM8962_EQL_B4_B_SHIFT 0
3122 #define WM8962_EQL_B4_B_WIDTH 16
3123
3124
3125
3126
3127 #define WM8962_EQL_B4_C_MASK 0xFFFF
3128 #define WM8962_EQL_B4_C_SHIFT 0
3129 #define WM8962_EQL_B4_C_WIDTH 16
3130
3131
3132
3133
3134 #define WM8962_EQL_B4_PG_MASK 0xFFFF
3135 #define WM8962_EQL_B4_PG_SHIFT 0
3136 #define WM8962_EQL_B4_PG_WIDTH 16
3137
3138
3139
3140
3141 #define WM8962_EQL_B5_A_MASK 0xFFFF
3142 #define WM8962_EQL_B5_A_SHIFT 0
3143 #define WM8962_EQL_B5_A_WIDTH 16
3144
3145
3146
3147
3148 #define WM8962_EQL_B5_B_MASK 0xFFFF
3149 #define WM8962_EQL_B5_B_SHIFT 0
3150 #define WM8962_EQL_B5_B_WIDTH 16
3151
3152
3153
3154
3155 #define WM8962_EQL_B5_PG_MASK 0xFFFF
3156 #define WM8962_EQL_B5_PG_SHIFT 0
3157 #define WM8962_EQL_B5_PG_WIDTH 16
3158
3159
3160
3161
3162 #define WM8962_EQR_B1_GAIN_MASK 0xF800
3163 #define WM8962_EQR_B1_GAIN_SHIFT 11
3164 #define WM8962_EQR_B1_GAIN_WIDTH 5
3165 #define WM8962_EQR_B2_GAIN_MASK 0x07C0
3166 #define WM8962_EQR_B2_GAIN_SHIFT 6
3167 #define WM8962_EQR_B2_GAIN_WIDTH 5
3168 #define WM8962_EQR_B3_GAIN_MASK 0x003E
3169 #define WM8962_EQR_B3_GAIN_SHIFT 1
3170 #define WM8962_EQR_B3_GAIN_WIDTH 5
3171
3172
3173
3174
3175 #define WM8962_EQR_B4_GAIN_MASK 0xF800
3176 #define WM8962_EQR_B4_GAIN_SHIFT 11
3177 #define WM8962_EQR_B4_GAIN_WIDTH 5
3178 #define WM8962_EQR_B5_GAIN_MASK 0x07C0
3179 #define WM8962_EQR_B5_GAIN_SHIFT 6
3180 #define WM8962_EQR_B5_GAIN_WIDTH 5
3181
3182
3183
3184
3185 #define WM8962_EQR_B1_A_MASK 0xFFFF
3186 #define WM8962_EQR_B1_A_SHIFT 0
3187 #define WM8962_EQR_B1_A_WIDTH 16
3188
3189
3190
3191
3192 #define WM8962_EQR_B1_B_MASK 0xFFFF
3193 #define WM8962_EQR_B1_B_SHIFT 0
3194 #define WM8962_EQR_B1_B_WIDTH 16
3195
3196
3197
3198
3199 #define WM8962_EQR_B1_PG_MASK 0xFFFF
3200 #define WM8962_EQR_B1_PG_SHIFT 0
3201 #define WM8962_EQR_B1_PG_WIDTH 16
3202
3203
3204
3205
3206 #define WM8962_EQR_B2_A_MASK 0xFFFF
3207 #define WM8962_EQR_B2_A_SHIFT 0
3208 #define WM8962_EQR_B2_A_WIDTH 16
3209
3210
3211
3212
3213 #define WM8962_EQR_B2_B_MASK 0xFFFF
3214 #define WM8962_EQR_B2_B_SHIFT 0
3215 #define WM8962_EQR_B2_B_WIDTH 16
3216
3217
3218
3219
3220 #define WM8962_EQR_B2_C_MASK 0xFFFF
3221 #define WM8962_EQR_B2_C_SHIFT 0
3222 #define WM8962_EQR_B2_C_WIDTH 16
3223
3224
3225
3226
3227 #define WM8962_EQR_B2_PG_MASK 0xFFFF
3228 #define WM8962_EQR_B2_PG_SHIFT 0
3229 #define WM8962_EQR_B2_PG_WIDTH 16
3230
3231
3232
3233
3234 #define WM8962_EQR_B3_A_MASK 0xFFFF
3235 #define WM8962_EQR_B3_A_SHIFT 0
3236 #define WM8962_EQR_B3_A_WIDTH 16
3237
3238
3239
3240
3241 #define WM8962_EQR_B3_B_MASK 0xFFFF
3242 #define WM8962_EQR_B3_B_SHIFT 0
3243 #define WM8962_EQR_B3_B_WIDTH 16
3244
3245
3246
3247
3248 #define WM8962_EQR_B3_C_MASK 0xFFFF
3249 #define WM8962_EQR_B3_C_SHIFT 0
3250 #define WM8962_EQR_B3_C_WIDTH 16
3251
3252
3253
3254
3255 #define WM8962_EQR_B3_PG_MASK 0xFFFF
3256 #define WM8962_EQR_B3_PG_SHIFT 0
3257 #define WM8962_EQR_B3_PG_WIDTH 16
3258
3259
3260
3261
3262 #define WM8962_EQR_B4_A_MASK 0xFFFF
3263 #define WM8962_EQR_B4_A_SHIFT 0
3264 #define WM8962_EQR_B4_A_WIDTH 16
3265
3266
3267
3268
3269 #define WM8962_EQR_B4_B_MASK 0xFFFF
3270 #define WM8962_EQR_B4_B_SHIFT 0
3271 #define WM8962_EQR_B4_B_WIDTH 16
3272
3273
3274
3275
3276 #define WM8962_EQR_B4_C_MASK 0xFFFF
3277 #define WM8962_EQR_B4_C_SHIFT 0
3278 #define WM8962_EQR_B4_C_WIDTH 16
3279
3280
3281
3282
3283 #define WM8962_EQR_B4_PG_MASK 0xFFFF
3284 #define WM8962_EQR_B4_PG_SHIFT 0
3285 #define WM8962_EQR_B4_PG_WIDTH 16
3286
3287
3288
3289
3290 #define WM8962_EQR_B5_A_MASK 0xFFFF
3291 #define WM8962_EQR_B5_A_SHIFT 0
3292 #define WM8962_EQR_B5_A_WIDTH 16
3293
3294
3295
3296
3297 #define WM8962_EQR_B5_B_MASK 0xFFFF
3298 #define WM8962_EQR_B5_B_SHIFT 0
3299 #define WM8962_EQR_B5_B_WIDTH 16
3300
3301
3302
3303
3304 #define WM8962_EQR_B5_PG_MASK 0xFFFF
3305 #define WM8962_EQR_B5_PG_SHIFT 0
3306 #define WM8962_EQR_B5_PG_WIDTH 16
3307
3308
3309
3310
3311 #define WM8962_GP2_POL 0x0400
3312 #define WM8962_GP2_POL_MASK 0x0400
3313 #define WM8962_GP2_POL_SHIFT 10
3314 #define WM8962_GP2_POL_WIDTH 1
3315 #define WM8962_GP2_LVL 0x0040
3316 #define WM8962_GP2_LVL_MASK 0x0040
3317 #define WM8962_GP2_LVL_SHIFT 6
3318 #define WM8962_GP2_LVL_WIDTH 1
3319 #define WM8962_GP2_FN_MASK 0x001F
3320 #define WM8962_GP2_FN_SHIFT 0
3321 #define WM8962_GP2_FN_WIDTH 5
3322
3323
3324
3325
3326 #define WM8962_GP3_POL 0x0400
3327 #define WM8962_GP3_POL_MASK 0x0400
3328 #define WM8962_GP3_POL_SHIFT 10
3329 #define WM8962_GP3_POL_WIDTH 1
3330 #define WM8962_GP3_LVL 0x0040
3331 #define WM8962_GP3_LVL_MASK 0x0040
3332 #define WM8962_GP3_LVL_SHIFT 6
3333 #define WM8962_GP3_LVL_WIDTH 1
3334 #define WM8962_GP3_FN_MASK 0x001F
3335 #define WM8962_GP3_FN_SHIFT 0
3336 #define WM8962_GP3_FN_WIDTH 5
3337
3338
3339
3340
3341 #define WM8962_GP5_DIR 0x8000
3342 #define WM8962_GP5_DIR_MASK 0x8000
3343 #define WM8962_GP5_DIR_SHIFT 15
3344 #define WM8962_GP5_DIR_WIDTH 1
3345 #define WM8962_GP5_PU 0x4000
3346 #define WM8962_GP5_PU_MASK 0x4000
3347 #define WM8962_GP5_PU_SHIFT 14
3348 #define WM8962_GP5_PU_WIDTH 1
3349 #define WM8962_GP5_PD 0x2000
3350 #define WM8962_GP5_PD_MASK 0x2000
3351 #define WM8962_GP5_PD_SHIFT 13
3352 #define WM8962_GP5_PD_WIDTH 1
3353 #define WM8962_GP5_POL 0x0400
3354 #define WM8962_GP5_POL_MASK 0x0400
3355 #define WM8962_GP5_POL_SHIFT 10
3356 #define WM8962_GP5_POL_WIDTH 1
3357 #define WM8962_GP5_OP_CFG 0x0200
3358 #define WM8962_GP5_OP_CFG_MASK 0x0200
3359 #define WM8962_GP5_OP_CFG_SHIFT 9
3360 #define WM8962_GP5_OP_CFG_WIDTH 1
3361 #define WM8962_GP5_DB 0x0100
3362 #define WM8962_GP5_DB_MASK 0x0100
3363 #define WM8962_GP5_DB_SHIFT 8
3364 #define WM8962_GP5_DB_WIDTH 1
3365 #define WM8962_GP5_LVL 0x0040
3366 #define WM8962_GP5_LVL_MASK 0x0040
3367 #define WM8962_GP5_LVL_SHIFT 6
3368 #define WM8962_GP5_LVL_WIDTH 1
3369 #define WM8962_GP5_FN_MASK 0x001F
3370 #define WM8962_GP5_FN_SHIFT 0
3371 #define WM8962_GP5_FN_WIDTH 5
3372
3373
3374
3375
3376 #define WM8962_GP6_DIR 0x8000
3377 #define WM8962_GP6_DIR_MASK 0x8000
3378 #define WM8962_GP6_DIR_SHIFT 15
3379 #define WM8962_GP6_DIR_WIDTH 1
3380 #define WM8962_GP6_PU 0x4000
3381 #define WM8962_GP6_PU_MASK 0x4000
3382 #define WM8962_GP6_PU_SHIFT 14
3383 #define WM8962_GP6_PU_WIDTH 1
3384 #define WM8962_GP6_PD 0x2000
3385 #define WM8962_GP6_PD_MASK 0x2000
3386 #define WM8962_GP6_PD_SHIFT 13
3387 #define WM8962_GP6_PD_WIDTH 1
3388 #define WM8962_GP6_POL 0x0400
3389 #define WM8962_GP6_POL_MASK 0x0400
3390 #define WM8962_GP6_POL_SHIFT 10
3391 #define WM8962_GP6_POL_WIDTH 1
3392 #define WM8962_GP6_OP_CFG 0x0200
3393 #define WM8962_GP6_OP_CFG_MASK 0x0200
3394 #define WM8962_GP6_OP_CFG_SHIFT 9
3395 #define WM8962_GP6_OP_CFG_WIDTH 1
3396 #define WM8962_GP6_DB 0x0100
3397 #define WM8962_GP6_DB_MASK 0x0100
3398 #define WM8962_GP6_DB_SHIFT 8
3399 #define WM8962_GP6_DB_WIDTH 1
3400 #define WM8962_GP6_LVL 0x0040
3401 #define WM8962_GP6_LVL_MASK 0x0040
3402 #define WM8962_GP6_LVL_SHIFT 6
3403 #define WM8962_GP6_LVL_WIDTH 1
3404 #define WM8962_GP6_FN_MASK 0x001F
3405 #define WM8962_GP6_FN_SHIFT 0
3406 #define WM8962_GP6_FN_WIDTH 5
3407
3408
3409
3410
3411 #define WM8962_GP6_EINT 0x0020
3412 #define WM8962_GP6_EINT_MASK 0x0020
3413 #define WM8962_GP6_EINT_SHIFT 5
3414 #define WM8962_GP6_EINT_WIDTH 1
3415 #define WM8962_GP5_EINT 0x0010
3416 #define WM8962_GP5_EINT_MASK 0x0010
3417 #define WM8962_GP5_EINT_SHIFT 4
3418 #define WM8962_GP5_EINT_WIDTH 1
3419
3420
3421
3422
3423 #define WM8962_MICSCD_EINT 0x8000
3424 #define WM8962_MICSCD_EINT_MASK 0x8000
3425 #define WM8962_MICSCD_EINT_SHIFT 15
3426 #define WM8962_MICSCD_EINT_WIDTH 1
3427 #define WM8962_MICD_EINT 0x4000
3428 #define WM8962_MICD_EINT_MASK 0x4000
3429 #define WM8962_MICD_EINT_SHIFT 14
3430 #define WM8962_MICD_EINT_WIDTH 1
3431 #define WM8962_FIFOS_ERR_EINT 0x2000
3432 #define WM8962_FIFOS_ERR_EINT_MASK 0x2000
3433 #define WM8962_FIFOS_ERR_EINT_SHIFT 13
3434 #define WM8962_FIFOS_ERR_EINT_WIDTH 1
3435 #define WM8962_ALC_LOCK_EINT 0x1000
3436 #define WM8962_ALC_LOCK_EINT_MASK 0x1000
3437 #define WM8962_ALC_LOCK_EINT_SHIFT 12
3438 #define WM8962_ALC_LOCK_EINT_WIDTH 1
3439 #define WM8962_ALC_THRESH_EINT 0x0800
3440 #define WM8962_ALC_THRESH_EINT_MASK 0x0800
3441 #define WM8962_ALC_THRESH_EINT_SHIFT 11
3442 #define WM8962_ALC_THRESH_EINT_WIDTH 1
3443 #define WM8962_ALC_SAT_EINT 0x0400
3444 #define WM8962_ALC_SAT_EINT_MASK 0x0400
3445 #define WM8962_ALC_SAT_EINT_SHIFT 10
3446 #define WM8962_ALC_SAT_EINT_WIDTH 1
3447 #define WM8962_ALC_PKOVR_EINT 0x0200
3448 #define WM8962_ALC_PKOVR_EINT_MASK 0x0200
3449 #define WM8962_ALC_PKOVR_EINT_SHIFT 9
3450 #define WM8962_ALC_PKOVR_EINT_WIDTH 1
3451 #define WM8962_ALC_NGATE_EINT 0x0100
3452 #define WM8962_ALC_NGATE_EINT_MASK 0x0100
3453 #define WM8962_ALC_NGATE_EINT_SHIFT 8
3454 #define WM8962_ALC_NGATE_EINT_WIDTH 1
3455 #define WM8962_WSEQ_DONE_EINT 0x0080
3456 #define WM8962_WSEQ_DONE_EINT_MASK 0x0080
3457 #define WM8962_WSEQ_DONE_EINT_SHIFT 7
3458 #define WM8962_WSEQ_DONE_EINT_WIDTH 1
3459 #define WM8962_DRC_ACTDET_EINT 0x0040
3460 #define WM8962_DRC_ACTDET_EINT_MASK 0x0040
3461 #define WM8962_DRC_ACTDET_EINT_SHIFT 6
3462 #define WM8962_DRC_ACTDET_EINT_WIDTH 1
3463 #define WM8962_FLL_LOCK_EINT 0x0020
3464 #define WM8962_FLL_LOCK_EINT_MASK 0x0020
3465 #define WM8962_FLL_LOCK_EINT_SHIFT 5
3466 #define WM8962_FLL_LOCK_EINT_WIDTH 1
3467 #define WM8962_PLL3_LOCK_EINT 0x0008
3468 #define WM8962_PLL3_LOCK_EINT_MASK 0x0008
3469 #define WM8962_PLL3_LOCK_EINT_SHIFT 3
3470 #define WM8962_PLL3_LOCK_EINT_WIDTH 1
3471 #define WM8962_PLL2_LOCK_EINT 0x0004
3472 #define WM8962_PLL2_LOCK_EINT_MASK 0x0004
3473 #define WM8962_PLL2_LOCK_EINT_SHIFT 2
3474 #define WM8962_PLL2_LOCK_EINT_WIDTH 1
3475 #define WM8962_TEMP_SHUT_EINT 0x0001
3476 #define WM8962_TEMP_SHUT_EINT_MASK 0x0001
3477 #define WM8962_TEMP_SHUT_EINT_SHIFT 0
3478 #define WM8962_TEMP_SHUT_EINT_WIDTH 1
3479
3480
3481
3482
3483 #define WM8962_IM_GP6_EINT 0x0020
3484 #define WM8962_IM_GP6_EINT_MASK 0x0020
3485 #define WM8962_IM_GP6_EINT_SHIFT 5
3486 #define WM8962_IM_GP6_EINT_WIDTH 1
3487 #define WM8962_IM_GP5_EINT 0x0010
3488 #define WM8962_IM_GP5_EINT_MASK 0x0010
3489 #define WM8962_IM_GP5_EINT_SHIFT 4
3490 #define WM8962_IM_GP5_EINT_WIDTH 1
3491
3492
3493
3494
3495 #define WM8962_IM_MICSCD_EINT 0x8000
3496 #define WM8962_IM_MICSCD_EINT_MASK 0x8000
3497 #define WM8962_IM_MICSCD_EINT_SHIFT 15
3498 #define WM8962_IM_MICSCD_EINT_WIDTH 1
3499 #define WM8962_IM_MICD_EINT 0x4000
3500 #define WM8962_IM_MICD_EINT_MASK 0x4000
3501 #define WM8962_IM_MICD_EINT_SHIFT 14
3502 #define WM8962_IM_MICD_EINT_WIDTH 1
3503 #define WM8962_IM_FIFOS_ERR_EINT 0x2000
3504 #define WM8962_IM_FIFOS_ERR_EINT_MASK 0x2000
3505 #define WM8962_IM_FIFOS_ERR_EINT_SHIFT 13
3506 #define WM8962_IM_FIFOS_ERR_EINT_WIDTH 1
3507 #define WM8962_IM_ALC_LOCK_EINT 0x1000
3508 #define WM8962_IM_ALC_LOCK_EINT_MASK 0x1000
3509 #define WM8962_IM_ALC_LOCK_EINT_SHIFT 12
3510 #define WM8962_IM_ALC_LOCK_EINT_WIDTH 1
3511 #define WM8962_IM_ALC_THRESH_EINT 0x0800
3512 #define WM8962_IM_ALC_THRESH_EINT_MASK 0x0800
3513 #define WM8962_IM_ALC_THRESH_EINT_SHIFT 11
3514 #define WM8962_IM_ALC_THRESH_EINT_WIDTH 1
3515 #define WM8962_IM_ALC_SAT_EINT 0x0400
3516 #define WM8962_IM_ALC_SAT_EINT_MASK 0x0400
3517 #define WM8962_IM_ALC_SAT_EINT_SHIFT 10
3518 #define WM8962_IM_ALC_SAT_EINT_WIDTH 1
3519 #define WM8962_IM_ALC_PKOVR_EINT 0x0200
3520 #define WM8962_IM_ALC_PKOVR_EINT_MASK 0x0200
3521 #define WM8962_IM_ALC_PKOVR_EINT_SHIFT 9
3522 #define WM8962_IM_ALC_PKOVR_EINT_WIDTH 1
3523 #define WM8962_IM_ALC_NGATE_EINT 0x0100
3524 #define WM8962_IM_ALC_NGATE_EINT_MASK 0x0100
3525 #define WM8962_IM_ALC_NGATE_EINT_SHIFT 8
3526 #define WM8962_IM_ALC_NGATE_EINT_WIDTH 1
3527 #define WM8962_IM_WSEQ_DONE_EINT 0x0080
3528 #define WM8962_IM_WSEQ_DONE_EINT_MASK 0x0080
3529 #define WM8962_IM_WSEQ_DONE_EINT_SHIFT 7
3530 #define WM8962_IM_WSEQ_DONE_EINT_WIDTH 1
3531 #define WM8962_IM_DRC_ACTDET_EINT 0x0040
3532 #define WM8962_IM_DRC_ACTDET_EINT_MASK 0x0040
3533 #define WM8962_IM_DRC_ACTDET_EINT_SHIFT 6
3534 #define WM8962_IM_DRC_ACTDET_EINT_WIDTH 1
3535 #define WM8962_IM_FLL_LOCK_EINT 0x0020
3536 #define WM8962_IM_FLL_LOCK_EINT_MASK 0x0020
3537 #define WM8962_IM_FLL_LOCK_EINT_SHIFT 5
3538 #define WM8962_IM_FLL_LOCK_EINT_WIDTH 1
3539 #define WM8962_IM_PLL3_LOCK_EINT 0x0008
3540 #define WM8962_IM_PLL3_LOCK_EINT_MASK 0x0008
3541 #define WM8962_IM_PLL3_LOCK_EINT_SHIFT 3
3542 #define WM8962_IM_PLL3_LOCK_EINT_WIDTH 1
3543 #define WM8962_IM_PLL2_LOCK_EINT 0x0004
3544 #define WM8962_IM_PLL2_LOCK_EINT_MASK 0x0004
3545 #define WM8962_IM_PLL2_LOCK_EINT_SHIFT 2
3546 #define WM8962_IM_PLL2_LOCK_EINT_WIDTH 1
3547 #define WM8962_IM_TEMP_SHUT_EINT 0x0001
3548 #define WM8962_IM_TEMP_SHUT_EINT_MASK 0x0001
3549 #define WM8962_IM_TEMP_SHUT_EINT_SHIFT 0
3550 #define WM8962_IM_TEMP_SHUT_EINT_WIDTH 1
3551
3552
3553
3554
3555 #define WM8962_IRQ_POL 0x0001
3556 #define WM8962_IRQ_POL_MASK 0x0001
3557 #define WM8962_IRQ_POL_SHIFT 0
3558 #define WM8962_IRQ_POL_WIDTH 1
3559
3560
3561
3562
3563 #define WM8962_FLL_LOCK_DB 0x0020
3564 #define WM8962_FLL_LOCK_DB_MASK 0x0020
3565 #define WM8962_FLL_LOCK_DB_SHIFT 5
3566 #define WM8962_FLL_LOCK_DB_WIDTH 1
3567 #define WM8962_PLL3_LOCK_DB 0x0008
3568 #define WM8962_PLL3_LOCK_DB_MASK 0x0008
3569 #define WM8962_PLL3_LOCK_DB_SHIFT 3
3570 #define WM8962_PLL3_LOCK_DB_WIDTH 1
3571 #define WM8962_PLL2_LOCK_DB 0x0004
3572 #define WM8962_PLL2_LOCK_DB_MASK 0x0004
3573 #define WM8962_PLL2_LOCK_DB_SHIFT 2
3574 #define WM8962_PLL2_LOCK_DB_WIDTH 1
3575 #define WM8962_TEMP_SHUT_DB 0x0001
3576 #define WM8962_TEMP_SHUT_DB_MASK 0x0001
3577 #define WM8962_TEMP_SHUT_DB_SHIFT 0
3578 #define WM8962_TEMP_SHUT_DB_WIDTH 1
3579
3580
3581
3582
3583 #define WM8962_MICSCD_IRQ_POL 0x8000
3584 #define WM8962_MICSCD_IRQ_POL_MASK 0x8000
3585 #define WM8962_MICSCD_IRQ_POL_SHIFT 15
3586 #define WM8962_MICSCD_IRQ_POL_WIDTH 1
3587 #define WM8962_MICD_IRQ_POL 0x4000
3588 #define WM8962_MICD_IRQ_POL_MASK 0x4000
3589 #define WM8962_MICD_IRQ_POL_SHIFT 14
3590 #define WM8962_MICD_IRQ_POL_WIDTH 1
3591
3592
3593
3594
3595 #define WM8962_DSP2_ENA 0x0001
3596 #define WM8962_DSP2_ENA_MASK 0x0001
3597 #define WM8962_DSP2_ENA_SHIFT 0
3598 #define WM8962_DSP2_ENA_WIDTH 1
3599
3600
3601
3602
3603 #define WM8962_DSP2_STOPC 0x0020
3604 #define WM8962_DSP2_STOPC_MASK 0x0020
3605 #define WM8962_DSP2_STOPC_SHIFT 5
3606 #define WM8962_DSP2_STOPC_WIDTH 1
3607 #define WM8962_DSP2_STOPS 0x0010
3608 #define WM8962_DSP2_STOPS_MASK 0x0010
3609 #define WM8962_DSP2_STOPS_SHIFT 4
3610 #define WM8962_DSP2_STOPS_WIDTH 1
3611 #define WM8962_DSP2_STOPI 0x0008
3612 #define WM8962_DSP2_STOPI_MASK 0x0008
3613 #define WM8962_DSP2_STOPI_SHIFT 3
3614 #define WM8962_DSP2_STOPI_WIDTH 1
3615 #define WM8962_DSP2_STOP 0x0004
3616 #define WM8962_DSP2_STOP_MASK 0x0004
3617 #define WM8962_DSP2_STOP_SHIFT 2
3618 #define WM8962_DSP2_STOP_WIDTH 1
3619 #define WM8962_DSP2_RUNR 0x0002
3620 #define WM8962_DSP2_RUNR_MASK 0x0002
3621 #define WM8962_DSP2_RUNR_SHIFT 1
3622 #define WM8962_DSP2_RUNR_WIDTH 1
3623 #define WM8962_DSP2_RUN 0x0001
3624 #define WM8962_DSP2_RUN_MASK 0x0001
3625 #define WM8962_DSP2_RUN_SHIFT 0
3626 #define WM8962_DSP2_RUN_WIDTH 1
3627
3628
3629
3630
3631 #define WM8962_DSP2_INSTR_RAM_1024_10_9_0_MASK 0x03FF
3632 #define WM8962_DSP2_INSTR_RAM_1024_10_9_0_SHIFT 0
3633 #define WM8962_DSP2_INSTR_RAM_1024_10_9_0_WIDTH 10
3634
3635
3636
3637
3638 #define WM8962_DSP2_ADDR_RAM_1024_38_37_32_MASK 0x003F
3639 #define WM8962_DSP2_ADDR_RAM_1024_38_37_32_SHIFT 0
3640 #define WM8962_DSP2_ADDR_RAM_1024_38_37_32_WIDTH 6
3641
3642
3643
3644
3645 #define WM8962_DSP2_ADDR_RAM_1024_38_31_16_MASK 0xFFFF
3646 #define WM8962_DSP2_ADDR_RAM_1024_38_31_16_SHIFT 0
3647 #define WM8962_DSP2_ADDR_RAM_1024_38_31_16_WIDTH 16
3648
3649
3650
3651
3652 #define WM8962_DSP2_ADDR_RAM_1024_38_15_0_MASK 0xFFFF
3653 #define WM8962_DSP2_ADDR_RAM_1024_38_15_0_SHIFT 0
3654 #define WM8962_DSP2_ADDR_RAM_1024_38_15_0_WIDTH 16
3655
3656
3657
3658
3659 #define WM8962_DSP2_DATA1_RAM_384_24_23_16_MASK 0x00FF
3660 #define WM8962_DSP2_DATA1_RAM_384_24_23_16_SHIFT 0
3661 #define WM8962_DSP2_DATA1_RAM_384_24_23_16_WIDTH 8
3662
3663
3664
3665
3666 #define WM8962_DSP2_DATA1_RAM_384_24_15_0_MASK 0xFFFF
3667 #define WM8962_DSP2_DATA1_RAM_384_24_15_0_SHIFT 0
3668 #define WM8962_DSP2_DATA1_RAM_384_24_15_0_WIDTH 16
3669
3670
3671
3672
3673 #define WM8962_DSP2_DATA2_RAM_384_24_23_16_MASK 0x00FF
3674 #define WM8962_DSP2_DATA2_RAM_384_24_23_16_SHIFT 0
3675 #define WM8962_DSP2_DATA2_RAM_384_24_23_16_WIDTH 8
3676
3677
3678
3679
3680 #define WM8962_DSP2_DATA2_RAM_384_24_15_0_MASK 0xFFFF
3681 #define WM8962_DSP2_DATA2_RAM_384_24_15_0_SHIFT 0
3682 #define WM8962_DSP2_DATA2_RAM_384_24_15_0_WIDTH 16
3683
3684
3685
3686
3687 #define WM8962_DSP2_DATA3_RAM_384_24_23_16_MASK 0x00FF
3688 #define WM8962_DSP2_DATA3_RAM_384_24_23_16_SHIFT 0
3689 #define WM8962_DSP2_DATA3_RAM_384_24_23_16_WIDTH 8
3690
3691
3692
3693
3694 #define WM8962_DSP2_DATA3_RAM_384_24_15_0_MASK 0xFFFF
3695 #define WM8962_DSP2_DATA3_RAM_384_24_15_0_SHIFT 0
3696 #define WM8962_DSP2_DATA3_RAM_384_24_15_0_WIDTH 16
3697
3698
3699
3700
3701 #define WM8962_DSP2_CMAP_RAM_384_11_10_0_MASK 0x07FF
3702 #define WM8962_DSP2_CMAP_RAM_384_11_10_0_SHIFT 0
3703 #define WM8962_DSP2_CMAP_RAM_384_11_10_0_WIDTH 11
3704
3705
3706
3707
3708 #define WM8962_ADC_RETUNE_SCV 0x0080
3709 #define WM8962_ADC_RETUNE_SCV_MASK 0x0080
3710 #define WM8962_ADC_RETUNE_SCV_SHIFT 7
3711 #define WM8962_ADC_RETUNE_SCV_WIDTH 1
3712 #define WM8962_RETUNEADC_SHARED_COEFF_22_16_MASK 0x007F
3713 #define WM8962_RETUNEADC_SHARED_COEFF_22_16_SHIFT 0
3714 #define WM8962_RETUNEADC_SHARED_COEFF_22_16_WIDTH 7
3715
3716
3717
3718
3719 #define WM8962_RETUNEADC_SHARED_COEFF_15_00_MASK 0xFFFF
3720 #define WM8962_RETUNEADC_SHARED_COEFF_15_00_SHIFT 0
3721 #define WM8962_RETUNEADC_SHARED_COEFF_15_00_WIDTH 16
3722
3723
3724
3725
3726 #define WM8962_DAC_RETUNE_SCV 0x0080
3727 #define WM8962_DAC_RETUNE_SCV_MASK 0x0080
3728 #define WM8962_DAC_RETUNE_SCV_SHIFT 7
3729 #define WM8962_DAC_RETUNE_SCV_WIDTH 1
3730 #define WM8962_RETUNEDAC_SHARED_COEFF_23_16_MASK 0x007F
3731 #define WM8962_RETUNEDAC_SHARED_COEFF_23_16_SHIFT 0
3732 #define WM8962_RETUNEDAC_SHARED_COEFF_23_16_WIDTH 7
3733
3734
3735
3736
3737 #define WM8962_RETUNEDAC_SHARED_COEFF_15_00_MASK 0xFFFF
3738 #define WM8962_RETUNEDAC_SHARED_COEFF_15_00_SHIFT 0
3739 #define WM8962_RETUNEDAC_SHARED_COEFF_15_00_WIDTH 16
3740
3741
3742
3743
3744 #define WM8962_SOUNDSTAGE_ENABLES_23_16_MASK 0x00FF
3745 #define WM8962_SOUNDSTAGE_ENABLES_23_16_SHIFT 0
3746 #define WM8962_SOUNDSTAGE_ENABLES_23_16_WIDTH 8
3747
3748
3749
3750
3751 #define WM8962_SOUNDSTAGE_ENABLES_15_06_MASK 0xFFC0
3752 #define WM8962_SOUNDSTAGE_ENABLES_15_06_SHIFT 6
3753 #define WM8962_SOUNDSTAGE_ENABLES_15_06_WIDTH 10
3754 #define WM8962_RTN_ADC_ENA 0x0020
3755 #define WM8962_RTN_ADC_ENA_MASK 0x0020
3756 #define WM8962_RTN_ADC_ENA_SHIFT 5
3757 #define WM8962_RTN_ADC_ENA_WIDTH 1
3758 #define WM8962_RTN_DAC_ENA 0x0010
3759 #define WM8962_RTN_DAC_ENA_MASK 0x0010
3760 #define WM8962_RTN_DAC_ENA_SHIFT 4
3761 #define WM8962_RTN_DAC_ENA_WIDTH 1
3762 #define WM8962_HDBASS_ENA 0x0008
3763 #define WM8962_HDBASS_ENA_MASK 0x0008
3764 #define WM8962_HDBASS_ENA_SHIFT 3
3765 #define WM8962_HDBASS_ENA_WIDTH 1
3766 #define WM8962_HPF2_ENA 0x0004
3767 #define WM8962_HPF2_ENA_MASK 0x0004
3768 #define WM8962_HPF2_ENA_SHIFT 2
3769 #define WM8962_HPF2_ENA_WIDTH 1
3770 #define WM8962_HPF1_ENA 0x0002
3771 #define WM8962_HPF1_ENA_MASK 0x0002
3772 #define WM8962_HPF1_ENA_SHIFT 1
3773 #define WM8962_HPF1_ENA_WIDTH 1
3774 #define WM8962_VSS_ENA 0x0001
3775 #define WM8962_VSS_ENA_MASK 0x0001
3776 #define WM8962_VSS_ENA_SHIFT 0
3777 #define WM8962_VSS_ENA_WIDTH 1
3778
3779 int wm8962_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack);
3780
3781 #endif