root/sound/soc/codecs/rt5631.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __RTCODEC5631_H__
   3 #define __RTCODEC5631_H__
   4 
   5 
   6 #define RT5631_RESET                            0x00
   7 #define RT5631_SPK_OUT_VOL                      0x02
   8 #define RT5631_HP_OUT_VOL                       0x04
   9 #define RT5631_MONO_AXO_1_2_VOL         0x06
  10 #define RT5631_AUX_IN_VOL                       0x0A
  11 #define RT5631_STEREO_DAC_VOL_1         0x0C
  12 #define RT5631_MIC_CTRL_1                       0x0E
  13 #define RT5631_STEREO_DAC_VOL_2         0x10
  14 #define RT5631_ADC_CTRL_1                       0x12
  15 #define RT5631_ADC_REC_MIXER                    0x14
  16 #define RT5631_ADC_CTRL_2                       0x16
  17 #define RT5631_VDAC_DIG_VOL                     0x18
  18 #define RT5631_OUTMIXER_L_CTRL                  0x1A
  19 #define RT5631_OUTMIXER_R_CTRL                  0x1C
  20 #define RT5631_AXO1MIXER_CTRL                   0x1E
  21 #define RT5631_AXO2MIXER_CTRL                   0x20
  22 #define RT5631_MIC_CTRL_2                       0x22
  23 #define RT5631_DIG_MIC_CTRL                     0x24
  24 #define RT5631_MONO_INPUT_VOL                   0x26
  25 #define RT5631_SPK_MIXER_CTRL                   0x28
  26 #define RT5631_SPK_MONO_OUT_CTRL                0x2A
  27 #define RT5631_SPK_MONO_HP_OUT_CTRL             0x2C
  28 #define RT5631_SDP_CTRL                         0x34
  29 #define RT5631_MONO_SDP_CTRL                    0x36
  30 #define RT5631_STEREO_AD_DA_CLK_CTRL            0x38
  31 #define RT5631_PWR_MANAG_ADD1           0x3A
  32 #define RT5631_PWR_MANAG_ADD2           0x3B
  33 #define RT5631_PWR_MANAG_ADD3           0x3C
  34 #define RT5631_PWR_MANAG_ADD4           0x3E
  35 #define RT5631_GEN_PUR_CTRL_REG         0x40
  36 #define RT5631_GLOBAL_CLK_CTRL                  0x42
  37 #define RT5631_PLL_CTRL                         0x44
  38 #define RT5631_INT_ST_IRQ_CTRL_1                0x48
  39 #define RT5631_INT_ST_IRQ_CTRL_2                0x4A
  40 #define RT5631_GPIO_CTRL                        0x4C
  41 #define RT5631_MISC_CTRL                        0x52
  42 #define RT5631_DEPOP_FUN_CTRL_1         0x54
  43 #define RT5631_DEPOP_FUN_CTRL_2         0x56
  44 #define RT5631_JACK_DET_CTRL                    0x5A
  45 #define RT5631_SOFT_VOL_CTRL                    0x5C
  46 #define RT5631_ALC_CTRL_1                       0x64
  47 #define RT5631_ALC_CTRL_2                       0x65
  48 #define RT5631_ALC_CTRL_3                       0x66
  49 #define RT5631_PSEUDO_SPATL_CTRL                0x68
  50 #define RT5631_INDEX_ADD                        0x6A
  51 #define RT5631_INDEX_DATA                       0x6C
  52 #define RT5631_EQ_CTRL                          0x6E
  53 #define RT5631_VENDOR_ID                        0x7A
  54 #define RT5631_VENDOR_ID1                       0x7C
  55 #define RT5631_VENDOR_ID2                       0x7E
  56 
  57 /* Index of Codec Private Register definition */
  58 #define RT5631_EQ_BW_LOP                        0x00
  59 #define RT5631_EQ_GAIN_LOP                      0x01
  60 #define RT5631_EQ_FC_BP1                        0x02
  61 #define RT5631_EQ_BW_BP1                        0x03
  62 #define RT5631_EQ_GAIN_BP1                      0x04
  63 #define RT5631_EQ_FC_BP2                        0x05
  64 #define RT5631_EQ_BW_BP2                        0x06
  65 #define RT5631_EQ_GAIN_BP2                      0x07
  66 #define RT5631_EQ_FC_BP3                        0x08
  67 #define RT5631_EQ_BW_BP3                        0x09
  68 #define RT5631_EQ_GAIN_BP3                      0x0a
  69 #define RT5631_EQ_BW_HIP                        0x0b
  70 #define RT5631_EQ_GAIN_HIP                      0x0c
  71 #define RT5631_EQ_HPF_A1                        0x0d
  72 #define RT5631_EQ_HPF_A2                        0x0e
  73 #define RT5631_EQ_HPF_GAIN                      0x0f
  74 #define RT5631_EQ_PRE_VOL_CTRL                  0x11
  75 #define RT5631_EQ_POST_VOL_CTRL         0x12
  76 #define RT5631_TEST_MODE_CTRL                   0x39
  77 #define RT5631_CP_INTL_REG2                     0x45
  78 #define RT5631_ADDA_MIXER_INTL_REG3             0x52
  79 #define RT5631_SPK_INTL_CTRL                    0x56
  80 
  81 
  82 /* global definition */
  83 #define RT5631_L_MUTE                                   (0x1 << 15)
  84 #define RT5631_L_MUTE_SHIFT                             15
  85 #define RT5631_L_EN                                     (0x1 << 14)
  86 #define RT5631_L_EN_SHIFT                               14
  87 #define RT5631_R_MUTE                                   (0x1 << 7)
  88 #define RT5631_R_MUTE_SHIFT                             7
  89 #define RT5631_R_EN                                     (0x1 << 6)
  90 #define RT5631_R_EN_SHIFT                               6
  91 #define RT5631_VOL_MASK                         0x1f
  92 #define RT5631_L_VOL_SHIFT                              8
  93 #define RT5631_R_VOL_SHIFT                              0
  94 
  95 /* Speaker Output Control(0x02) */
  96 #define RT5631_SPK_L_VOL_SEL_MASK                       (0x1 << 14)
  97 #define RT5631_SPK_L_VOL_SEL_VMID                       (0x0 << 14)
  98 #define RT5631_SPK_L_VOL_SEL_SPKMIX_L                   (0x1 << 14)
  99 #define RT5631_SPK_R_VOL_SEL_MASK                       (0x1 << 6)
 100 #define RT5631_SPK_R_VOL_SEL_VMID                       (0x0 << 6)
 101 #define RT5631_SPK_R_VOL_SEL_SPKMIX_R                   (0x1 << 6)
 102 
 103 /* Headphone Output Control(0x04) */
 104 #define RT5631_HP_L_VOL_SEL_MASK                        (0x1 << 14)
 105 #define RT5631_HP_L_VOL_SEL_VMID                        (0x0 << 14)
 106 #define RT5631_HP_L_VOL_SEL_OUTMIX_L                    (0x1 << 14)
 107 #define RT5631_HP_R_VOL_SEL_MASK                        (0x1 << 6)
 108 #define RT5631_HP_R_VOL_SEL_VMID                        (0x0 << 6)
 109 #define RT5631_HP_R_VOL_SEL_OUTMIX_R                    (0x1 << 6)
 110 
 111 /* Output Control for AUXOUT/MONO(0x06) */
 112 #define RT5631_AUXOUT_1_VOL_SEL_MASK                    (0x1 << 14)
 113 #define RT5631_AUXOUT_1_VOL_SEL_VMID                    (0x0 << 14)
 114 #define RT5631_AUXOUT_1_VOL_SEL_OUTMIX_L                (0x1 << 14)
 115 #define RT5631_MUTE_MONO                                (0x1 << 13)
 116 #define RT5631_MUTE_MONO_SHIFT                  13
 117 #define RT5631_AUXOUT_2_VOL_SEL_MASK                    (0x1 << 6)
 118 #define RT5631_AUXOUT_2_VOL_SEL_VMID                    (0x0 << 6)
 119 #define RT5631_AUXOUT_2_VOL_SEL_OUTMIX_R                (0x1 << 6)
 120 
 121 /* Microphone Input Control 1(0x0E) */
 122 #define RT5631_MIC1_DIFF_INPUT_CTRL                     (0x1 << 15)
 123 #define RT5631_MIC1_DIFF_INPUT_SHIFT                    15
 124 #define RT5631_MIC2_DIFF_INPUT_CTRL                     (0x1 << 7)
 125 #define RT5631_MIC2_DIFF_INPUT_SHIFT                    7
 126 
 127 /* Stereo DAC Digital Volume2(0x10) */
 128 #define RT5631_DAC_VOL_MASK                             0xff
 129 
 130 /* ADC Recording Mixer Control(0x14) */
 131 #define RT5631_M_OUTMIXER_L_TO_RECMIXER_L               (0x1 << 15)
 132 #define RT5631_M_OUTMIXL_RECMIXL_BIT                    15
 133 #define RT5631_M_MIC1_TO_RECMIXER_L                     (0x1 << 14)
 134 #define RT5631_M_MIC1_RECMIXL_BIT                       14
 135 #define RT5631_M_AXIL_TO_RECMIXER_L                     (0x1 << 13)
 136 #define RT5631_M_AXIL_RECMIXL_BIT                       13
 137 #define RT5631_M_MONO_IN_TO_RECMIXER_L          (0x1 << 12)
 138 #define RT5631_M_MONO_IN_RECMIXL_BIT                    12
 139 #define RT5631_M_OUTMIXER_R_TO_RECMIXER_R               (0x1 << 7)
 140 #define RT5631_M_OUTMIXR_RECMIXR_BIT                    7
 141 #define RT5631_M_MIC2_TO_RECMIXER_R                     (0x1 << 6)
 142 #define RT5631_M_MIC2_RECMIXR_BIT                       6
 143 #define RT5631_M_AXIR_TO_RECMIXER_R                     (0x1 << 5)
 144 #define RT5631_M_AXIR_RECMIXR_BIT                       5
 145 #define RT5631_M_MONO_IN_TO_RECMIXER_R          (0x1 << 4)
 146 #define RT5631_M_MONO_IN_RECMIXR_BIT                    4
 147 
 148 /* Left Output Mixer Control(0x1A) */
 149 #define RT5631_M_RECMIXER_L_TO_OUTMIXER_L               (0x1 << 15)
 150 #define RT5631_M_RECMIXL_OUTMIXL_BIT                    15
 151 #define RT5631_M_RECMIXER_R_TO_OUTMIXER_L               (0x1 << 14)
 152 #define RT5631_M_RECMIXR_OUTMIXL_BIT                    14
 153 #define RT5631_M_DAC_L_TO_OUTMIXER_L                    (0x1 << 13)
 154 #define RT5631_M_DACL_OUTMIXL_BIT                       13
 155 #define RT5631_M_MIC1_TO_OUTMIXER_L                     (0x1 << 12)
 156 #define RT5631_M_MIC1_OUTMIXL_BIT                       12
 157 #define RT5631_M_MIC2_TO_OUTMIXER_L                     (0x1 << 11)
 158 #define RT5631_M_MIC2_OUTMIXL_BIT                       11
 159 #define RT5631_M_MONO_IN_P_TO_OUTMIXER_L                (0x1 << 10)
 160 #define RT5631_M_MONO_INP_OUTMIXL_BIT           10
 161 #define RT5631_M_AXIL_TO_OUTMIXER_L                     (0x1 << 9)
 162 #define RT5631_M_AXIL_OUTMIXL_BIT                       9
 163 #define RT5631_M_AXIR_TO_OUTMIXER_L                     (0x1 << 8)
 164 #define RT5631_M_AXIR_OUTMIXL_BIT                       8
 165 #define RT5631_M_VDAC_TO_OUTMIXER_L                     (0x1 << 7)
 166 #define RT5631_M_VDAC_OUTMIXL_BIT                       7
 167 
 168 /* Right Output Mixer Control(0x1C) */
 169 #define RT5631_M_RECMIXER_L_TO_OUTMIXER_R               (0x1 << 15)
 170 #define RT5631_M_RECMIXL_OUTMIXR_BIT                    15
 171 #define RT5631_M_RECMIXER_R_TO_OUTMIXER_R               (0x1 << 14)
 172 #define RT5631_M_RECMIXR_OUTMIXR_BIT                    14
 173 #define RT5631_M_DAC_R_TO_OUTMIXER_R                    (0x1 << 13)
 174 #define RT5631_M_DACR_OUTMIXR_BIT                       13
 175 #define RT5631_M_MIC1_TO_OUTMIXER_R                     (0x1 << 12)
 176 #define RT5631_M_MIC1_OUTMIXR_BIT                       12
 177 #define RT5631_M_MIC2_TO_OUTMIXER_R                     (0x1 << 11)
 178 #define RT5631_M_MIC2_OUTMIXR_BIT                       11
 179 #define RT5631_M_MONO_IN_N_TO_OUTMIXER_R                (0x1 << 10)
 180 #define RT5631_M_MONO_INN_OUTMIXR_BIT           10
 181 #define RT5631_M_AXIL_TO_OUTMIXER_R                     (0x1 << 9)
 182 #define RT5631_M_AXIL_OUTMIXR_BIT                       9
 183 #define RT5631_M_AXIR_TO_OUTMIXER_R                     (0x1 << 8)
 184 #define RT5631_M_AXIR_OUTMIXR_BIT                       8
 185 #define RT5631_M_VDAC_TO_OUTMIXER_R                     (0x1 << 7)
 186 #define RT5631_M_VDAC_OUTMIXR_BIT                       7
 187 
 188 /* Lout Mixer Control(0x1E) */
 189 #define RT5631_M_MIC1_TO_AXO1MIXER                      (0x1 << 15)
 190 #define RT5631_M_MIC1_AXO1MIX_BIT                       15
 191 #define RT5631_M_MIC2_TO_AXO1MIXER                      (0x1 << 11)
 192 #define RT5631_M_MIC2_AXO1MIX_BIT                       11
 193 #define RT5631_M_OUTMIXER_L_TO_AXO1MIXER                (0x1 << 7)
 194 #define RT5631_M_OUTMIXL_AXO1MIX_BIT                    7
 195 #define RT5631_M_OUTMIXER_R_TO_AXO1MIXER                (0x1 << 6)
 196 #define RT5631_M_OUTMIXR_AXO1MIX_BIT                    6
 197 
 198 /* Rout Mixer Control(0x20) */
 199 #define RT5631_M_MIC1_TO_AXO2MIXER                      (0x1 << 15)
 200 #define RT5631_M_MIC1_AXO2MIX_BIT                       15
 201 #define RT5631_M_MIC2_TO_AXO2MIXER                      (0x1 << 11)
 202 #define RT5631_M_MIC2_AXO2MIX_BIT                       11
 203 #define RT5631_M_OUTMIXER_L_TO_AXO2MIXER                (0x1 << 7)
 204 #define RT5631_M_OUTMIXL_AXO2MIX_BIT                    7
 205 #define RT5631_M_OUTMIXER_R_TO_AXO2MIXER                (0x1 << 6)
 206 #define RT5631_M_OUTMIXR_AXO2MIX_BIT                    6
 207 
 208 /* Micphone Input Control 2(0x22) */
 209 #define RT5631_MIC_BIAS_90_PRECNET_AVDD 1
 210 #define RT5631_MIC_BIAS_75_PRECNET_AVDD 2
 211 
 212 #define RT5631_MIC1_BOOST_CTRL_MASK                     (0xf << 12)
 213 #define RT5631_MIC1_BOOST_CTRL_BYPASS           (0x0 << 12)
 214 #define RT5631_MIC1_BOOST_CTRL_20DB                     (0x1 << 12)
 215 #define RT5631_MIC1_BOOST_CTRL_24DB                     (0x2 << 12)
 216 #define RT5631_MIC1_BOOST_CTRL_30DB                     (0x3 << 12)
 217 #define RT5631_MIC1_BOOST_CTRL_35DB                     (0x4 << 12)
 218 #define RT5631_MIC1_BOOST_CTRL_40DB                     (0x5 << 12)
 219 #define RT5631_MIC1_BOOST_CTRL_34DB                     (0x6 << 12)
 220 #define RT5631_MIC1_BOOST_CTRL_50DB                     (0x7 << 12)
 221 #define RT5631_MIC1_BOOST_CTRL_52DB                     (0x8 << 12)
 222 #define RT5631_MIC1_BOOST_SHIFT                 12
 223 
 224 #define RT5631_MIC2_BOOST_CTRL_MASK                     (0xf << 8)
 225 #define RT5631_MIC2_BOOST_CTRL_BYPASS           (0x0 << 8)
 226 #define RT5631_MIC2_BOOST_CTRL_20DB                     (0x1 << 8)
 227 #define RT5631_MIC2_BOOST_CTRL_24DB                     (0x2 << 8)
 228 #define RT5631_MIC2_BOOST_CTRL_30DB                     (0x3 << 8)
 229 #define RT5631_MIC2_BOOST_CTRL_35DB                     (0x4 << 8)
 230 #define RT5631_MIC2_BOOST_CTRL_40DB                     (0x5 << 8)
 231 #define RT5631_MIC2_BOOST_CTRL_34DB                     (0x6 << 8)
 232 #define RT5631_MIC2_BOOST_CTRL_50DB                     (0x7 << 8)
 233 #define RT5631_MIC2_BOOST_CTRL_52DB                     (0x8 << 8)
 234 #define RT5631_MIC2_BOOST_SHIFT                 8
 235 
 236 #define RT5631_MICBIAS1_VOLT_CTRL_MASK          (0x1 << 7)
 237 #define RT5631_MICBIAS1_VOLT_CTRL_90P                   (0x0 << 7)
 238 #define RT5631_MICBIAS1_VOLT_CTRL_75P                   (0x1 << 7)
 239 
 240 #define RT5631_MICBIAS1_S_C_DET_MASK                    (0x1 << 6)
 241 #define RT5631_MICBIAS1_S_C_DET_DIS                     (0x0 << 6)
 242 #define RT5631_MICBIAS1_S_C_DET_ENA                     (0x1 << 6)
 243 
 244 #define RT5631_MICBIAS1_SHORT_CURR_DET_MASK             (0x3 << 4)
 245 #define RT5631_MICBIAS1_SHORT_CURR_DET_600UA    (0x0 << 4)
 246 #define RT5631_MICBIAS1_SHORT_CURR_DET_1500UA   (0x1 << 4)
 247 #define RT5631_MICBIAS1_SHORT_CURR_DET_2000UA   (0x2 << 4)
 248 
 249 #define RT5631_MICBIAS2_VOLT_CTRL_MASK          (0x1 << 3)
 250 #define RT5631_MICBIAS2_VOLT_CTRL_90P                   (0x0 << 3)
 251 #define RT5631_MICBIAS2_VOLT_CTRL_75P                   (0x1 << 3)
 252 
 253 #define RT5631_MICBIAS2_S_C_DET_MASK                    (0x1 << 2)
 254 #define RT5631_MICBIAS2_S_C_DET_DIS                     (0x0 << 2)
 255 #define RT5631_MICBIAS2_S_C_DET_ENA                     (0x1 << 2)
 256 
 257 #define RT5631_MICBIAS2_SHORT_CURR_DET_MASK             (0x3)
 258 #define RT5631_MICBIAS2_SHORT_CURR_DET_600UA    (0x0)
 259 #define RT5631_MICBIAS2_SHORT_CURR_DET_1500UA   (0x1)
 260 #define RT5631_MICBIAS2_SHORT_CURR_DET_2000UA   (0x2)
 261 
 262 
 263 /* Digital Microphone Control(0x24) */
 264 #define RT5631_DMIC_ENA_MASK                            (0x1 << 15)
 265 #define RT5631_DMIC_ENA_SHIFT                           15
 266 /* DMIC_ENA: DMIC to ADC Digital filter */
 267 #define RT5631_DMIC_ENA                         (0x1 << 15)
 268 /* DMIC_DIS: ADC mixer to ADC Digital filter */
 269 #define RT5631_DMIC_DIS                                 (0x0 << 15)
 270 #define RT5631_DMIC_L_CH_MUTE                           (0x1 << 13)
 271 #define RT5631_DMIC_L_CH_MUTE_SHIFT                     13
 272 #define RT5631_DMIC_R_CH_MUTE                           (0x1 << 12)
 273 #define RT5631_DMIC_R_CH_MUTE_SHIFT                     12
 274 #define RT5631_DMIC_L_CH_LATCH_MASK                     (0x1 << 9)
 275 #define RT5631_DMIC_L_CH_LATCH_RISING                   (0x1 << 9)
 276 #define RT5631_DMIC_L_CH_LATCH_FALLING          (0x0 << 9)
 277 #define RT5631_DMIC_R_CH_LATCH_MASK                     (0x1 << 8)
 278 #define RT5631_DMIC_R_CH_LATCH_RISING                   (0x1 << 8)
 279 #define RT5631_DMIC_R_CH_LATCH_FALLING          (0x0 << 8)
 280 #define RT5631_DMIC_CLK_CTRL_MASK                       (0x3 << 4)
 281 #define RT5631_DMIC_CLK_CTRL_TO_128FS                   (0x0 << 4)
 282 #define RT5631_DMIC_CLK_CTRL_TO_64FS                    (0x1 << 4)
 283 #define RT5631_DMIC_CLK_CTRL_TO_32FS                    (0x2 << 4)
 284 
 285 /* Microphone Input Volume(0x26) */
 286 #define RT5631_MONO_DIFF_INPUT_SHIFT                    15
 287 
 288 /* Speaker Mixer Control(0x28) */
 289 #define RT5631_M_RECMIXER_L_TO_SPKMIXER_L               (0x1 << 15)
 290 #define RT5631_M_RECMIXL_SPKMIXL_BIT                    15
 291 #define RT5631_M_MIC1_P_TO_SPKMIXER_L           (0x1 << 14)
 292 #define RT5631_M_MIC1P_SPKMIXL_BIT                      14
 293 #define RT5631_M_DAC_L_TO_SPKMIXER_L                    (0x1 << 13)
 294 #define RT5631_M_DACL_SPKMIXL_BIT                       13
 295 #define RT5631_M_OUTMIXER_L_TO_SPKMIXER_L               (0x1 << 12)
 296 #define RT5631_M_OUTMIXL_SPKMIXL_BIT                    12
 297 
 298 #define RT5631_M_RECMIXER_R_TO_SPKMIXER_R               (0x1 << 7)
 299 #define RT5631_M_RECMIXR_SPKMIXR_BIT                    7
 300 #define RT5631_M_MIC2_P_TO_SPKMIXER_R           (0x1 << 6)
 301 #define RT5631_M_MIC2P_SPKMIXR_BIT                      6
 302 #define RT5631_M_DAC_R_TO_SPKMIXER_R                    (0x1 << 5)
 303 #define RT5631_M_DACR_SPKMIXR_BIT                       5
 304 #define RT5631_M_OUTMIXER_R_TO_SPKMIXER_R               (0x1 << 4)
 305 #define RT5631_M_OUTMIXR_SPKMIXR_BIT                    4
 306 
 307 /* Speaker/Mono Output Control(0x2A) */
 308 #define RT5631_M_SPKVOL_L_TO_SPOL_MIXER         (0x1 << 15)
 309 #define RT5631_M_SPKVOLL_SPOLMIX_BIT                    15
 310 #define RT5631_M_SPKVOL_R_TO_SPOL_MIXER         (0x1 << 14)
 311 #define RT5631_M_SPKVOLR_SPOLMIX_BIT                    14
 312 #define RT5631_M_SPKVOL_L_TO_SPOR_MIXER         (0x1 << 13)
 313 #define RT5631_M_SPKVOLL_SPORMIX_BIT                    13
 314 #define RT5631_M_SPKVOL_R_TO_SPOR_MIXER         (0x1 << 12)
 315 #define RT5631_M_SPKVOLR_SPORMIX_BIT                    12
 316 #define RT5631_M_OUTVOL_L_TO_MONOMIXER          (0x1 << 11)
 317 #define RT5631_M_OUTVOLL_MONOMIX_BIT                    11
 318 #define RT5631_M_OUTVOL_R_TO_MONOMIXER          (0x1 << 10)
 319 #define RT5631_M_OUTVOLR_MONOMIX_BIT                    10
 320 
 321 /* Speaker/Mono/HP Output Control(0x2C) */
 322 #define RT5631_SPK_L_MUX_SEL_MASK                       (0x3 << 14)
 323 #define RT5631_SPK_L_MUX_SEL_SPKMIXER_L         (0x0 << 14)
 324 #define RT5631_SPK_L_MUX_SEL_MONO_IN                    (0x1 << 14)
 325 #define RT5631_SPK_L_MUX_SEL_DAC_L                      (0x3 << 14)
 326 #define RT5631_SPK_L_MUX_SEL_SHIFT                      14
 327 
 328 #define RT5631_SPK_R_MUX_SEL_MASK                       (0x3 << 10)
 329 #define RT5631_SPK_R_MUX_SEL_SPKMIXER_R         (0x0 << 10)
 330 #define RT5631_SPK_R_MUX_SEL_MONO_IN                    (0x1 << 10)
 331 #define RT5631_SPK_R_MUX_SEL_DAC_R                      (0x3 << 10)
 332 #define RT5631_SPK_R_MUX_SEL_SHIFT                      10
 333 
 334 #define RT5631_MONO_MUX_SEL_MASK                        (0x3 << 6)
 335 #define RT5631_MONO_MUX_SEL_MONOMIXER           (0x0 << 6)
 336 #define RT5631_MONO_MUX_SEL_MONO_IN                     (0x1 << 6)
 337 #define RT5631_MONO_MUX_SEL_SHIFT                       6
 338 
 339 #define RT5631_HP_L_MUX_SEL_MASK                        (0x1 << 3)
 340 #define RT5631_HP_L_MUX_SEL_HPVOL_L                     (0x0 << 3)
 341 #define RT5631_HP_L_MUX_SEL_DAC_L                       (0x1 << 3)
 342 #define RT5631_HP_L_MUX_SEL_SHIFT                       3
 343 
 344 #define RT5631_HP_R_MUX_SEL_MASK                        (0x1 << 2)
 345 #define RT5631_HP_R_MUX_SEL_HPVOL_R                     (0x0 << 2)
 346 #define RT5631_HP_R_MUX_SEL_DAC_R                       (0x1 << 2)
 347 #define RT5631_HP_R_MUX_SEL_SHIFT                       2
 348 
 349 /* Stereo I2S Serial Data Port Control(0x34) */
 350 #define RT5631_SDP_MODE_SEL_MASK                        (0x1 << 15)
 351 #define RT5631_SDP_MODE_SEL_MASTER                      (0x0 << 15)
 352 #define RT5631_SDP_MODE_SEL_SLAVE                       (0x1 << 15)
 353 
 354 #define RT5631_SDP_ADC_CPS_SEL_MASK                     (0x3 << 10)
 355 #define RT5631_SDP_ADC_CPS_SEL_OFF                      (0x0 << 10)
 356 #define RT5631_SDP_ADC_CPS_SEL_U_LAW                    (0x1 << 10)
 357 #define RT5631_SDP_ADC_CPS_SEL_A_LAW                    (0x2 << 10)
 358 
 359 #define RT5631_SDP_DAC_CPS_SEL_MASK                     (0x3 << 8)
 360 #define RT5631_SDP_DAC_CPS_SEL_OFF                      (0x0 << 8)
 361 #define RT5631_SDP_DAC_CPS_SEL_U_LAW                    (0x1 << 8)
 362 #define RT5631_SDP_DAC_CPS_SEL_A_LAW                    (0x2 << 8)
 363 /* 0:Normal 1:Invert */
 364 #define RT5631_SDP_I2S_BCLK_POL_CTRL                    (0x1 << 7)
 365 /* 0:Normal 1:Invert */
 366 #define RT5631_SDP_DAC_R_INV                            (0x1 << 6)
 367 /* 0:ADC data appear at left phase of LRCK
 368  * 1:ADC data appear at right phase of LRCK
 369  */
 370 #define RT5631_SDP_ADC_DATA_L_R_SWAP                    (0x1 << 5)
 371 /* 0:DAC data appear at left phase of LRCK
 372  * 1:DAC data appear at right phase of LRCK
 373  */
 374 #define RT5631_SDP_DAC_DATA_L_R_SWAP                    (0x1 << 4)
 375 
 376 /* Data Length Slection */
 377 #define RT5631_SDP_I2S_DL_MASK                          (0x3 << 2)
 378 #define RT5631_SDP_I2S_DL_16                            (0x0 << 2)
 379 #define RT5631_SDP_I2S_DL_20                            (0x1 << 2)
 380 #define RT5631_SDP_I2S_DL_24                            (0x2 << 2)
 381 #define RT5631_SDP_I2S_DL_8                             (0x3 << 2)
 382 
 383 /* PCM Data Format Selection */
 384 #define RT5631_SDP_I2S_DF_MASK                          (0x3)
 385 #define RT5631_SDP_I2S_DF_I2S                           (0x0)
 386 #define RT5631_SDP_I2S_DF_LEFT                          (0x1)
 387 #define RT5631_SDP_I2S_DF_PCM_A                 (0x2)
 388 #define RT5631_SDP_I2S_DF_PCM_B                 (0x3)
 389 
 390 /* Stereo AD/DA Clock Control(0x38h) */
 391 #define RT5631_I2S_PRE_DIV_MASK                 (0x7 << 13)
 392 #define RT5631_I2S_PRE_DIV_1                            (0x0 << 13)
 393 #define RT5631_I2S_PRE_DIV_2                            (0x1 << 13)
 394 #define RT5631_I2S_PRE_DIV_4                            (0x2 << 13)
 395 #define RT5631_I2S_PRE_DIV_8                            (0x3 << 13)
 396 #define RT5631_I2S_PRE_DIV_16                           (0x4 << 13)
 397 #define RT5631_I2S_PRE_DIV_32                           (0x5 << 13)
 398 /* CLOCK RELATIVE OF BCLK AND LCRK */
 399 #define RT5631_I2S_LRCK_SEL_N_BCLK_MASK         (0x1 << 12)
 400 #define RT5631_I2S_LRCK_SEL_64_BCLK                     (0x0 << 12) /* 64FS */
 401 #define RT5631_I2S_LRCK_SEL_32_BCLK                     (0x1 << 12) /* 32FS */
 402 
 403 #define RT5631_DAC_OSR_SEL_MASK                 (0x3 << 10)
 404 #define RT5631_DAC_OSR_SEL_128FS                        (0x3 << 10)
 405 #define RT5631_DAC_OSR_SEL_64FS                 (0x3 << 10)
 406 #define RT5631_DAC_OSR_SEL_32FS                 (0x3 << 10)
 407 #define RT5631_DAC_OSR_SEL_16FS                 (0x3 << 10)
 408 
 409 #define RT5631_ADC_OSR_SEL_MASK                 (0x3 << 8)
 410 #define RT5631_ADC_OSR_SEL_128FS                        (0x3 << 8)
 411 #define RT5631_ADC_OSR_SEL_64FS                 (0x3 << 8)
 412 #define RT5631_ADC_OSR_SEL_32FS                 (0x3 << 8)
 413 #define RT5631_ADC_OSR_SEL_16FS                 (0x3 << 8)
 414 
 415 #define RT5631_ADDA_FILTER_CLK_SEL_256FS                (0 << 7) /* 256FS */
 416 #define RT5631_ADDA_FILTER_CLK_SEL_384FS                (1 << 7) /* 384FS */
 417 
 418 /* Power managment addition 1 (0x3A) */
 419 #define RT5631_PWR_MAIN_I2S_EN                  (0x1 << 15)
 420 #define RT5631_PWR_MAIN_I2S_BIT                 15
 421 #define RT5631_PWR_CLASS_D                              (0x1 << 12)
 422 #define RT5631_PWR_CLASS_D_BIT                  12
 423 #define RT5631_PWR_ADC_L_CLK                            (0x1 << 11)
 424 #define RT5631_PWR_ADC_L_CLK_BIT                        11
 425 #define RT5631_PWR_ADC_R_CLK                            (0x1 << 10)
 426 #define RT5631_PWR_ADC_R_CLK_BIT                        10
 427 #define RT5631_PWR_DAC_L_CLK                            (0x1 << 9)
 428 #define RT5631_PWR_DAC_L_CLK_BIT                        9
 429 #define RT5631_PWR_DAC_R_CLK                            (0x1 << 8)
 430 #define RT5631_PWR_DAC_R_CLK_BIT                        8
 431 #define RT5631_PWR_DAC_REF                              (0x1 << 7)
 432 #define RT5631_PWR_DAC_REF_BIT                  7
 433 #define RT5631_PWR_DAC_L_TO_MIXER                       (0x1 << 6)
 434 #define RT5631_PWR_DAC_L_TO_MIXER_BIT           6
 435 #define RT5631_PWR_DAC_R_TO_MIXER                       (0x1 << 5)
 436 #define RT5631_PWR_DAC_R_TO_MIXER_BIT           5
 437 
 438 /* Power managment addition 2 (0x3B) */
 439 #define RT5631_PWR_OUTMIXER_L                           (0x1 << 15)
 440 #define RT5631_PWR_OUTMIXER_L_BIT                       15
 441 #define RT5631_PWR_OUTMIXER_R                           (0x1 << 14)
 442 #define RT5631_PWR_OUTMIXER_R_BIT                       14
 443 #define RT5631_PWR_SPKMIXER_L                           (0x1 << 13)
 444 #define RT5631_PWR_SPKMIXER_L_BIT                       13
 445 #define RT5631_PWR_SPKMIXER_R                           (0x1 << 12)
 446 #define RT5631_PWR_SPKMIXER_R_BIT                       12
 447 #define RT5631_PWR_RECMIXER_L                           (0x1 << 11)
 448 #define RT5631_PWR_RECMIXER_L_BIT                       11
 449 #define RT5631_PWR_RECMIXER_R                           (0x1 << 10)
 450 #define RT5631_PWR_RECMIXER_R_BIT                       10
 451 #define RT5631_PWR_MIC1_BOOT_GAIN                       (0x1 << 5)
 452 #define RT5631_PWR_MIC1_BOOT_GAIN_BIT           5
 453 #define RT5631_PWR_MIC2_BOOT_GAIN                       (0x1 << 4)
 454 #define RT5631_PWR_MIC2_BOOT_GAIN_BIT           4
 455 #define RT5631_PWR_MICBIAS1_VOL                 (0x1 << 3)
 456 #define RT5631_PWR_MICBIAS1_VOL_BIT                     3
 457 #define RT5631_PWR_MICBIAS2_VOL                 (0x1 << 2)
 458 #define RT5631_PWR_MICBIAS2_VOL_BIT                     2
 459 #define RT5631_PWR_PLL1                         (0x1 << 1)
 460 #define RT5631_PWR_PLL1_BIT                             1
 461 #define RT5631_PWR_PLL2                         (0x1 << 0)
 462 #define RT5631_PWR_PLL2_BIT                             0
 463 
 464 /* Power managment addition 3(0x3C) */
 465 #define RT5631_PWR_VREF                         (0x1 << 15)
 466 #define RT5631_PWR_VREF_BIT                             15
 467 #define RT5631_PWR_FAST_VREF_CTRL                       (0x1 << 14)
 468 #define RT5631_PWR_FAST_VREF_CTRL_BIT                   14
 469 #define RT5631_PWR_MAIN_BIAS                            (0x1 << 13)
 470 #define RT5631_PWR_MAIN_BIAS_BIT                        13
 471 #define RT5631_PWR_AXO1MIXER                            (0x1 << 11)
 472 #define RT5631_PWR_AXO1MIXER_BIT                        11
 473 #define RT5631_PWR_AXO2MIXER                            (0x1 << 10)
 474 #define RT5631_PWR_AXO2MIXER_BIT                        10
 475 #define RT5631_PWR_MONOMIXER                            (0x1 << 9)
 476 #define RT5631_PWR_MONOMIXER_BIT                        9
 477 #define RT5631_PWR_MONO_DEPOP_DIS                       (0x1 << 8)
 478 #define RT5631_PWR_MONO_DEPOP_DIS_BIT           8
 479 #define RT5631_PWR_MONO_AMP_EN                  (0x1 << 7)
 480 #define RT5631_PWR_MONO_AMP_EN_BIT                      7
 481 #define RT5631_PWR_CHARGE_PUMP                  (0x1 << 4)
 482 #define RT5631_PWR_CHARGE_PUMP_BIT                      4
 483 #define RT5631_PWR_HP_L_AMP                             (0x1 << 3)
 484 #define RT5631_PWR_HP_L_AMP_BIT                 3
 485 #define RT5631_PWR_HP_R_AMP                             (0x1 << 2)
 486 #define RT5631_PWR_HP_R_AMP_BIT                 2
 487 #define RT5631_PWR_HP_DEPOP_DIS                 (0x1 << 1)
 488 #define RT5631_PWR_HP_DEPOP_DIS_BIT                     1
 489 #define RT5631_PWR_HP_AMP_DRIVING                       (0x1 << 0)
 490 #define RT5631_PWR_HP_AMP_DRIVING_BIT           0
 491 
 492 /* Power managment addition 4(0x3E) */
 493 #define RT5631_PWR_SPK_L_VOL                            (0x1 << 15)
 494 #define RT5631_PWR_SPK_L_VOL_BIT                        15
 495 #define RT5631_PWR_SPK_R_VOL                            (0x1 << 14)
 496 #define RT5631_PWR_SPK_R_VOL_BIT                        14
 497 #define RT5631_PWR_LOUT_VOL                             (0x1 << 13)
 498 #define RT5631_PWR_LOUT_VOL_BIT                 13
 499 #define RT5631_PWR_ROUT_VOL                             (0x1 << 12)
 500 #define RT5631_PWR_ROUT_VOL_BIT                 12
 501 #define RT5631_PWR_HP_L_OUT_VOL                 (0x1 << 11)
 502 #define RT5631_PWR_HP_L_OUT_VOL_BIT                     11
 503 #define RT5631_PWR_HP_R_OUT_VOL                 (0x1 << 10)
 504 #define RT5631_PWR_HP_R_OUT_VOL_BIT                     10
 505 #define RT5631_PWR_AXIL_IN_VOL                          (0x1 << 9)
 506 #define RT5631_PWR_AXIL_IN_VOL_BIT                      9
 507 #define RT5631_PWR_AXIR_IN_VOL                  (0x1 << 8)
 508 #define RT5631_PWR_AXIR_IN_VOL_BIT                      8
 509 #define RT5631_PWR_MONO_IN_P_VOL                        (0x1 << 7)
 510 #define RT5631_PWR_MONO_IN_P_VOL_BIT                    7
 511 #define RT5631_PWR_MONO_IN_N_VOL                        (0x1 << 6)
 512 #define RT5631_PWR_MONO_IN_N_VOL_BIT                    6
 513 
 514 /* General Purpose Control Register(0x40) */
 515 #define RT5631_SPK_AMP_AUTO_RATIO_EN                    (0x1 << 15)
 516 
 517 #define RT5631_SPK_AMP_RATIO_CTRL_MASK          (0x7 << 12)
 518 #define RT5631_SPK_AMP_RATIO_CTRL_2_34          (0x0 << 12) /* 7.40DB */
 519 #define RT5631_SPK_AMP_RATIO_CTRL_1_99          (0x1 << 12) /* 5.99DB */
 520 #define RT5631_SPK_AMP_RATIO_CTRL_1_68          (0x2 << 12) /* 4.50DB */
 521 #define RT5631_SPK_AMP_RATIO_CTRL_1_56          (0x3 << 12) /* 3.86DB */
 522 #define RT5631_SPK_AMP_RATIO_CTRL_1_44          (0x4 << 12) /* 3.16DB */
 523 #define RT5631_SPK_AMP_RATIO_CTRL_1_27          (0x5 << 12) /* 2.10DB */
 524 #define RT5631_SPK_AMP_RATIO_CTRL_1_09          (0x6 << 12) /* 0.80DB */
 525 #define RT5631_SPK_AMP_RATIO_CTRL_1_00          (0x7 << 12) /* 0.00DB */
 526 #define RT5631_SPK_AMP_RATIO_CTRL_SHIFT         12
 527 
 528 #define RT5631_STEREO_DAC_HI_PASS_FILT_EN               (0x1 << 11)
 529 #define RT5631_STEREO_ADC_HI_PASS_FILT_EN               (0x1 << 10)
 530 /* Select ADC Wind Filter Clock type */
 531 #define RT5631_ADC_WIND_FILT_MASK                       (0x3 << 4)
 532 #define RT5631_ADC_WIND_FILT_8_16_32K                   (0x0 << 4) /*8/16/32k*/
 533 #define RT5631_ADC_WIND_FILT_11_22_44K          (0x1 << 4) /*11/22/44k*/
 534 #define RT5631_ADC_WIND_FILT_12_24_48K          (0x2 << 4) /*12/24/48k*/
 535 #define RT5631_ADC_WIND_FILT_EN                 (0x1 << 3)
 536 /* SelectADC Wind Filter Corner Frequency */
 537 #define RT5631_ADC_WIND_CNR_FREQ_MASK   (0x7 << 0)
 538 #define RT5631_ADC_WIND_CNR_FREQ_82_113_122     (0x0 << 0) /* 82/113/122 Hz */
 539 #define RT5631_ADC_WIND_CNR_FREQ_102_141_153 (0x1 << 0) /* 102/141/153 Hz */
 540 #define RT5631_ADC_WIND_CNR_FREQ_131_180_156 (0x2 << 0) /* 131/180/156 Hz */
 541 #define RT5631_ADC_WIND_CNR_FREQ_163_225_245 (0x3 << 0) /* 163/225/245 Hz */
 542 #define RT5631_ADC_WIND_CNR_FREQ_204_281_306 (0x4 << 0) /* 204/281/306 Hz */
 543 #define RT5631_ADC_WIND_CNR_FREQ_261_360_392 (0x5 << 0) /* 261/360/392 Hz */
 544 #define RT5631_ADC_WIND_CNR_FREQ_327_450_490 (0x6 << 0) /* 327/450/490 Hz */
 545 #define RT5631_ADC_WIND_CNR_FREQ_408_563_612 (0x7 << 0) /* 408/563/612 Hz */
 546 
 547 /* Global Clock Control Register(0x42) */
 548 #define RT5631_SYSCLK_SOUR_SEL_MASK                     (0x3 << 14)
 549 #define RT5631_SYSCLK_SOUR_SEL_MCLK                     (0x0 << 14)
 550 #define RT5631_SYSCLK_SOUR_SEL_PLL                      (0x1 << 14)
 551 #define RT5631_SYSCLK_SOUR_SEL_PLL_TCK          (0x2 << 14)
 552 
 553 #define RT5631_PLLCLK_SOUR_SEL_MASK                     (0x3 << 12)
 554 #define RT5631_PLLCLK_SOUR_SEL_MCLK                     (0x0 << 12)
 555 #define RT5631_PLLCLK_SOUR_SEL_BCLK                     (0x1 << 12)
 556 #define RT5631_PLLCLK_SOUR_SEL_VBCLK                    (0x2 << 12)
 557 
 558 #define RT5631_PLLCLK_PRE_DIV1                          (0x0 << 11)
 559 #define RT5631_PLLCLK_PRE_DIV2                          (0x1 << 11)
 560 
 561 /* PLL Control(0x44) */
 562 #define RT5631_PLL_CTRL_M_VAL(m)                        ((m)&0xf)
 563 #define RT5631_PLL_CTRL_K_VAL(k)                        (((k)&0x7) << 4)
 564 #define RT5631_PLL_CTRL_N_VAL(n)                        (((n)&0xff) << 8)
 565 
 566 /* Internal Status and IRQ Control2(0x4A) */
 567 #define RT5631_ADC_DATA_SEL_MASK                        (0x3 << 14)
 568 #define RT5631_ADC_DATA_SEL_Disable                     (0x0 << 14)
 569 #define RT5631_ADC_DATA_SEL_MIC1                        (0x1 << 14)
 570 #define RT5631_ADC_DATA_SEL_MIC1_SHIFT          14
 571 #define RT5631_ADC_DATA_SEL_MIC2                        (0x2 << 14)
 572 #define RT5631_ADC_DATA_SEL_MIC2_SHIFT          15
 573 #define RT5631_ADC_DATA_SEL_STO                 (0x3 << 14)
 574 #define RT5631_ADC_DATA_SEL_SHIFT                       14
 575 
 576 /* GPIO Pin Configuration(0x4C) */
 577 #define RT5631_GPIO_PIN_FUN_SEL_MASK                    (0x1 << 15)
 578 #define RT5631_GPIO_PIN_FUN_SEL_IRQ                     (0x1 << 15)
 579 #define RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC               (0x0 << 15)
 580 
 581 #define RT5631_GPIO_DMIC_FUN_SEL_MASK           (0x1 << 3)
 582 #define RT5631_GPIO_DMIC_FUN_SEL_DIMC           (0x1 << 3)
 583 #define RT5631_GPIO_DMIC_FUN_SEL_GPIO                   (0x0 << 3)
 584 
 585 #define RT5631_GPIO_PIN_CON_MASK                        (0x1 << 2)
 586 #define RT5631_GPIO_PIN_SET_INPUT                       (0x0 << 2)
 587 #define RT5631_GPIO_PIN_SET_OUTPUT                      (0x1 << 2)
 588 
 589 /* De-POP function Control 1(0x54) */
 590 #define RT5631_POW_ON_SOFT_GEN                  (0x1 << 15)
 591 #define RT5631_EN_MUTE_UNMUTE_DEPOP                     (0x1 << 14)
 592 #define RT5631_EN_DEPOP2_FOR_HP                 (0x1 << 7)
 593 /* Power Down HPAMP_L Starts Up Signal */
 594 #define RT5631_PD_HPAMP_L_ST_UP                 (0x1 << 5)
 595 /* Power Down HPAMP_R Starts Up Signal */
 596 #define RT5631_PD_HPAMP_R_ST_UP                 (0x1 << 4)
 597 /* Enable left HP mute/unmute depop */
 598 #define RT5631_EN_HP_L_M_UN_MUTE_DEPOP          (0x1 << 1)
 599 /* Enable right HP mute/unmute depop */
 600 #define RT5631_EN_HP_R_M_UN_MUTE_DEPOP          (0x1 << 0)
 601 
 602 /* De-POP Fnction Control(0x56) */
 603 #define RT5631_EN_ONE_BIT_DEPOP                 (0x1 << 15)
 604 #define RT5631_EN_CAP_FREE_DEPOP                        (0x1 << 14)
 605 
 606 /* Jack Detect Control Register(0x5A) */
 607 #define RT5631_JD_USE_MASK                              (0x3 << 14)
 608 #define RT5631_JD_USE_JD2                               (0x3 << 14)
 609 #define RT5631_JD_USE_JD1                               (0x2 << 14)
 610 #define RT5631_JD_USE_GPIO                              (0x1 << 14)
 611 #define RT5631_JD_OFF                                   (0x0 << 14)
 612 /* JD trigger enable for HP */
 613 #define RT5631_JD_HP_EN                                 (0x1 << 11)
 614 #define RT5631_JD_HP_TRI_MASK                           (0x1 << 10)
 615 #define RT5631_JD_HP_TRI_HI                             (0x1 << 10)
 616 #define RT5631_JD_HP_TRI_LO                             (0x1 << 10)
 617 /* JD trigger enable for speaker LP/LN */
 618 #define RT5631_JD_SPK_L_EN                              (0x1 << 9)
 619 #define RT5631_JD_SPK_L_TRI_MASK                        (0x1 << 8)
 620 #define RT5631_JD_SPK_L_TRI_HI                          (0x1 << 8)
 621 #define RT5631_JD_SPK_L_TRI_LO                          (0x0 << 8)
 622 /* JD trigger enable for speaker RP/RN */
 623 #define RT5631_JD_SPK_R_EN                              (0x1 << 7)
 624 #define RT5631_JD_SPK_R_TRI_MASK                        (0x1 << 6)
 625 #define RT5631_JD_SPK_R_TRI_HI                          (0x1 << 6)
 626 #define RT5631_JD_SPK_R_TRI_LO                          (0x0 << 6)
 627 /* JD trigger enable for monoout */
 628 #define RT5631_JD_MONO_EN                               (0x1 << 5)
 629 #define RT5631_JD_MONO_TRI_MASK                 (0x1 << 4)
 630 #define RT5631_JD_MONO_TRI_HI                           (0x1 << 4)
 631 #define RT5631_JD_MONO_TRI_LO                           (0x0 << 4)
 632 /* JD trigger enable for Lout */
 633 #define RT5631_JD_AUX_1_EN                              (0x1 << 3)
 634 #define RT5631_JD_AUX_1_MASK                            (0x1 << 2)
 635 #define RT5631_JD_AUX_1_TRI_HI                          (0x1 << 2)
 636 #define RT5631_JD_AUX_1_TRI_LO                          (0x0 << 2)
 637 /* JD trigger enable for Rout */
 638 #define RT5631_JD_AUX_2_EN                              (0x1 << 1)
 639 #define RT5631_JD_AUX_2_MASK                            (0x1 << 0)
 640 #define RT5631_JD_AUX_2_TRI_HI                          (0x1 << 0)
 641 #define RT5631_JD_AUX_2_TRI_LO                          (0x0 << 0)
 642 
 643 /* ALC CONTROL 1(0x64) */
 644 #define RT5631_ALC_ATTACK_RATE_MASK                     (0x1F << 8)
 645 #define RT5631_ALC_RECOVERY_RATE_MASK           (0x1F << 0)
 646 
 647 /* ALC CONTROL 2(0x65) */
 648 /* select Compensation gain for Noise gate function */
 649 #define RT5631_ALC_COM_NOISE_GATE_MASK          (0xF << 0)
 650 
 651 /* ALC CONTROL 3(0x66) */
 652 #define RT5631_ALC_FUN_MASK                             (0x3 << 14)
 653 #define RT5631_ALC_FUN_DIS                              (0x0 << 14)
 654 #define RT5631_ALC_ENA_DAC_PATH                 (0x1 << 14)
 655 #define RT5631_ALC_ENA_ADC_PATH                 (0x3 << 14)
 656 #define RT5631_ALC_PARA_UPDATE                  (0x1 << 13)
 657 #define RT5631_ALC_LIMIT_LEVEL_MASK                     (0x1F << 8)
 658 #define RT5631_ALC_NOISE_GATE_FUN_MASK          (0x1 << 7)
 659 #define RT5631_ALC_NOISE_GATE_FUN_DIS                   (0x0 << 7)
 660 #define RT5631_ALC_NOISE_GATE_FUN_ENA           (0x1 << 7)
 661 /* ALC noise gate hold data function */
 662 #define RT5631_ALC_NOISE_GATE_H_D_MASK          (0x1 << 6)
 663 #define RT5631_ALC_NOISE_GATE_H_D_DIS                   (0x0 << 6)
 664 #define RT5631_ALC_NOISE_GATE_H_D_ENA           (0x1 << 6)
 665 
 666 /* Psedueo Stereo & Spatial Effect Block Control(0x68) */
 667 #define RT5631_SPATIAL_CTRL_EN                          (0x1 << 15)
 668 #define RT5631_ALL_PASS_FILTER_EN                       (0x1 << 14)
 669 #define RT5631_PSEUDO_STEREO_EN                 (0x1 << 13)
 670 #define RT5631_STEREO_EXPENSION_EN                      (0x1 << 12)
 671 /* 3D gain parameter */
 672 #define RT5631_GAIN_3D_PARA_MASK                (0x3 << 6)
 673 #define RT5631_GAIN_3D_PARA_1_00                (0x0 << 6) /* 3D gain 1.0 */
 674 #define RT5631_GAIN_3D_PARA_1_50                (0x1 << 6) /* 3D gain 1.5 */
 675 #define RT5631_GAIN_3D_PARA_2_00                (0x2 << 6) /* 3D gain 2.0 */
 676 /* 3D ratio parameter */
 677 #define RT5631_RATIO_3D_MASK                    (0x3 << 4)
 678 #define RT5631_RATIO_3D_0_0                     (0x0 << 4) /* 3D ratio 0.0 */
 679 #define RT5631_RATIO_3D_0_66                    (0x1 << 4) /* 3D ratio 0.66 */
 680 #define RT5631_RATIO_3D_1_0                     (0x2 << 4) /* 3D ratio 1.0 */
 681 /* select samplerate for all pass filter */
 682 #define RT5631_APF_FUN_SLE_MASK                 (0x3 << 0)
 683 #define RT5631_APF_FUN_SEL_48K                          (0x3 << 0)
 684 #define RT5631_APF_FUN_SEL_44_1K                        (0x2 << 0)
 685 #define RT5631_APF_FUN_SEL_32K                          (0x1 << 0)
 686 #define RT5631_APF_FUN_DIS                              (0x0 << 0)
 687 
 688 /* EQ CONTROL 1(0x6E) */
 689 #define RT5631_HW_EQ_PATH_SEL_MASK                      (0x1 << 15)
 690 #define RT5631_HW_EQ_PATH_SEL_DAC                       (0x0 << 15)
 691 #define RT5631_HW_EQ_PATH_SEL_ADC                       (0x1 << 15)
 692 #define RT5631_HW_EQ_UPDATE_CTRL                        (0x1 << 14)
 693 
 694 #define RT5631_EN_HW_EQ_HPF2                            (0x1 << 5)
 695 #define RT5631_EN_HW_EQ_HPF1                            (0x1 << 4)
 696 #define RT5631_EN_HW_EQ_BP3                             (0x1 << 3)
 697 #define RT5631_EN_HW_EQ_BP2                             (0x1 << 2)
 698 #define RT5631_EN_HW_EQ_BP1                             (0x1 << 1)
 699 #define RT5631_EN_HW_EQ_LPF                             (0x1 << 0)
 700 
 701 
 702 #endif /* __RTCODEC5631_H__ */