root/sound/soc/atmel/atmel_ssc_dai.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * atmel_ssc_dai.h - ALSA SSC interface for the Atmel  SoC
   4  *
   5  * Copyright (C) 2005 SAN People
   6  * Copyright (C) 2008 Atmel
   7  *
   8  * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com>
   9  *         ATMEL CORP.
  10  *
  11  * Based on at91-ssc.c by
  12  * Frank Mandarino <fmandarino@endrelia.com>
  13  * Based on pxa2xx Platform drivers by
  14  * Liam Girdwood <lrg@slimlogic.co.uk>
  15  */
  16 
  17 #ifndef _ATMEL_SSC_DAI_H
  18 #define _ATMEL_SSC_DAI_H
  19 
  20 #include <linux/types.h>
  21 #include <linux/atmel-ssc.h>
  22 
  23 #include "atmel-pcm.h"
  24 
  25 /* SSC system clock ids */
  26 #define ATMEL_SYSCLK_MCK        0 /* SSC uses AT91 MCK as system clock */
  27 
  28 /* SSC divider ids */
  29 #define ATMEL_SSC_CMR_DIV       0 /* MCK divider for BCLK */
  30 #define ATMEL_SSC_TCMR_PERIOD   1 /* BCLK divider for transmit FS */
  31 #define ATMEL_SSC_RCMR_PERIOD   2 /* BCLK divider for receive FS */
  32 /*
  33  * SSC direction masks
  34  */
  35 #define SSC_DIR_MASK_UNUSED     0
  36 #define SSC_DIR_MASK_PLAYBACK   1
  37 #define SSC_DIR_MASK_CAPTURE    2
  38 
  39 /*
  40  * SSC register values that Atmel left out of <linux/atmel-ssc.h>.  These
  41  * are expected to be used with SSC_BF
  42  */
  43 /* START bit field values */
  44 #define SSC_START_CONTINUOUS    0
  45 #define SSC_START_TX_RX         1
  46 #define SSC_START_LOW_RF        2
  47 #define SSC_START_HIGH_RF       3
  48 #define SSC_START_FALLING_RF    4
  49 #define SSC_START_RISING_RF     5
  50 #define SSC_START_LEVEL_RF      6
  51 #define SSC_START_EDGE_RF       7
  52 #define SSS_START_COMPARE_0     8
  53 
  54 /* CKI bit field values */
  55 #define SSC_CKI_FALLING         0
  56 #define SSC_CKI_RISING          1
  57 
  58 /* CKO bit field values */
  59 #define SSC_CKO_NONE            0
  60 #define SSC_CKO_CONTINUOUS      1
  61 #define SSC_CKO_TRANSFER        2
  62 
  63 /* CKS bit field values */
  64 #define SSC_CKS_DIV             0
  65 #define SSC_CKS_CLOCK           1
  66 #define SSC_CKS_PIN             2
  67 
  68 /* FSEDGE bit field values */
  69 #define SSC_FSEDGE_POSITIVE     0
  70 #define SSC_FSEDGE_NEGATIVE     1
  71 
  72 /* FSOS bit field values */
  73 #define SSC_FSOS_NONE           0
  74 #define SSC_FSOS_NEGATIVE       1
  75 #define SSC_FSOS_POSITIVE       2
  76 #define SSC_FSOS_LOW            3
  77 #define SSC_FSOS_HIGH           4
  78 #define SSC_FSOS_TOGGLE         5
  79 
  80 #define START_DELAY             1
  81 
  82 struct atmel_ssc_state {
  83         u32 ssc_cmr;
  84         u32 ssc_rcmr;
  85         u32 ssc_rfmr;
  86         u32 ssc_tcmr;
  87         u32 ssc_tfmr;
  88         u32 ssc_sr;
  89         u32 ssc_imr;
  90 };
  91 
  92 
  93 struct atmel_ssc_info {
  94         char *name;
  95         struct ssc_device *ssc;
  96         unsigned short dir_mask;        /* 0=unused, 1=playback, 2=capture */
  97         unsigned short initialized;     /* true if SSC has been initialized */
  98         unsigned short daifmt;
  99         unsigned short cmr_div;
 100         unsigned short tcmr_period;
 101         unsigned short rcmr_period;
 102         unsigned int forced_divider;
 103         struct atmel_pcm_dma_params *dma_params[2];
 104         struct atmel_ssc_state ssc_state;
 105         unsigned long mck_rate;
 106 };
 107 
 108 int atmel_ssc_set_audio(int ssc_id);
 109 void atmel_ssc_put_audio(int ssc_id);
 110 
 111 #endif /* _AT91_SSC_DAI_H */