This source file includes following definitions.
- stdclock_is_spdif_master
- is_pro_rate_locked
- snd_vt1724_ac97_ready
- snd_vt1724_ac97_wait_bit
- snd_vt1724_ac97_write
- snd_vt1724_ac97_read
- snd_vt1724_set_gpio_dir
- snd_vt1724_get_gpio_dir
- snd_vt1724_set_gpio_mask
- snd_vt1724_get_gpio_mask
- snd_vt1724_set_gpio_data
- snd_vt1724_get_gpio_data
- vt1724_midi_clear_rx
- get_rawmidi_substream
- vt1724_midi_write
- vt1724_midi_read
- enable_midi_irq
- vt1724_enable_midi_irq
- vt1724_midi_output_open
- vt1724_midi_output_close
- vt1724_midi_output_trigger
- vt1724_midi_output_drain
- vt1724_midi_input_open
- vt1724_midi_input_close
- vt1724_midi_input_trigger
- snd_vt1724_interrupt
- snd_vt1724_pcm_trigger
- stdclock_get_rate
- stdclock_set_rate
- stdclock_set_mclk
- snd_vt1724_set_pro_rate
- snd_vt1724_pcm_hw_params
- snd_vt1724_pcm_hw_free
- snd_vt1724_playback_pro_prepare
- snd_vt1724_playback_pro_pointer
- snd_vt1724_pcm_prepare
- snd_vt1724_pcm_pointer
- set_std_hw_rates
- set_rate_constraints
- constrain_rate_if_locked
- snd_vt1724_playback_pro_open
- snd_vt1724_capture_pro_open
- snd_vt1724_playback_pro_close
- snd_vt1724_capture_pro_close
- snd_vt1724_pcm_profi
- update_spdif_bits
- update_spdif_rate
- snd_vt1724_playback_spdif_prepare
- snd_vt1724_playback_spdif_open
- snd_vt1724_playback_spdif_close
- snd_vt1724_capture_spdif_open
- snd_vt1724_capture_spdif_close
- snd_vt1724_pcm_spdif
- snd_vt1724_playback_indep_prepare
- snd_vt1724_playback_indep_open
- snd_vt1724_playback_indep_close
- snd_vt1724_pcm_indep
- snd_vt1724_ac97_mixer
- eeprom_triple
- snd_vt1724_proc_read
- snd_vt1724_proc_init
- snd_vt1724_eeprom_info
- snd_vt1724_eeprom_get
- snd_vt1724_spdif_info
- encode_spdif_bits
- decode_spdif_bits
- snd_vt1724_spdif_default_get
- snd_vt1724_spdif_default_put
- snd_vt1724_spdif_maskc_get
- snd_vt1724_spdif_maskp_get
- snd_vt1724_spdif_sw_get
- snd_vt1724_spdif_sw_put
- snd_vt1724_gpio_get
- snd_ice1712_gpio_put
- snd_vt1724_pro_internal_clock_info
- snd_vt1724_pro_internal_clock_get
- stdclock_get_spdif_master_type
- stdclock_set_spdif_clock
- snd_vt1724_pro_internal_clock_put
- snd_vt1724_pro_rate_locking_get
- snd_vt1724_pro_rate_locking_put
- snd_vt1724_pro_rate_reset_get
- snd_vt1724_pro_rate_reset_put
- snd_vt1724_pro_route_info
- analog_route_shift
- digital_route_shift
- snd_ice1724_get_route_val
- snd_ice1724_put_route_val
- snd_vt1724_pro_route_analog_get
- snd_vt1724_pro_route_analog_put
- snd_vt1724_pro_route_spdif_get
- snd_vt1724_pro_route_spdif_put
- snd_vt1724_pro_peak_info
- snd_vt1724_pro_peak_get
- wait_i2c_busy
- snd_vt1724_read_i2c
- snd_vt1724_write_i2c
- snd_vt1724_read_eeprom
- snd_vt1724_chip_reset
- snd_vt1724_chip_init
- snd_vt1724_spdif_build_controls
- snd_vt1724_build_controls
- snd_vt1724_free
- snd_vt1724_dev_free
- snd_vt1724_create
- snd_vt1724_probe
- snd_vt1724_remove
- snd_vt1724_suspend
- snd_vt1724_resume
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11 #include <linux/delay.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/slab.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <sound/core.h>
19 #include <sound/info.h>
20 #include <sound/rawmidi.h>
21 #include <sound/initval.h>
22
23 #include <sound/asoundef.h>
24
25 #include "ice1712.h"
26 #include "envy24ht.h"
27
28
29 #include "amp.h"
30 #include "revo.h"
31 #include "aureon.h"
32 #include "vt1720_mobo.h"
33 #include "pontis.h"
34 #include "prodigy192.h"
35 #include "prodigy_hifi.h"
36 #include "juli.h"
37 #include "maya44.h"
38 #include "phase.h"
39 #include "wtm.h"
40 #include "se.h"
41 #include "quartet.h"
42 #include "psc724.h"
43
44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
45 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
46 MODULE_LICENSE("GPL");
47 MODULE_SUPPORTED_DEVICE("{"
48 REVO_DEVICE_DESC
49 AMP_AUDIO2000_DEVICE_DESC
50 AUREON_DEVICE_DESC
51 VT1720_MOBO_DEVICE_DESC
52 PONTIS_DEVICE_DESC
53 PRODIGY192_DEVICE_DESC
54 PRODIGY_HIFI_DEVICE_DESC
55 JULI_DEVICE_DESC
56 MAYA44_DEVICE_DESC
57 PHASE_DEVICE_DESC
58 WTM_DEVICE_DESC
59 SE_DEVICE_DESC
60 QTET_DEVICE_DESC
61 "{VIA,VT1720},"
62 "{VIA,VT1724},"
63 "{ICEnsemble,Generic ICE1724},"
64 "{ICEnsemble,Generic Envy24HT}"
65 "{ICEnsemble,Generic Envy24PT}}");
66
67 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
68 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
69 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
70 static char *model[SNDRV_CARDS];
71
72 module_param_array(index, int, NULL, 0444);
73 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
74 module_param_array(id, charp, NULL, 0444);
75 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
76 module_param_array(enable, bool, NULL, 0444);
77 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
78 module_param_array(model, charp, NULL, 0444);
79 MODULE_PARM_DESC(model, "Use the given board model.");
80
81
82
83 static const struct pci_device_id snd_vt1724_ids[] = {
84 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
85 { 0, }
86 };
87
88 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
89
90
91 static int PRO_RATE_LOCKED;
92 static int PRO_RATE_RESET = 1;
93 static unsigned int PRO_RATE_DEFAULT = 44100;
94
95 static const char * const ext_clock_names[1] = { "IEC958 In" };
96
97
98
99
100
101
102
103
104
105
106 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
107 {
108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
109 }
110
111
112
113
114 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
115 {
116 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
117 }
118
119
120
121
122
123 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
124 {
125 unsigned char old_cmd;
126 int tm;
127 for (tm = 0; tm < 0x10000; tm++) {
128 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
129 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
130 continue;
131 if (!(old_cmd & VT1724_AC97_READY))
132 continue;
133 return old_cmd;
134 }
135 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n");
136 return old_cmd;
137 }
138
139 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
140 {
141 int tm;
142 for (tm = 0; tm < 0x10000; tm++)
143 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
144 return 0;
145 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n");
146 return -EIO;
147 }
148
149 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
150 unsigned short reg,
151 unsigned short val)
152 {
153 struct snd_ice1712 *ice = ac97->private_data;
154 unsigned char old_cmd;
155
156 old_cmd = snd_vt1724_ac97_ready(ice);
157 old_cmd &= ~VT1724_AC97_ID_MASK;
158 old_cmd |= ac97->num;
159 outb(reg, ICEMT1724(ice, AC97_INDEX));
160 outw(val, ICEMT1724(ice, AC97_DATA));
161 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
162 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
163 }
164
165 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
166 {
167 struct snd_ice1712 *ice = ac97->private_data;
168 unsigned char old_cmd;
169
170 old_cmd = snd_vt1724_ac97_ready(ice);
171 old_cmd &= ~VT1724_AC97_ID_MASK;
172 old_cmd |= ac97->num;
173 outb(reg, ICEMT1724(ice, AC97_INDEX));
174 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
175 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
176 return ~0;
177 return inw(ICEMT1724(ice, AC97_DATA));
178 }
179
180
181
182
183
184
185
186 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
187 {
188 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
189 inw(ICEREG1724(ice, GPIO_DIRECTION));
190 }
191
192
193 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
194 {
195 return inl(ICEREG1724(ice, GPIO_DIRECTION));
196 }
197
198
199 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
200 {
201 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
202 if (!ice->vt1720)
203 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
204 inw(ICEREG1724(ice, GPIO_WRITE_MASK));
205 }
206
207 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
208 {
209 unsigned int mask;
210 if (!ice->vt1720)
211 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
212 else
213 mask = 0;
214 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
215 return mask;
216 }
217
218 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
219 {
220 outw(data, ICEREG1724(ice, GPIO_DATA));
221 if (!ice->vt1720)
222 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
223 inw(ICEREG1724(ice, GPIO_DATA));
224 }
225
226 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
227 {
228 unsigned int data;
229 if (!ice->vt1720)
230 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
231 else
232 data = 0;
233 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
234 return data;
235 }
236
237
238
239
240
241 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
242 {
243 unsigned int count;
244
245 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
246 inb(ICEREG1724(ice, MPU_DATA));
247 }
248
249 static inline struct snd_rawmidi_substream *
250 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
251 {
252 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
253 struct snd_rawmidi_substream, list);
254 }
255
256 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
257
258 static void vt1724_midi_write(struct snd_ice1712 *ice)
259 {
260 struct snd_rawmidi_substream *s;
261 int count, i;
262 u8 buffer[32];
263
264 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
265 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
266 if (count > 0) {
267 count = snd_rawmidi_transmit(s, buffer, count);
268 for (i = 0; i < count; ++i)
269 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
270 }
271
272
273
274 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
275 !snd_rawmidi_transmit_empty(s));
276 }
277
278 static void vt1724_midi_read(struct snd_ice1712 *ice)
279 {
280 struct snd_rawmidi_substream *s;
281 int count, i;
282 u8 buffer[32];
283
284 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
285 count = inb(ICEREG1724(ice, MPU_RXFIFO));
286 if (count > 0) {
287 count = min(count, 32);
288 for (i = 0; i < count; ++i)
289 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
290 snd_rawmidi_receive(s, buffer, count);
291 }
292 }
293
294
295 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
296 {
297 u8 mask = inb(ICEREG1724(ice, IRQMASK));
298 if (enable)
299 mask &= ~flag;
300 else
301 mask |= flag;
302 outb(mask, ICEREG1724(ice, IRQMASK));
303 }
304
305 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
306 u8 flag, int enable)
307 {
308 struct snd_ice1712 *ice = substream->rmidi->private_data;
309
310 spin_lock_irq(&ice->reg_lock);
311 enable_midi_irq(ice, flag, enable);
312 spin_unlock_irq(&ice->reg_lock);
313 }
314
315 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
316 {
317 return 0;
318 }
319
320 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
321 {
322 return 0;
323 }
324
325 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
326 {
327 struct snd_ice1712 *ice = s->rmidi->private_data;
328 unsigned long flags;
329
330 spin_lock_irqsave(&ice->reg_lock, flags);
331 if (up) {
332 ice->midi_output = 1;
333 vt1724_midi_write(ice);
334 } else {
335 ice->midi_output = 0;
336 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
337 }
338 spin_unlock_irqrestore(&ice->reg_lock, flags);
339 }
340
341 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
342 {
343 struct snd_ice1712 *ice = s->rmidi->private_data;
344 unsigned long timeout;
345
346 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
347
348 timeout = jiffies + msecs_to_jiffies(15);
349 do {
350 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
351 break;
352 schedule_timeout_uninterruptible(1);
353 } while (time_after(timeout, jiffies));
354 }
355
356 static const struct snd_rawmidi_ops vt1724_midi_output_ops = {
357 .open = vt1724_midi_output_open,
358 .close = vt1724_midi_output_close,
359 .trigger = vt1724_midi_output_trigger,
360 .drain = vt1724_midi_output_drain,
361 };
362
363 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
364 {
365 vt1724_midi_clear_rx(s->rmidi->private_data);
366 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
367 return 0;
368 }
369
370 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
371 {
372 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
373 return 0;
374 }
375
376 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
377 {
378 struct snd_ice1712 *ice = s->rmidi->private_data;
379 unsigned long flags;
380
381 spin_lock_irqsave(&ice->reg_lock, flags);
382 if (up) {
383 ice->midi_input = 1;
384 vt1724_midi_read(ice);
385 } else {
386 ice->midi_input = 0;
387 }
388 spin_unlock_irqrestore(&ice->reg_lock, flags);
389 }
390
391 static const struct snd_rawmidi_ops vt1724_midi_input_ops = {
392 .open = vt1724_midi_input_open,
393 .close = vt1724_midi_input_close,
394 .trigger = vt1724_midi_input_trigger,
395 };
396
397
398
399
400
401
402 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
403 {
404 struct snd_ice1712 *ice = dev_id;
405 unsigned char status;
406 unsigned char status_mask =
407 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
408 int handled = 0;
409 int timeout = 0;
410
411 while (1) {
412 status = inb(ICEREG1724(ice, IRQSTAT));
413 status &= status_mask;
414 if (status == 0)
415 break;
416 spin_lock(&ice->reg_lock);
417 if (++timeout > 10) {
418 status = inb(ICEREG1724(ice, IRQSTAT));
419 dev_err(ice->card->dev,
420 "Too long irq loop, status = 0x%x\n", status);
421 if (status & VT1724_IRQ_MPU_TX) {
422 dev_err(ice->card->dev, "Disabling MPU_TX\n");
423 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
424 }
425 spin_unlock(&ice->reg_lock);
426 break;
427 }
428 handled = 1;
429 if (status & VT1724_IRQ_MPU_TX) {
430 if (ice->midi_output)
431 vt1724_midi_write(ice);
432 else
433 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
434
435
436
437
438
439 status_mask &= ~VT1724_IRQ_MPU_TX;
440 }
441 if (status & VT1724_IRQ_MPU_RX) {
442 if (ice->midi_input)
443 vt1724_midi_read(ice);
444 else
445 vt1724_midi_clear_rx(ice);
446 }
447
448 outb(status, ICEREG1724(ice, IRQSTAT));
449 spin_unlock(&ice->reg_lock);
450 if (status & VT1724_IRQ_MTPCM) {
451
452
453
454
455
456
457
458
459
460
461
462 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
463 if (mtstat & VT1724_MULTI_PDMA0) {
464 if (ice->playback_pro_substream)
465 snd_pcm_period_elapsed(ice->playback_pro_substream);
466 }
467 if (mtstat & VT1724_MULTI_RDMA0) {
468 if (ice->capture_pro_substream)
469 snd_pcm_period_elapsed(ice->capture_pro_substream);
470 }
471 if (mtstat & VT1724_MULTI_PDMA1) {
472 if (ice->playback_con_substream_ds[0])
473 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
474 }
475 if (mtstat & VT1724_MULTI_PDMA2) {
476 if (ice->playback_con_substream_ds[1])
477 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
478 }
479 if (mtstat & VT1724_MULTI_PDMA3) {
480 if (ice->playback_con_substream_ds[2])
481 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
482 }
483 if (mtstat & VT1724_MULTI_PDMA4) {
484 if (ice->playback_con_substream)
485 snd_pcm_period_elapsed(ice->playback_con_substream);
486 }
487 if (mtstat & VT1724_MULTI_RDMA1) {
488 if (ice->capture_con_substream)
489 snd_pcm_period_elapsed(ice->capture_con_substream);
490 }
491
492 outb(mtstat, ICEMT1724(ice, IRQ));
493
494 if (mtstat & VT1724_MULTI_FIFO_ERR) {
495 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
496 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
497 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
498
499 }
500
501 }
502 }
503 return IRQ_RETVAL(handled);
504 }
505
506
507
508
509
510 static const unsigned int rates[] = {
511 8000, 9600, 11025, 12000, 16000, 22050, 24000,
512 32000, 44100, 48000, 64000, 88200, 96000,
513 176400, 192000,
514 };
515
516 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
517 .count = ARRAY_SIZE(rates) - 2,
518 .list = rates,
519 .mask = 0,
520 };
521
522 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
523 .count = ARRAY_SIZE(rates) - 5,
524 .list = rates,
525 .mask = 0,
526 };
527
528 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
529 .count = ARRAY_SIZE(rates),
530 .list = rates,
531 .mask = 0,
532 };
533
534 struct vt1724_pcm_reg {
535 unsigned int addr;
536 unsigned int size;
537 unsigned int count;
538 unsigned int start;
539 };
540
541 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
542 {
543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
544 unsigned char what;
545 unsigned char old;
546 struct snd_pcm_substream *s;
547
548 what = 0;
549 snd_pcm_group_for_each_entry(s, substream) {
550 if (snd_pcm_substream_chip(s) == ice) {
551 const struct vt1724_pcm_reg *reg;
552 reg = s->runtime->private_data;
553 what |= reg->start;
554 snd_pcm_trigger_done(s, substream);
555 }
556 }
557
558 switch (cmd) {
559 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
560 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
561 spin_lock(&ice->reg_lock);
562 old = inb(ICEMT1724(ice, DMA_PAUSE));
563 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
564 old |= what;
565 else
566 old &= ~what;
567 outb(old, ICEMT1724(ice, DMA_PAUSE));
568 spin_unlock(&ice->reg_lock);
569 break;
570
571 case SNDRV_PCM_TRIGGER_START:
572 case SNDRV_PCM_TRIGGER_STOP:
573 case SNDRV_PCM_TRIGGER_SUSPEND:
574 spin_lock(&ice->reg_lock);
575 old = inb(ICEMT1724(ice, DMA_CONTROL));
576 if (cmd == SNDRV_PCM_TRIGGER_START)
577 old |= what;
578 else
579 old &= ~what;
580 outb(old, ICEMT1724(ice, DMA_CONTROL));
581 spin_unlock(&ice->reg_lock);
582 break;
583
584 case SNDRV_PCM_TRIGGER_RESUME:
585
586 break;
587
588 default:
589 return -EINVAL;
590 }
591 return 0;
592 }
593
594
595
596
597 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
598 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
599 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
600 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
601
602 static const unsigned int stdclock_rate_list[16] = {
603 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
604 22050, 11025, 88200, 176400, 0, 192000, 64000
605 };
606
607 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
608 {
609 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
610 }
611
612 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
613 {
614 int i;
615 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
616 if (stdclock_rate_list[i] == rate) {
617 outb(i, ICEMT1724(ice, RATE));
618 return;
619 }
620 }
621 }
622
623 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
624 unsigned int rate)
625 {
626 unsigned char val, old;
627
628 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
629 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
630 if (rate > 96000)
631 val |= VT1724_MT_I2S_MCLK_128X;
632 else
633 val &= ~VT1724_MT_I2S_MCLK_128X;
634 if (val != old) {
635 outb(val, ICEMT1724(ice, I2S_FORMAT));
636
637 return 1;
638 }
639 }
640
641 return 0;
642 }
643
644 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
645 int force)
646 {
647 unsigned long flags;
648 unsigned char mclk_change;
649 unsigned int i, old_rate;
650 bool call_set_rate = false;
651
652 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
653 return -EINVAL;
654
655 spin_lock_irqsave(&ice->reg_lock, flags);
656 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
657 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
658
659 spin_unlock_irqrestore(&ice->reg_lock, flags);
660 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
661 }
662 if (!force && is_pro_rate_locked(ice)) {
663
664
665 spin_unlock_irqrestore(&ice->reg_lock, flags);
666 return (rate == ice->cur_rate) ? 0 : -EBUSY;
667 }
668
669 if (force || !ice->is_spdif_master(ice)) {
670
671
672 old_rate = ice->get_rate(ice);
673 if (force || (old_rate != rate))
674 call_set_rate = true;
675 else if (rate == ice->cur_rate) {
676 spin_unlock_irqrestore(&ice->reg_lock, flags);
677 return 0;
678 }
679 }
680
681 ice->cur_rate = rate;
682 spin_unlock_irqrestore(&ice->reg_lock, flags);
683
684 if (call_set_rate)
685 ice->set_rate(ice, rate);
686
687
688 mclk_change = ice->set_mclk(ice, rate);
689
690 if (mclk_change && ice->gpio.i2s_mclk_changed)
691 ice->gpio.i2s_mclk_changed(ice);
692 if (ice->gpio.set_pro_rate)
693 ice->gpio.set_pro_rate(ice, rate);
694
695
696 for (i = 0; i < ice->akm_codecs; i++) {
697 if (ice->akm[i].ops.set_rate_val)
698 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
699 }
700 if (ice->spdif.ops.setup_rate)
701 ice->spdif.ops.setup_rate(ice, rate);
702
703 return 0;
704 }
705
706 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
707 struct snd_pcm_hw_params *hw_params)
708 {
709 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
710 int i, chs, err;
711
712 chs = params_channels(hw_params);
713 mutex_lock(&ice->open_mutex);
714
715 if (substream == ice->playback_pro_substream) {
716
717 chs = chs / 2 - 1;
718 for (i = 0; i < chs; i++) {
719 if (ice->pcm_reserved[i] &&
720 ice->pcm_reserved[i] != substream) {
721 mutex_unlock(&ice->open_mutex);
722 return -EBUSY;
723 }
724 ice->pcm_reserved[i] = substream;
725 }
726 for (; i < 3; i++) {
727 if (ice->pcm_reserved[i] == substream)
728 ice->pcm_reserved[i] = NULL;
729 }
730 } else {
731 for (i = 0; i < 3; i++) {
732
733 if (ice->playback_con_substream_ds[i] == substream) {
734 if (ice->pcm_reserved[i] &&
735 ice->pcm_reserved[i] != substream) {
736 mutex_unlock(&ice->open_mutex);
737 return -EBUSY;
738 }
739 ice->pcm_reserved[i] = substream;
740 break;
741 }
742 }
743 }
744 mutex_unlock(&ice->open_mutex);
745
746 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
747 if (err < 0)
748 return err;
749
750 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
751 }
752
753 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
754 {
755 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
756 int i;
757
758 mutex_lock(&ice->open_mutex);
759
760 for (i = 0; i < 3; i++)
761 if (ice->pcm_reserved[i] == substream)
762 ice->pcm_reserved[i] = NULL;
763 mutex_unlock(&ice->open_mutex);
764 return snd_pcm_lib_free_pages(substream);
765 }
766
767 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
768 {
769 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
770 unsigned char val;
771 unsigned int size;
772
773 spin_lock_irq(&ice->reg_lock);
774 val = (8 - substream->runtime->channels) >> 1;
775 outb(val, ICEMT1724(ice, BURST));
776
777 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
778
779 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
780
781 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
782 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
783 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
784
785 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
786 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
787
788 spin_unlock_irq(&ice->reg_lock);
789
790
791
792
793
794
795
796
797
798 return 0;
799 }
800
801 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
802 {
803 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
804 size_t ptr;
805
806 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
807 return 0;
808 #if 0
809 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
810 if (ptr < substream->runtime->dma_addr) {
811 dev_dbg(ice->card->dev, "invalid negative ptr\n");
812 return 0;
813 }
814 ptr -= substream->runtime->dma_addr;
815 ptr = bytes_to_frames(substream->runtime, ptr);
816 if (ptr >= substream->runtime->buffer_size) {
817 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
818 (int)ptr, (int)substream->runtime->period_size);
819 return 0;
820 }
821 #else
822 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
823 ptr = (ptr + 1) << 2;
824 ptr = bytes_to_frames(substream->runtime, ptr);
825 if (!ptr)
826 ;
827 else if (ptr <= substream->runtime->buffer_size)
828 ptr = substream->runtime->buffer_size - ptr;
829 else {
830 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
831 (int)ptr, (int)substream->runtime->buffer_size);
832 ptr = 0;
833 }
834 #endif
835 return ptr;
836 }
837
838 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
839 {
840 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
841 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
842
843 spin_lock_irq(&ice->reg_lock);
844 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
845 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
846 ice->profi_port + reg->size);
847 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
848 ice->profi_port + reg->count);
849 spin_unlock_irq(&ice->reg_lock);
850 return 0;
851 }
852
853 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
854 {
855 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
856 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
857 size_t ptr;
858
859 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
860 return 0;
861 #if 0
862 ptr = inl(ice->profi_port + reg->addr);
863 ptr -= substream->runtime->dma_addr;
864 return bytes_to_frames(substream->runtime, ptr);
865 #else
866 ptr = inw(ice->profi_port + reg->size);
867 ptr = (ptr + 1) << 2;
868 ptr = bytes_to_frames(substream->runtime, ptr);
869 if (!ptr)
870 ;
871 else if (ptr <= substream->runtime->buffer_size)
872 ptr = substream->runtime->buffer_size - ptr;
873 else {
874 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
875 (int)ptr, (int)substream->runtime->buffer_size);
876 ptr = 0;
877 }
878 return ptr;
879 #endif
880 }
881
882 static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
883 .addr = VT1724_MT_PLAYBACK_ADDR,
884 .size = VT1724_MT_PLAYBACK_SIZE,
885 .count = VT1724_MT_PLAYBACK_COUNT,
886 .start = VT1724_PDMA0_START,
887 };
888
889 static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
890 .addr = VT1724_MT_PDMA4_ADDR,
891 .size = VT1724_MT_PDMA4_SIZE,
892 .count = VT1724_MT_PDMA4_COUNT,
893 .start = VT1724_PDMA4_START,
894 };
895
896 static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
897 .addr = VT1724_MT_CAPTURE_ADDR,
898 .size = VT1724_MT_CAPTURE_SIZE,
899 .count = VT1724_MT_CAPTURE_COUNT,
900 .start = VT1724_RDMA0_START,
901 };
902
903 static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
904 .addr = VT1724_MT_RDMA1_ADDR,
905 .size = VT1724_MT_RDMA1_SIZE,
906 .count = VT1724_MT_RDMA1_COUNT,
907 .start = VT1724_RDMA1_START,
908 };
909
910 #define vt1724_playback_pro_reg vt1724_pdma0_reg
911 #define vt1724_playback_spdif_reg vt1724_pdma4_reg
912 #define vt1724_capture_pro_reg vt1724_rdma0_reg
913 #define vt1724_capture_spdif_reg vt1724_rdma1_reg
914
915 static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
916 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
917 SNDRV_PCM_INFO_BLOCK_TRANSFER |
918 SNDRV_PCM_INFO_MMAP_VALID |
919 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
920 .formats = SNDRV_PCM_FMTBIT_S32_LE,
921 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
922 .rate_min = 8000,
923 .rate_max = 192000,
924 .channels_min = 2,
925 .channels_max = 8,
926 .buffer_bytes_max = (1UL << 21),
927 .period_bytes_min = 8 * 4 * 2,
928 .period_bytes_max = (1UL << 21),
929 .periods_min = 2,
930 .periods_max = 1024,
931 };
932
933 static const struct snd_pcm_hardware snd_vt1724_spdif = {
934 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
935 SNDRV_PCM_INFO_BLOCK_TRANSFER |
936 SNDRV_PCM_INFO_MMAP_VALID |
937 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
938 .formats = SNDRV_PCM_FMTBIT_S32_LE,
939 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
940 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
941 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
942 SNDRV_PCM_RATE_192000),
943 .rate_min = 32000,
944 .rate_max = 192000,
945 .channels_min = 2,
946 .channels_max = 2,
947 .buffer_bytes_max = (1UL << 18),
948 .period_bytes_min = 2 * 4 * 2,
949 .period_bytes_max = (1UL << 18),
950 .periods_min = 2,
951 .periods_max = 1024,
952 };
953
954 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
955 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
956 SNDRV_PCM_INFO_BLOCK_TRANSFER |
957 SNDRV_PCM_INFO_MMAP_VALID |
958 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
959 .formats = SNDRV_PCM_FMTBIT_S32_LE,
960 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
961 .rate_min = 8000,
962 .rate_max = 192000,
963 .channels_min = 2,
964 .channels_max = 2,
965 .buffer_bytes_max = (1UL << 18),
966 .period_bytes_min = 2 * 4 * 2,
967 .period_bytes_max = (1UL << 18),
968 .periods_min = 2,
969 .periods_max = 1024,
970 };
971
972
973
974
975 static void set_std_hw_rates(struct snd_ice1712 *ice)
976 {
977 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
978
979
980 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
981 ice->hw_rates = &hw_constraints_rates_192;
982 else
983 ice->hw_rates = &hw_constraints_rates_96;
984 } else {
985
986 ice->hw_rates = &hw_constraints_rates_48;
987 }
988 }
989
990 static int set_rate_constraints(struct snd_ice1712 *ice,
991 struct snd_pcm_substream *substream)
992 {
993 struct snd_pcm_runtime *runtime = substream->runtime;
994
995 runtime->hw.rate_min = ice->hw_rates->list[0];
996 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
997 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
998 return snd_pcm_hw_constraint_list(runtime, 0,
999 SNDRV_PCM_HW_PARAM_RATE,
1000 ice->hw_rates);
1001 }
1002
1003
1004
1005
1006 static void constrain_rate_if_locked(struct snd_pcm_substream *substream)
1007 {
1008 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1009 struct snd_pcm_runtime *runtime = substream->runtime;
1010 unsigned int rate;
1011 if (is_pro_rate_locked(ice)) {
1012 rate = ice->get_rate(ice);
1013 if (rate >= runtime->hw.rate_min
1014 && rate <= runtime->hw.rate_max) {
1015 runtime->hw.rate_min = rate;
1016 runtime->hw.rate_max = rate;
1017 }
1018 }
1019 }
1020
1021
1022
1023
1024
1025 #define VT1724_BUFFER_ALIGN 0x20
1026
1027 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1028 {
1029 struct snd_pcm_runtime *runtime = substream->runtime;
1030 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1031 int chs, num_indeps;
1032
1033 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1034 ice->playback_pro_substream = substream;
1035 runtime->hw = snd_vt1724_playback_pro;
1036 snd_pcm_set_sync(substream);
1037 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1038 set_rate_constraints(ice, substream);
1039 mutex_lock(&ice->open_mutex);
1040
1041 num_indeps = ice->num_total_dacs / 2 - 1;
1042 for (chs = 0; chs < num_indeps; chs++) {
1043 if (ice->pcm_reserved[chs])
1044 break;
1045 }
1046 chs = (chs + 1) * 2;
1047 runtime->hw.channels_max = chs;
1048 if (chs > 2)
1049 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1050 mutex_unlock(&ice->open_mutex);
1051 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1052 VT1724_BUFFER_ALIGN);
1053 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1054 VT1724_BUFFER_ALIGN);
1055 constrain_rate_if_locked(substream);
1056 if (ice->pro_open)
1057 ice->pro_open(ice, substream);
1058 return 0;
1059 }
1060
1061 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1062 {
1063 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1064 struct snd_pcm_runtime *runtime = substream->runtime;
1065
1066 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1067 ice->capture_pro_substream = substream;
1068 runtime->hw = snd_vt1724_2ch_stereo;
1069 snd_pcm_set_sync(substream);
1070 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1071 set_rate_constraints(ice, substream);
1072 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1073 VT1724_BUFFER_ALIGN);
1074 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1075 VT1724_BUFFER_ALIGN);
1076 constrain_rate_if_locked(substream);
1077 if (ice->pro_open)
1078 ice->pro_open(ice, substream);
1079 return 0;
1080 }
1081
1082 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1083 {
1084 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1085
1086 if (PRO_RATE_RESET)
1087 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1088 ice->playback_pro_substream = NULL;
1089
1090 return 0;
1091 }
1092
1093 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1094 {
1095 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1096
1097 if (PRO_RATE_RESET)
1098 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1099 ice->capture_pro_substream = NULL;
1100 return 0;
1101 }
1102
1103 static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1104 .open = snd_vt1724_playback_pro_open,
1105 .close = snd_vt1724_playback_pro_close,
1106 .ioctl = snd_pcm_lib_ioctl,
1107 .hw_params = snd_vt1724_pcm_hw_params,
1108 .hw_free = snd_vt1724_pcm_hw_free,
1109 .prepare = snd_vt1724_playback_pro_prepare,
1110 .trigger = snd_vt1724_pcm_trigger,
1111 .pointer = snd_vt1724_playback_pro_pointer,
1112 };
1113
1114 static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1115 .open = snd_vt1724_capture_pro_open,
1116 .close = snd_vt1724_capture_pro_close,
1117 .ioctl = snd_pcm_lib_ioctl,
1118 .hw_params = snd_vt1724_pcm_hw_params,
1119 .hw_free = snd_vt1724_pcm_hw_free,
1120 .prepare = snd_vt1724_pcm_prepare,
1121 .trigger = snd_vt1724_pcm_trigger,
1122 .pointer = snd_vt1724_pcm_pointer,
1123 };
1124
1125 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1126 {
1127 struct snd_pcm *pcm;
1128 int capt, err;
1129
1130 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
1131 VT1724_CFG_ADC_NONE)
1132 capt = 0;
1133 else
1134 capt = 1;
1135 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
1136 if (err < 0)
1137 return err;
1138
1139 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1140 if (capt)
1141 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1142 &snd_vt1724_capture_pro_ops);
1143
1144 pcm->private_data = ice;
1145 pcm->info_flags = 0;
1146 strcpy(pcm->name, "ICE1724");
1147
1148 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1149 snd_dma_pci_data(ice->pci),
1150 256*1024, 256*1024);
1151
1152 ice->pcm_pro = pcm;
1153
1154 return 0;
1155 }
1156
1157
1158
1159
1160
1161
1162
1163 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1164 {
1165 unsigned char cbit, disabled;
1166
1167 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1168 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1169 if (cbit != disabled)
1170 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1171 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1172 if (cbit != disabled)
1173 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1174 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1175 }
1176
1177
1178 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1179 {
1180 unsigned int val, nval;
1181 unsigned long flags;
1182
1183 spin_lock_irqsave(&ice->reg_lock, flags);
1184 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1185 nval &= ~(7 << 12);
1186 switch (rate) {
1187 case 44100: break;
1188 case 48000: nval |= 2 << 12; break;
1189 case 32000: nval |= 3 << 12; break;
1190 case 88200: nval |= 4 << 12; break;
1191 case 96000: nval |= 5 << 12; break;
1192 case 192000: nval |= 6 << 12; break;
1193 case 176400: nval |= 7 << 12; break;
1194 }
1195 if (val != nval)
1196 update_spdif_bits(ice, nval);
1197 spin_unlock_irqrestore(&ice->reg_lock, flags);
1198 }
1199
1200 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1201 {
1202 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1203 if (!ice->force_pdma4)
1204 update_spdif_rate(ice, substream->runtime->rate);
1205 return snd_vt1724_pcm_prepare(substream);
1206 }
1207
1208 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1209 {
1210 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1211 struct snd_pcm_runtime *runtime = substream->runtime;
1212
1213 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1214 ice->playback_con_substream = substream;
1215 if (ice->force_pdma4) {
1216 runtime->hw = snd_vt1724_2ch_stereo;
1217 set_rate_constraints(ice, substream);
1218 } else
1219 runtime->hw = snd_vt1724_spdif;
1220 snd_pcm_set_sync(substream);
1221 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1222 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1223 VT1724_BUFFER_ALIGN);
1224 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1225 VT1724_BUFFER_ALIGN);
1226 constrain_rate_if_locked(substream);
1227 if (ice->spdif.ops.open)
1228 ice->spdif.ops.open(ice, substream);
1229 return 0;
1230 }
1231
1232 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1233 {
1234 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1235
1236 if (PRO_RATE_RESET)
1237 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1238 ice->playback_con_substream = NULL;
1239 if (ice->spdif.ops.close)
1240 ice->spdif.ops.close(ice, substream);
1241
1242 return 0;
1243 }
1244
1245 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1246 {
1247 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1248 struct snd_pcm_runtime *runtime = substream->runtime;
1249
1250 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1251 ice->capture_con_substream = substream;
1252 if (ice->force_rdma1) {
1253 runtime->hw = snd_vt1724_2ch_stereo;
1254 set_rate_constraints(ice, substream);
1255 } else
1256 runtime->hw = snd_vt1724_spdif;
1257 snd_pcm_set_sync(substream);
1258 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1259 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1260 VT1724_BUFFER_ALIGN);
1261 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1262 VT1724_BUFFER_ALIGN);
1263 constrain_rate_if_locked(substream);
1264 if (ice->spdif.ops.open)
1265 ice->spdif.ops.open(ice, substream);
1266 return 0;
1267 }
1268
1269 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1270 {
1271 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1272
1273 if (PRO_RATE_RESET)
1274 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1275 ice->capture_con_substream = NULL;
1276 if (ice->spdif.ops.close)
1277 ice->spdif.ops.close(ice, substream);
1278
1279 return 0;
1280 }
1281
1282 static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1283 .open = snd_vt1724_playback_spdif_open,
1284 .close = snd_vt1724_playback_spdif_close,
1285 .ioctl = snd_pcm_lib_ioctl,
1286 .hw_params = snd_vt1724_pcm_hw_params,
1287 .hw_free = snd_vt1724_pcm_hw_free,
1288 .prepare = snd_vt1724_playback_spdif_prepare,
1289 .trigger = snd_vt1724_pcm_trigger,
1290 .pointer = snd_vt1724_pcm_pointer,
1291 };
1292
1293 static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1294 .open = snd_vt1724_capture_spdif_open,
1295 .close = snd_vt1724_capture_spdif_close,
1296 .ioctl = snd_pcm_lib_ioctl,
1297 .hw_params = snd_vt1724_pcm_hw_params,
1298 .hw_free = snd_vt1724_pcm_hw_free,
1299 .prepare = snd_vt1724_pcm_prepare,
1300 .trigger = snd_vt1724_pcm_trigger,
1301 .pointer = snd_vt1724_pcm_pointer,
1302 };
1303
1304
1305 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1306 {
1307 char *name;
1308 struct snd_pcm *pcm;
1309 int play, capt;
1310 int err;
1311
1312 if (ice->force_pdma4 ||
1313 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1314 play = 1;
1315 ice->has_spdif = 1;
1316 } else
1317 play = 0;
1318 if (ice->force_rdma1 ||
1319 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1320 capt = 1;
1321 ice->has_spdif = 1;
1322 } else
1323 capt = 0;
1324 if (!play && !capt)
1325 return 0;
1326
1327 if (ice->force_pdma4 || ice->force_rdma1)
1328 name = "ICE1724 Secondary";
1329 else
1330 name = "ICE1724 IEC958";
1331 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1332 if (err < 0)
1333 return err;
1334
1335 if (play)
1336 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1337 &snd_vt1724_playback_spdif_ops);
1338 if (capt)
1339 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1340 &snd_vt1724_capture_spdif_ops);
1341
1342 pcm->private_data = ice;
1343 pcm->info_flags = 0;
1344 strcpy(pcm->name, name);
1345
1346 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1347 snd_dma_pci_data(ice->pci),
1348 256*1024, 256*1024);
1349
1350 ice->pcm = pcm;
1351
1352 return 0;
1353 }
1354
1355
1356
1357
1358
1359
1360 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1361 {
1362 .addr = VT1724_MT_PDMA1_ADDR,
1363 .size = VT1724_MT_PDMA1_SIZE,
1364 .count = VT1724_MT_PDMA1_COUNT,
1365 .start = VT1724_PDMA1_START,
1366 },
1367 {
1368 .addr = VT1724_MT_PDMA2_ADDR,
1369 .size = VT1724_MT_PDMA2_SIZE,
1370 .count = VT1724_MT_PDMA2_COUNT,
1371 .start = VT1724_PDMA2_START,
1372 },
1373 {
1374 .addr = VT1724_MT_PDMA3_ADDR,
1375 .size = VT1724_MT_PDMA3_SIZE,
1376 .count = VT1724_MT_PDMA3_COUNT,
1377 .start = VT1724_PDMA3_START,
1378 },
1379 };
1380
1381 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1382 {
1383 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1384 unsigned char val;
1385
1386 spin_lock_irq(&ice->reg_lock);
1387 val = 3 - substream->number;
1388 if (inb(ICEMT1724(ice, BURST)) < val)
1389 outb(val, ICEMT1724(ice, BURST));
1390 spin_unlock_irq(&ice->reg_lock);
1391 return snd_vt1724_pcm_prepare(substream);
1392 }
1393
1394 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1395 {
1396 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1397 struct snd_pcm_runtime *runtime = substream->runtime;
1398
1399 mutex_lock(&ice->open_mutex);
1400
1401 if (ice->pcm_reserved[substream->number]) {
1402 mutex_unlock(&ice->open_mutex);
1403 return -EBUSY;
1404 }
1405 mutex_unlock(&ice->open_mutex);
1406 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1407 ice->playback_con_substream_ds[substream->number] = substream;
1408 runtime->hw = snd_vt1724_2ch_stereo;
1409 snd_pcm_set_sync(substream);
1410 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1411 set_rate_constraints(ice, substream);
1412 return 0;
1413 }
1414
1415 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1416 {
1417 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1418
1419 if (PRO_RATE_RESET)
1420 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1421 ice->playback_con_substream_ds[substream->number] = NULL;
1422 ice->pcm_reserved[substream->number] = NULL;
1423
1424 return 0;
1425 }
1426
1427 static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1428 .open = snd_vt1724_playback_indep_open,
1429 .close = snd_vt1724_playback_indep_close,
1430 .ioctl = snd_pcm_lib_ioctl,
1431 .hw_params = snd_vt1724_pcm_hw_params,
1432 .hw_free = snd_vt1724_pcm_hw_free,
1433 .prepare = snd_vt1724_playback_indep_prepare,
1434 .trigger = snd_vt1724_pcm_trigger,
1435 .pointer = snd_vt1724_pcm_pointer,
1436 };
1437
1438
1439 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1440 {
1441 struct snd_pcm *pcm;
1442 int play;
1443 int err;
1444
1445 play = ice->num_total_dacs / 2 - 1;
1446 if (play <= 0)
1447 return 0;
1448
1449 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1450 if (err < 0)
1451 return err;
1452
1453 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1454 &snd_vt1724_playback_indep_ops);
1455
1456 pcm->private_data = ice;
1457 pcm->info_flags = 0;
1458 strcpy(pcm->name, "ICE1724 Surround PCM");
1459
1460 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1461 snd_dma_pci_data(ice->pci),
1462 256*1024, 256*1024);
1463
1464 ice->pcm_ds = pcm;
1465
1466 return 0;
1467 }
1468
1469
1470
1471
1472
1473
1474 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1475 {
1476 int err;
1477
1478 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1479 struct snd_ac97_bus *pbus;
1480 struct snd_ac97_template ac97;
1481 static struct snd_ac97_bus_ops ops = {
1482 .write = snd_vt1724_ac97_write,
1483 .read = snd_vt1724_ac97_read,
1484 };
1485
1486
1487 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1488 mdelay(5);
1489 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1490
1491 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1492 if (err < 0)
1493 return err;
1494 memset(&ac97, 0, sizeof(ac97));
1495 ac97.private_data = ice;
1496 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1497 if (err < 0)
1498 dev_warn(ice->card->dev,
1499 "cannot initialize pro ac97, skipped\n");
1500 else
1501 return 0;
1502 }
1503
1504 strcat(ice->card->mixername, "ICE1724 - multitrack");
1505 return 0;
1506 }
1507
1508
1509
1510
1511
1512 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1513 {
1514 return (unsigned int)ice->eeprom.data[idx] | \
1515 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1516 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1517 }
1518
1519 static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1520 struct snd_info_buffer *buffer)
1521 {
1522 struct snd_ice1712 *ice = entry->private_data;
1523 unsigned int idx;
1524
1525 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1526 snd_iprintf(buffer, "EEPROM:\n");
1527
1528 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1529 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1530 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1531 snd_iprintf(buffer, " System Config : 0x%x\n",
1532 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1533 snd_iprintf(buffer, " ACLink : 0x%x\n",
1534 ice->eeprom.data[ICE_EEP2_ACLINK]);
1535 snd_iprintf(buffer, " I2S : 0x%x\n",
1536 ice->eeprom.data[ICE_EEP2_I2S]);
1537 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1538 ice->eeprom.data[ICE_EEP2_SPDIF]);
1539 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1540 ice->eeprom.gpiodir);
1541 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1542 ice->eeprom.gpiomask);
1543 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1544 ice->eeprom.gpiostate);
1545 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1546 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1547 idx, ice->eeprom.data[idx]);
1548
1549 snd_iprintf(buffer, "\nRegisters:\n");
1550
1551 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1552 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1553 for (idx = 0x0; idx < 0x20 ; idx++)
1554 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1555 idx, inb(ice->port+idx));
1556 for (idx = 0x0; idx < 0x30 ; idx++)
1557 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1558 idx, inb(ice->profi_port+idx));
1559 }
1560
1561 static void snd_vt1724_proc_init(struct snd_ice1712 *ice)
1562 {
1563 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read);
1564 }
1565
1566
1567
1568
1569
1570 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1571 struct snd_ctl_elem_info *uinfo)
1572 {
1573 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1574 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1575 return 0;
1576 }
1577
1578 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1579 struct snd_ctl_elem_value *ucontrol)
1580 {
1581 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1582
1583 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1584 return 0;
1585 }
1586
1587 static const struct snd_kcontrol_new snd_vt1724_eeprom = {
1588 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1589 .name = "ICE1724 EEPROM",
1590 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1591 .info = snd_vt1724_eeprom_info,
1592 .get = snd_vt1724_eeprom_get
1593 };
1594
1595
1596
1597 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1598 struct snd_ctl_elem_info *uinfo)
1599 {
1600 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1601 uinfo->count = 1;
1602 return 0;
1603 }
1604
1605 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1606 {
1607 unsigned int val, rbits;
1608
1609 val = diga->status[0] & 0x03;
1610 if (val & 0x01) {
1611
1612 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1613 IEC958_AES0_PRO_EMPHASIS_5015)
1614 val |= 1U << 3;
1615 rbits = (diga->status[4] >> 3) & 0x0f;
1616 if (rbits) {
1617 switch (rbits) {
1618 case 2: val |= 5 << 12; break;
1619 case 3: val |= 6 << 12; break;
1620 case 10: val |= 4 << 12; break;
1621 case 11: val |= 7 << 12; break;
1622 }
1623 } else {
1624 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1625 case IEC958_AES0_PRO_FS_44100:
1626 break;
1627 case IEC958_AES0_PRO_FS_32000:
1628 val |= 3U << 12;
1629 break;
1630 default:
1631 val |= 2U << 12;
1632 break;
1633 }
1634 }
1635 } else {
1636
1637 val |= diga->status[1] & 0x04;
1638 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1639 IEC958_AES0_CON_EMPHASIS_5015)
1640 val |= 1U << 3;
1641 val |= (unsigned int)(diga->status[1] & 0x3f) << 4;
1642 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12;
1643 }
1644 return val;
1645 }
1646
1647 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1648 {
1649 memset(diga->status, 0, sizeof(diga->status));
1650 diga->status[0] = val & 0x03;
1651 if (val & 0x01) {
1652
1653 if (val & (1U << 3))
1654 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1655 switch ((val >> 12) & 0x7) {
1656 case 0:
1657 break;
1658 case 2:
1659 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1660 break;
1661 default:
1662 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1663 break;
1664 }
1665 } else {
1666
1667 diga->status[0] |= val & (1U << 2);
1668 if (val & (1U << 3))
1669 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1670 diga->status[1] |= (val >> 4) & 0x3f;
1671 diga->status[3] |= (val >> 12) & 0x07;
1672 }
1673 }
1674
1675 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1676 struct snd_ctl_elem_value *ucontrol)
1677 {
1678 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1679 unsigned int val;
1680 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1681 decode_spdif_bits(&ucontrol->value.iec958, val);
1682 return 0;
1683 }
1684
1685 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1686 struct snd_ctl_elem_value *ucontrol)
1687 {
1688 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1689 unsigned int val, old;
1690
1691 val = encode_spdif_bits(&ucontrol->value.iec958);
1692 spin_lock_irq(&ice->reg_lock);
1693 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1694 if (val != old)
1695 update_spdif_bits(ice, val);
1696 spin_unlock_irq(&ice->reg_lock);
1697 return val != old;
1698 }
1699
1700 static const struct snd_kcontrol_new snd_vt1724_spdif_default =
1701 {
1702 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1703 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1704 .info = snd_vt1724_spdif_info,
1705 .get = snd_vt1724_spdif_default_get,
1706 .put = snd_vt1724_spdif_default_put
1707 };
1708
1709 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1710 struct snd_ctl_elem_value *ucontrol)
1711 {
1712 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1713 IEC958_AES0_PROFESSIONAL |
1714 IEC958_AES0_CON_NOT_COPYRIGHT |
1715 IEC958_AES0_CON_EMPHASIS;
1716 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1717 IEC958_AES1_CON_CATEGORY;
1718 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1719 return 0;
1720 }
1721
1722 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1724 {
1725 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1726 IEC958_AES0_PROFESSIONAL |
1727 IEC958_AES0_PRO_FS |
1728 IEC958_AES0_PRO_EMPHASIS;
1729 return 0;
1730 }
1731
1732 static const struct snd_kcontrol_new snd_vt1724_spdif_maskc =
1733 {
1734 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1735 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1736 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1737 .info = snd_vt1724_spdif_info,
1738 .get = snd_vt1724_spdif_maskc_get,
1739 };
1740
1741 static const struct snd_kcontrol_new snd_vt1724_spdif_maskp =
1742 {
1743 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1744 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1745 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1746 .info = snd_vt1724_spdif_info,
1747 .get = snd_vt1724_spdif_maskp_get,
1748 };
1749
1750 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1751
1752 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1753 struct snd_ctl_elem_value *ucontrol)
1754 {
1755 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1756 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1757 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1758 return 0;
1759 }
1760
1761 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1762 struct snd_ctl_elem_value *ucontrol)
1763 {
1764 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1765 unsigned char old, val;
1766
1767 spin_lock_irq(&ice->reg_lock);
1768 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1769 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1770 if (ucontrol->value.integer.value[0])
1771 val |= VT1724_CFG_SPDIF_OUT_EN;
1772 if (old != val)
1773 outb(val, ICEREG1724(ice, SPDIF_CFG));
1774 spin_unlock_irq(&ice->reg_lock);
1775 return old != val;
1776 }
1777
1778 static const struct snd_kcontrol_new snd_vt1724_spdif_switch =
1779 {
1780 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1781
1782
1783 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1784 .info = snd_vt1724_spdif_sw_info,
1785 .get = snd_vt1724_spdif_sw_get,
1786 .put = snd_vt1724_spdif_sw_put
1787 };
1788
1789
1790 #if 0
1791
1792
1793
1794
1795 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1796
1797 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1798 struct snd_ctl_elem_value *ucontrol)
1799 {
1800 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1801 int shift = kcontrol->private_value & 0xff;
1802 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1803
1804 snd_ice1712_save_gpio_status(ice);
1805 ucontrol->value.integer.value[0] =
1806 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1807 snd_ice1712_restore_gpio_status(ice);
1808 return 0;
1809 }
1810
1811 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1812 struct snd_ctl_elem_value *ucontrol)
1813 {
1814 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1815 int shift = kcontrol->private_value & 0xff;
1816 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1817 unsigned int val, nval;
1818
1819 if (kcontrol->private_value & (1 << 31))
1820 return -EPERM;
1821 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1822 snd_ice1712_save_gpio_status(ice);
1823 val = snd_ice1712_gpio_read(ice);
1824 nval |= val & ~(1 << shift);
1825 if (val != nval)
1826 snd_ice1712_gpio_write(ice, nval);
1827 snd_ice1712_restore_gpio_status(ice);
1828 return val != nval;
1829 }
1830 #endif
1831
1832
1833
1834
1835 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1836 struct snd_ctl_elem_info *uinfo)
1837 {
1838 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1839 int hw_rates_count = ice->hw_rates->count;
1840 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1841 uinfo->count = 1;
1842
1843
1844 uinfo->value.enumerated.items = hw_rates_count;
1845
1846 if (ice->force_rdma1 ||
1847 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
1848 uinfo->value.enumerated.items += ice->ext_clock_count;
1849
1850 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1851 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1852 if (uinfo->value.enumerated.item >= hw_rates_count)
1853
1854 strcpy(uinfo->value.enumerated.name,
1855 ice->ext_clock_names[
1856 uinfo->value.enumerated.item - hw_rates_count]);
1857 else
1858
1859 sprintf(uinfo->value.enumerated.name, "%d",
1860 ice->hw_rates->list[uinfo->value.enumerated.item]);
1861 return 0;
1862 }
1863
1864 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1866 {
1867 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1868 unsigned int i, rate;
1869
1870 spin_lock_irq(&ice->reg_lock);
1871 if (ice->is_spdif_master(ice)) {
1872 ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
1873 ice->get_spdif_master_type(ice);
1874 } else {
1875 rate = ice->get_rate(ice);
1876 ucontrol->value.enumerated.item[0] = 0;
1877 for (i = 0; i < ice->hw_rates->count; i++) {
1878 if (ice->hw_rates->list[i] == rate) {
1879 ucontrol->value.enumerated.item[0] = i;
1880 break;
1881 }
1882 }
1883 }
1884 spin_unlock_irq(&ice->reg_lock);
1885 return 0;
1886 }
1887
1888 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
1889 {
1890
1891 return 0;
1892 }
1893
1894
1895 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
1896 {
1897 unsigned char oval;
1898 unsigned char i2s_oval;
1899 oval = inb(ICEMT1724(ice, RATE));
1900 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1901
1902 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1903 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1904 return 0;
1905 }
1906
1907
1908 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1909 struct snd_ctl_elem_value *ucontrol)
1910 {
1911 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1912 unsigned int old_rate, new_rate;
1913 unsigned int item = ucontrol->value.enumerated.item[0];
1914 unsigned int first_ext_clock = ice->hw_rates->count;
1915
1916 if (item > first_ext_clock + ice->ext_clock_count - 1)
1917 return -EINVAL;
1918
1919
1920 spin_lock_irq(&ice->reg_lock);
1921 if (ice->is_spdif_master(ice))
1922 old_rate = 0;
1923 else
1924 old_rate = ice->get_rate(ice);
1925 if (item >= first_ext_clock) {
1926
1927 ice->set_spdif_clock(ice, item - first_ext_clock);
1928 new_rate = 0;
1929 } else {
1930
1931 new_rate = ice->hw_rates->list[item];
1932 ice->pro_rate_default = new_rate;
1933 spin_unlock_irq(&ice->reg_lock);
1934 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1935 spin_lock_irq(&ice->reg_lock);
1936 }
1937 spin_unlock_irq(&ice->reg_lock);
1938
1939
1940 if (old_rate != new_rate && !new_rate) {
1941
1942 unsigned int i;
1943 if (ice->gpio.set_pro_rate)
1944 ice->gpio.set_pro_rate(ice, 0);
1945 for (i = 0; i < ice->akm_codecs; i++) {
1946 if (ice->akm[i].ops.set_rate_val)
1947 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1948 }
1949 }
1950 return old_rate != new_rate;
1951 }
1952
1953 static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = {
1954 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1955 .name = "Multi Track Internal Clock",
1956 .info = snd_vt1724_pro_internal_clock_info,
1957 .get = snd_vt1724_pro_internal_clock_get,
1958 .put = snd_vt1724_pro_internal_clock_put
1959 };
1960
1961 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1962
1963 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1964 struct snd_ctl_elem_value *ucontrol)
1965 {
1966 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1967 return 0;
1968 }
1969
1970 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1971 struct snd_ctl_elem_value *ucontrol)
1972 {
1973 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1974 int change = 0, nval;
1975
1976 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1977 spin_lock_irq(&ice->reg_lock);
1978 change = PRO_RATE_LOCKED != nval;
1979 PRO_RATE_LOCKED = nval;
1980 spin_unlock_irq(&ice->reg_lock);
1981 return change;
1982 }
1983
1984 static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = {
1985 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1986 .name = "Multi Track Rate Locking",
1987 .info = snd_vt1724_pro_rate_locking_info,
1988 .get = snd_vt1724_pro_rate_locking_get,
1989 .put = snd_vt1724_pro_rate_locking_put
1990 };
1991
1992 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1993
1994 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1995 struct snd_ctl_elem_value *ucontrol)
1996 {
1997 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1998 return 0;
1999 }
2000
2001 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2002 struct snd_ctl_elem_value *ucontrol)
2003 {
2004 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2005 int change = 0, nval;
2006
2007 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2008 spin_lock_irq(&ice->reg_lock);
2009 change = PRO_RATE_RESET != nval;
2010 PRO_RATE_RESET = nval;
2011 spin_unlock_irq(&ice->reg_lock);
2012 return change;
2013 }
2014
2015 static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = {
2016 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2017 .name = "Multi Track Rate Reset",
2018 .info = snd_vt1724_pro_rate_reset_info,
2019 .get = snd_vt1724_pro_rate_reset_get,
2020 .put = snd_vt1724_pro_rate_reset_put
2021 };
2022
2023
2024
2025
2026
2027 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
2028 struct snd_ctl_elem_info *uinfo)
2029 {
2030 static const char * const texts[] = {
2031 "PCM Out",
2032 "H/W In 0", "H/W In 1",
2033 "IEC958 In L", "IEC958 In R",
2034 };
2035
2036 return snd_ctl_enum_info(uinfo, 1, 5, texts);
2037 }
2038
2039 static inline int analog_route_shift(int idx)
2040 {
2041 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
2042 }
2043
2044 static inline int digital_route_shift(int idx)
2045 {
2046 return idx * 3;
2047 }
2048
2049 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
2050 {
2051 unsigned long val;
2052 unsigned char eitem;
2053 static const unsigned char xlate[8] = {
2054 0, 255, 1, 2, 255, 255, 3, 4,
2055 };
2056
2057 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2058 val >>= shift;
2059 val &= 7;
2060 eitem = xlate[val];
2061 if (eitem == 255) {
2062 snd_BUG();
2063 return 0;
2064 }
2065 return eitem;
2066 }
2067
2068 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
2069 int shift)
2070 {
2071 unsigned int old_val, nval;
2072 int change;
2073 static const unsigned char xroute[8] = {
2074 0,
2075 2,
2076 3,
2077 6,
2078 7,
2079 };
2080
2081 nval = xroute[val % 5];
2082 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2083 val &= ~(0x07 << shift);
2084 val |= nval << shift;
2085 change = val != old_val;
2086 if (change)
2087 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2088 return change;
2089 }
2090
2091 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2092 struct snd_ctl_elem_value *ucontrol)
2093 {
2094 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2095 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2096 ucontrol->value.enumerated.item[0] =
2097 snd_ice1724_get_route_val(ice, analog_route_shift(idx));
2098 return 0;
2099 }
2100
2101 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2102 struct snd_ctl_elem_value *ucontrol)
2103 {
2104 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2105 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2106 return snd_ice1724_put_route_val(ice,
2107 ucontrol->value.enumerated.item[0],
2108 analog_route_shift(idx));
2109 }
2110
2111 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2112 struct snd_ctl_elem_value *ucontrol)
2113 {
2114 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2115 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2116 ucontrol->value.enumerated.item[0] =
2117 snd_ice1724_get_route_val(ice, digital_route_shift(idx));
2118 return 0;
2119 }
2120
2121 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2122 struct snd_ctl_elem_value *ucontrol)
2123 {
2124 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2125 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2126 return snd_ice1724_put_route_val(ice,
2127 ucontrol->value.enumerated.item[0],
2128 digital_route_shift(idx));
2129 }
2130
2131 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route =
2132 {
2133 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2134 .name = "H/W Playback Route",
2135 .info = snd_vt1724_pro_route_info,
2136 .get = snd_vt1724_pro_route_analog_get,
2137 .put = snd_vt1724_pro_route_analog_put,
2138 };
2139
2140 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = {
2141 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2142 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2143 .info = snd_vt1724_pro_route_info,
2144 .get = snd_vt1724_pro_route_spdif_get,
2145 .put = snd_vt1724_pro_route_spdif_put,
2146 .count = 2,
2147 };
2148
2149
2150 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2151 struct snd_ctl_elem_info *uinfo)
2152 {
2153 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2154 uinfo->count = 22;
2155 uinfo->value.integer.min = 0;
2156 uinfo->value.integer.max = 255;
2157 return 0;
2158 }
2159
2160 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2161 struct snd_ctl_elem_value *ucontrol)
2162 {
2163 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2164 int idx;
2165
2166 spin_lock_irq(&ice->reg_lock);
2167 for (idx = 0; idx < 22; idx++) {
2168 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
2169 ucontrol->value.integer.value[idx] =
2170 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
2171 }
2172 spin_unlock_irq(&ice->reg_lock);
2173 return 0;
2174 }
2175
2176 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = {
2177 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2178 .name = "Multi Track Peak",
2179 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2180 .info = snd_vt1724_pro_peak_info,
2181 .get = snd_vt1724_pro_peak_get
2182 };
2183
2184
2185
2186
2187
2188 static struct snd_ice1712_card_info no_matched;
2189
2190
2191
2192
2193
2194 static unsigned char ooaoo_sq210_eeprom[] = {
2195 [ICE_EEP2_SYSCONF] = 0x4c,
2196
2197 [ICE_EEP2_ACLINK] = 0x80,
2198 [ICE_EEP2_I2S] = 0x78,
2199 [ICE_EEP2_SPDIF] = 0xc1,
2200 [ICE_EEP2_GPIO_DIR] = 0x00,
2201 [ICE_EEP2_GPIO_DIR1] = 0x00,
2202 [ICE_EEP2_GPIO_DIR2] = 0x00,
2203 [ICE_EEP2_GPIO_MASK] = 0xff,
2204 [ICE_EEP2_GPIO_MASK1] = 0xff,
2205 [ICE_EEP2_GPIO_MASK2] = 0xff,
2206
2207 [ICE_EEP2_GPIO_STATE] = 0x00,
2208 [ICE_EEP2_GPIO_STATE1] = 0x00,
2209
2210 [ICE_EEP2_GPIO_STATE2] = 0x00,
2211 };
2212
2213
2214 static struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = {
2215 {
2216 .name = "ooAoo SQ210a",
2217 .model = "sq210a",
2218 .eeprom_size = sizeof(ooaoo_sq210_eeprom),
2219 .eeprom_data = ooaoo_sq210_eeprom,
2220 },
2221 { }
2222 };
2223
2224 static struct snd_ice1712_card_info *card_tables[] = {
2225 snd_vt1724_revo_cards,
2226 snd_vt1724_amp_cards,
2227 snd_vt1724_aureon_cards,
2228 snd_vt1720_mobo_cards,
2229 snd_vt1720_pontis_cards,
2230 snd_vt1724_prodigy_hifi_cards,
2231 snd_vt1724_prodigy192_cards,
2232 snd_vt1724_juli_cards,
2233 snd_vt1724_maya44_cards,
2234 snd_vt1724_phase_cards,
2235 snd_vt1724_wtm_cards,
2236 snd_vt1724_se_cards,
2237 snd_vt1724_qtet_cards,
2238 snd_vt1724_ooaoo_cards,
2239 snd_vt1724_psc724_cards,
2240 NULL,
2241 };
2242
2243
2244
2245
2246
2247 static void wait_i2c_busy(struct snd_ice1712 *ice)
2248 {
2249 int t = 0x10000;
2250 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2251 ;
2252 if (t == -1)
2253 dev_err(ice->card->dev, "i2c busy timeout\n");
2254 }
2255
2256 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2257 unsigned char dev, unsigned char addr)
2258 {
2259 unsigned char val;
2260
2261 mutex_lock(&ice->i2c_mutex);
2262 wait_i2c_busy(ice);
2263 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2264 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2265 wait_i2c_busy(ice);
2266 val = inb(ICEREG1724(ice, I2C_DATA));
2267 mutex_unlock(&ice->i2c_mutex);
2268
2269
2270
2271 return val;
2272 }
2273
2274 void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2275 unsigned char dev, unsigned char addr, unsigned char data)
2276 {
2277 mutex_lock(&ice->i2c_mutex);
2278 wait_i2c_busy(ice);
2279
2280
2281
2282 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2283 outb(data, ICEREG1724(ice, I2C_DATA));
2284 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2285 wait_i2c_busy(ice);
2286 mutex_unlock(&ice->i2c_mutex);
2287 }
2288
2289 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2290 const char *modelname)
2291 {
2292 const int dev = 0xa0;
2293 unsigned int i, size;
2294 struct snd_ice1712_card_info * const *tbl, *c;
2295
2296 if (!modelname || !*modelname) {
2297 ice->eeprom.subvendor = 0;
2298 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2299 ice->eeprom.subvendor =
2300 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2301 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2302 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2303 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
2304 if (ice->eeprom.subvendor == 0 ||
2305 ice->eeprom.subvendor == (unsigned int)-1) {
2306
2307
2308
2309 u16 vendor, device;
2310 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2311 &vendor);
2312 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2313 ice->eeprom.subvendor =
2314 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2315 if (ice->eeprom.subvendor == 0 ||
2316 ice->eeprom.subvendor == (unsigned int)-1) {
2317 dev_err(ice->card->dev,
2318 "No valid ID is found\n");
2319 return -ENXIO;
2320 }
2321 }
2322 }
2323 for (tbl = card_tables; *tbl; tbl++) {
2324 for (c = *tbl; c->name; c++) {
2325 if (modelname && c->model &&
2326 !strcmp(modelname, c->model)) {
2327 dev_info(ice->card->dev,
2328 "Using board model %s\n",
2329 c->name);
2330 ice->eeprom.subvendor = c->subvendor;
2331 } else if (c->subvendor != ice->eeprom.subvendor)
2332 continue;
2333 ice->card_info = c;
2334 if (!c->eeprom_size || !c->eeprom_data)
2335 goto found;
2336
2337 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2338 ice->eeprom.version = 2;
2339 ice->eeprom.size = c->eeprom_size + 6;
2340 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2341 goto read_skipped;
2342 }
2343 }
2344 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2345 ice->eeprom.subvendor);
2346 #ifdef CONFIG_PM_SLEEP
2347
2348 ice->pm_suspend_enabled = 1;
2349 #endif
2350
2351 found:
2352 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2353 if (ice->eeprom.size < 6)
2354 ice->eeprom.size = 32;
2355 else if (ice->eeprom.size > 32) {
2356 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n",
2357 ice->eeprom.size);
2358 return -EIO;
2359 }
2360 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2361 if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
2362 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n",
2363 ice->eeprom.version);
2364 size = ice->eeprom.size - 6;
2365 for (i = 0; i < size; i++)
2366 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2367
2368 read_skipped:
2369 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2370 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2371 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2372
2373 return 0;
2374 }
2375
2376
2377
2378 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
2379 {
2380 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2381 inb(ICEREG1724(ice, CONTROL));
2382 msleep(10);
2383 outb(0, ICEREG1724(ice, CONTROL));
2384 inb(ICEREG1724(ice, CONTROL));
2385 msleep(10);
2386 }
2387
2388 static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
2389 {
2390 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2391 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2392 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2393 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2394
2395 ice->gpio.write_mask = ice->eeprom.gpiomask;
2396 ice->gpio.direction = ice->eeprom.gpiodir;
2397 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2398 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2399 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2400
2401 outb(0, ICEREG1724(ice, POWERDOWN));
2402
2403
2404 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2405
2406
2407
2408
2409 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2410
2411 return 0;
2412 }
2413
2414 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
2415 {
2416 int err;
2417 struct snd_kcontrol *kctl;
2418
2419 if (snd_BUG_ON(!ice->pcm))
2420 return -EIO;
2421
2422 if (!ice->own_routing) {
2423 err = snd_ctl_add(ice->card,
2424 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2425 if (err < 0)
2426 return err;
2427 }
2428
2429 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2430 if (err < 0)
2431 return err;
2432
2433 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2434 if (err < 0)
2435 return err;
2436 kctl->id.device = ice->pcm->device;
2437 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2438 if (err < 0)
2439 return err;
2440 kctl->id.device = ice->pcm->device;
2441 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2442 if (err < 0)
2443 return err;
2444 kctl->id.device = ice->pcm->device;
2445 #if 0
2446 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2447 if (err < 0)
2448 return err;
2449 kctl->id.device = ice->pcm->device;
2450 ice->spdif.stream_ctl = kctl;
2451 #endif
2452 return 0;
2453 }
2454
2455
2456 static int snd_vt1724_build_controls(struct snd_ice1712 *ice)
2457 {
2458 int err;
2459
2460 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2461 if (err < 0)
2462 return err;
2463 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2464 if (err < 0)
2465 return err;
2466
2467 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2468 if (err < 0)
2469 return err;
2470 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2471 if (err < 0)
2472 return err;
2473
2474 if (!ice->own_routing && ice->num_total_dacs > 0) {
2475 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
2476 tmp.count = ice->num_total_dacs;
2477 if (ice->vt1720 && tmp.count > 2)
2478 tmp.count = 2;
2479 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2480 if (err < 0)
2481 return err;
2482 }
2483
2484 return snd_ctl_add(ice->card,
2485 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2486 }
2487
2488 static int snd_vt1724_free(struct snd_ice1712 *ice)
2489 {
2490 if (!ice->port)
2491 goto __hw_end;
2492
2493 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2494 outb(0xff, ICEREG1724(ice, IRQMASK));
2495
2496 __hw_end:
2497 if (ice->irq >= 0)
2498 free_irq(ice->irq, ice);
2499 pci_release_regions(ice->pci);
2500 snd_ice1712_akm4xxx_free(ice);
2501 pci_disable_device(ice->pci);
2502 kfree(ice->spec);
2503 kfree(ice);
2504 return 0;
2505 }
2506
2507 static int snd_vt1724_dev_free(struct snd_device *device)
2508 {
2509 struct snd_ice1712 *ice = device->device_data;
2510 return snd_vt1724_free(ice);
2511 }
2512
2513 static int snd_vt1724_create(struct snd_card *card,
2514 struct pci_dev *pci,
2515 const char *modelname,
2516 struct snd_ice1712 **r_ice1712)
2517 {
2518 struct snd_ice1712 *ice;
2519 int err;
2520 static struct snd_device_ops ops = {
2521 .dev_free = snd_vt1724_dev_free,
2522 };
2523
2524 *r_ice1712 = NULL;
2525
2526
2527 err = pci_enable_device(pci);
2528 if (err < 0)
2529 return err;
2530
2531 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2532 if (ice == NULL) {
2533 pci_disable_device(pci);
2534 return -ENOMEM;
2535 }
2536 ice->vt1724 = 1;
2537 spin_lock_init(&ice->reg_lock);
2538 mutex_init(&ice->gpio_mutex);
2539 mutex_init(&ice->open_mutex);
2540 mutex_init(&ice->i2c_mutex);
2541 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2542 ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
2543 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2544 ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
2545 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2546 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2547 ice->card = card;
2548 ice->pci = pci;
2549 ice->irq = -1;
2550 pci_set_master(pci);
2551 snd_vt1724_proc_init(ice);
2552 synchronize_irq(pci->irq);
2553
2554 card->private_data = ice;
2555
2556 err = pci_request_regions(pci, "ICE1724");
2557 if (err < 0) {
2558 kfree(ice);
2559 pci_disable_device(pci);
2560 return err;
2561 }
2562 ice->port = pci_resource_start(pci, 0);
2563 ice->profi_port = pci_resource_start(pci, 1);
2564
2565 if (request_irq(pci->irq, snd_vt1724_interrupt,
2566 IRQF_SHARED, KBUILD_MODNAME, ice)) {
2567 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2568 snd_vt1724_free(ice);
2569 return -EIO;
2570 }
2571
2572 ice->irq = pci->irq;
2573
2574 snd_vt1724_chip_reset(ice);
2575 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2576 snd_vt1724_free(ice);
2577 return -EIO;
2578 }
2579 if (snd_vt1724_chip_init(ice) < 0) {
2580 snd_vt1724_free(ice);
2581 return -EIO;
2582 }
2583
2584 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2585 if (err < 0) {
2586 snd_vt1724_free(ice);
2587 return err;
2588 }
2589
2590 *r_ice1712 = ice;
2591 return 0;
2592 }
2593
2594
2595
2596
2597
2598
2599
2600
2601 static int snd_vt1724_probe(struct pci_dev *pci,
2602 const struct pci_device_id *pci_id)
2603 {
2604 static int dev;
2605 struct snd_card *card;
2606 struct snd_ice1712 *ice;
2607 int pcm_dev = 0, err;
2608 struct snd_ice1712_card_info * const *tbl, *c;
2609
2610 if (dev >= SNDRV_CARDS)
2611 return -ENODEV;
2612 if (!enable[dev]) {
2613 dev++;
2614 return -ENOENT;
2615 }
2616
2617 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2618 0, &card);
2619 if (err < 0)
2620 return err;
2621
2622 strcpy(card->driver, "ICE1724");
2623 strcpy(card->shortname, "ICEnsemble ICE1724");
2624
2625 err = snd_vt1724_create(card, pci, model[dev], &ice);
2626 if (err < 0) {
2627 snd_card_free(card);
2628 return err;
2629 }
2630
2631
2632 ice->ext_clock_count = 0;
2633
2634 for (tbl = card_tables; *tbl; tbl++) {
2635 for (c = *tbl; c->name; c++) {
2636 if ((model[dev] && c->model &&
2637 !strcmp(model[dev], c->model)) ||
2638 (c->subvendor == ice->eeprom.subvendor)) {
2639 strcpy(card->shortname, c->name);
2640 if (c->driver)
2641 strcpy(card->driver, c->driver);
2642 if (c->chip_init) {
2643 err = c->chip_init(ice);
2644 if (err < 0) {
2645 snd_card_free(card);
2646 return err;
2647 }
2648 }
2649 goto __found;
2650 }
2651 }
2652 }
2653 c = &no_matched;
2654 __found:
2655
2656
2657
2658
2659
2660
2661
2662
2663 ice->pro_rate_default = PRO_RATE_DEFAULT;
2664 if (!ice->is_spdif_master)
2665 ice->is_spdif_master = stdclock_is_spdif_master;
2666 if (!ice->get_rate)
2667 ice->get_rate = stdclock_get_rate;
2668 if (!ice->set_rate)
2669 ice->set_rate = stdclock_set_rate;
2670 if (!ice->set_mclk)
2671 ice->set_mclk = stdclock_set_mclk;
2672 if (!ice->set_spdif_clock)
2673 ice->set_spdif_clock = stdclock_set_spdif_clock;
2674 if (!ice->get_spdif_master_type)
2675 ice->get_spdif_master_type = stdclock_get_spdif_master_type;
2676 if (!ice->ext_clock_names)
2677 ice->ext_clock_names = ext_clock_names;
2678 if (!ice->ext_clock_count)
2679 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
2680
2681 if (!ice->hw_rates)
2682 set_std_hw_rates(ice);
2683
2684 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2685 if (err < 0) {
2686 snd_card_free(card);
2687 return err;
2688 }
2689
2690 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2691 if (err < 0) {
2692 snd_card_free(card);
2693 return err;
2694 }
2695
2696 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2697 if (err < 0) {
2698 snd_card_free(card);
2699 return err;
2700 }
2701
2702 err = snd_vt1724_ac97_mixer(ice);
2703 if (err < 0) {
2704 snd_card_free(card);
2705 return err;
2706 }
2707
2708 err = snd_vt1724_build_controls(ice);
2709 if (err < 0) {
2710 snd_card_free(card);
2711 return err;
2712 }
2713
2714 if (ice->pcm && ice->has_spdif) {
2715 err = snd_vt1724_spdif_build_controls(ice);
2716 if (err < 0) {
2717 snd_card_free(card);
2718 return err;
2719 }
2720 }
2721
2722 if (c->build_controls) {
2723 err = c->build_controls(ice);
2724 if (err < 0) {
2725 snd_card_free(card);
2726 return err;
2727 }
2728 }
2729
2730 if (!c->no_mpu401) {
2731 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2732 struct snd_rawmidi *rmidi;
2733
2734 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2735 if (err < 0) {
2736 snd_card_free(card);
2737 return err;
2738 }
2739 ice->rmidi[0] = rmidi;
2740 rmidi->private_data = ice;
2741 strcpy(rmidi->name, "ICE1724 MIDI");
2742 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2743 SNDRV_RAWMIDI_INFO_INPUT |
2744 SNDRV_RAWMIDI_INFO_DUPLEX;
2745 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2746 &vt1724_midi_output_ops);
2747 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2748 &vt1724_midi_input_ops);
2749
2750
2751 outb(VT1724_MPU_RX_FIFO | 0x1,
2752 ICEREG1724(ice, MPU_FIFO_WM));
2753 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
2754
2755 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
2756 }
2757 }
2758
2759 sprintf(card->longname, "%s at 0x%lx, irq %i",
2760 card->shortname, ice->port, ice->irq);
2761
2762 err = snd_card_register(card);
2763 if (err < 0) {
2764 snd_card_free(card);
2765 return err;
2766 }
2767 pci_set_drvdata(pci, card);
2768 dev++;
2769 return 0;
2770 }
2771
2772 static void snd_vt1724_remove(struct pci_dev *pci)
2773 {
2774 struct snd_card *card = pci_get_drvdata(pci);
2775 struct snd_ice1712 *ice = card->private_data;
2776
2777 if (ice->card_info && ice->card_info->chip_exit)
2778 ice->card_info->chip_exit(ice);
2779 snd_card_free(card);
2780 }
2781
2782 #ifdef CONFIG_PM_SLEEP
2783 static int snd_vt1724_suspend(struct device *dev)
2784 {
2785 struct snd_card *card = dev_get_drvdata(dev);
2786 struct snd_ice1712 *ice = card->private_data;
2787
2788 if (!ice->pm_suspend_enabled)
2789 return 0;
2790
2791 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2792
2793 snd_ac97_suspend(ice->ac97);
2794
2795 spin_lock_irq(&ice->reg_lock);
2796 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2797 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2798 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2799 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2800 spin_unlock_irq(&ice->reg_lock);
2801
2802 if (ice->pm_suspend)
2803 ice->pm_suspend(ice);
2804 return 0;
2805 }
2806
2807 static int snd_vt1724_resume(struct device *dev)
2808 {
2809 struct snd_card *card = dev_get_drvdata(dev);
2810 struct snd_ice1712 *ice = card->private_data;
2811
2812 if (!ice->pm_suspend_enabled)
2813 return 0;
2814
2815 snd_vt1724_chip_reset(ice);
2816
2817 if (snd_vt1724_chip_init(ice) < 0) {
2818 snd_card_disconnect(card);
2819 return -EIO;
2820 }
2821
2822 if (ice->pm_resume)
2823 ice->pm_resume(ice);
2824
2825 if (ice->pm_saved_is_spdif_master) {
2826
2827 ice->set_spdif_clock(ice, 0);
2828 } else {
2829
2830 int rate;
2831 if (ice->cur_rate)
2832 rate = ice->cur_rate;
2833 else
2834 rate = ice->pro_rate_default;
2835 snd_vt1724_set_pro_rate(ice, rate, 1);
2836 }
2837
2838 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2839
2840 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2841 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2842
2843 snd_ac97_resume(ice->ac97);
2844
2845 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2846 return 0;
2847 }
2848
2849 static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume);
2850 #define SND_VT1724_PM_OPS &snd_vt1724_pm
2851 #else
2852 #define SND_VT1724_PM_OPS NULL
2853 #endif
2854
2855 static struct pci_driver vt1724_driver = {
2856 .name = KBUILD_MODNAME,
2857 .id_table = snd_vt1724_ids,
2858 .probe = snd_vt1724_probe,
2859 .remove = snd_vt1724_remove,
2860 .driver = {
2861 .pm = SND_VT1724_PM_OPS,
2862 },
2863 };
2864
2865 module_pci_driver(vt1724_driver);