This source file includes following definitions.
- init_hw
- set_mixer_defaults
- detect_input_clocks
- load_asic
- set_sample_rate
- set_input_clock
- set_input_gain
- update_flags
- set_professional_spdif
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  32 static int set_professional_spdif(struct echoaudio *chip, char prof);
  33 static int update_flags(struct echoaudio *chip);
  34 
  35 
  36 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
  37 {
  38         int err;
  39 
  40         if (snd_BUG_ON((subdevice_id & 0xfff0) != GINA20))
  41                 return -ENODEV;
  42 
  43         if ((err = init_dsp_comm_page(chip))) {
  44                 dev_err(chip->card->dev,
  45                         "init_hw - could not initialize DSP comm page\n");
  46                 return err;
  47         }
  48 
  49         chip->device_id = device_id;
  50         chip->subdevice_id = subdevice_id;
  51         chip->bad_board = true;
  52         chip->dsp_code_to_load = FW_GINA20_DSP;
  53         chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
  54         chip->clock_state = GD_CLOCK_UNDEF;
  55         
  56 
  57         chip->asic_loaded = true;
  58         chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
  59                 ECHO_CLOCK_BIT_SPDIF;
  60 
  61         if ((err = load_firmware(chip)) < 0)
  62                 return err;
  63         chip->bad_board = false;
  64 
  65         return err;
  66 }
  67 
  68 
  69 
  70 static int set_mixer_defaults(struct echoaudio *chip)
  71 {
  72         chip->professional_spdif = false;
  73         return init_line_levels(chip);
  74 }
  75 
  76 
  77 
  78 static u32 detect_input_clocks(const struct echoaudio *chip)
  79 {
  80         u32 clocks_from_dsp, clock_bits;
  81 
  82         
  83 
  84         clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
  85 
  86         clock_bits = ECHO_CLOCK_BIT_INTERNAL;
  87 
  88         if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
  89                 clock_bits |= ECHO_CLOCK_BIT_SPDIF;
  90 
  91         return clock_bits;
  92 }
  93 
  94 
  95 
  96 
  97 static int load_asic(struct echoaudio *chip)
  98 {
  99         return 0;
 100 }
 101 
 102 
 103 
 104 static int set_sample_rate(struct echoaudio *chip, u32 rate)
 105 {
 106         u8 clock_state, spdif_status;
 107 
 108         if (wait_handshake(chip))
 109                 return -EIO;
 110 
 111         switch (rate) {
 112         case 44100:
 113                 clock_state = GD_CLOCK_44;
 114                 spdif_status = GD_SPDIF_STATUS_44;
 115                 break;
 116         case 48000:
 117                 clock_state = GD_CLOCK_48;
 118                 spdif_status = GD_SPDIF_STATUS_48;
 119                 break;
 120         default:
 121                 clock_state = GD_CLOCK_NOCHANGE;
 122                 spdif_status = GD_SPDIF_STATUS_NOCHANGE;
 123                 break;
 124         }
 125 
 126         if (chip->clock_state == clock_state)
 127                 clock_state = GD_CLOCK_NOCHANGE;
 128         if (spdif_status == chip->spdif_status)
 129                 spdif_status = GD_SPDIF_STATUS_NOCHANGE;
 130 
 131         chip->comm_page->sample_rate = cpu_to_le32(rate);
 132         chip->comm_page->gd_clock_state = clock_state;
 133         chip->comm_page->gd_spdif_status = spdif_status;
 134         chip->comm_page->gd_resampler_state = 3;        
 135 
 136         
 137         if (clock_state != GD_CLOCK_NOCHANGE)
 138                 chip->clock_state = clock_state;
 139         if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
 140                 chip->spdif_status = spdif_status;
 141         chip->sample_rate = rate;
 142 
 143         clear_handshake(chip);
 144         return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
 145 }
 146 
 147 
 148 
 149 static int set_input_clock(struct echoaudio *chip, u16 clock)
 150 {
 151 
 152         switch (clock) {
 153         case ECHO_CLOCK_INTERNAL:
 154                 
 155                 chip->clock_state = GD_CLOCK_UNDEF;
 156                 chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
 157                 set_sample_rate(chip, chip->sample_rate);
 158                 chip->input_clock = clock;
 159                 break;
 160         case ECHO_CLOCK_SPDIF:
 161                 chip->comm_page->gd_clock_state = GD_CLOCK_SPDIFIN;
 162                 chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_NOCHANGE;
 163                 clear_handshake(chip);
 164                 send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
 165                 chip->clock_state = GD_CLOCK_SPDIFIN;
 166                 chip->input_clock = clock;
 167                 break;
 168         default:
 169                 return -EINVAL;
 170         }
 171 
 172         return 0;
 173 }
 174 
 175 
 176 
 177 
 178 static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
 179 {
 180         if (snd_BUG_ON(input >= num_busses_in(chip)))
 181                 return -EINVAL;
 182 
 183         if (wait_handshake(chip))
 184                 return -EIO;
 185 
 186         chip->input_gain[input] = gain;
 187         gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
 188         chip->comm_page->line_in_level[input] = gain;
 189         return 0;
 190 }
 191 
 192 
 193 
 194 
 195 static int update_flags(struct echoaudio *chip)
 196 {
 197         if (wait_handshake(chip))
 198                 return -EIO;
 199         clear_handshake(chip);
 200         return send_vector(chip, DSP_VC_UPDATE_FLAGS);
 201 }
 202 
 203 
 204 
 205 static int set_professional_spdif(struct echoaudio *chip, char prof)
 206 {
 207         if (prof)
 208                 chip->comm_page->flags |=
 209                         cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
 210         else
 211                 chip->comm_page->flags &=
 212                         ~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
 213         chip->professional_spdif = prof;
 214         return update_flags(chip);
 215 }