This source file includes following definitions.
- snd_als4k_iobase_writeb
- snd_als4k_iobase_writel
- snd_als4k_iobase_readb
- snd_als4k_iobase_readl
- snd_als4k_gcr_write_addr
- snd_als4k_gcr_write
- snd_als4k_gcr_read_addr
- snd_als4k_gcr_read
- snd_als4_cr_write
- snd_als4_cr_read
- snd_als4000_set_rate
- snd_als4000_set_capture_dma
- snd_als4000_set_playback_dma
- snd_als4000_get_format
- snd_als4000_hw_params
- snd_als4000_hw_free
- snd_als4000_capture_prepare
- snd_als4000_playback_prepare
- snd_als4000_capture_trigger
- snd_als4000_playback_trigger
- snd_als4000_capture_pointer
- snd_als4000_playback_pointer
- snd_als4000_interrupt
- snd_als4000_playback_open
- snd_als4000_playback_close
- snd_als4000_capture_open
- snd_als4000_capture_close
- snd_als4000_pcm
- snd_als4000_set_addr
- snd_als4000_configure
- snd_als4000_create_gameport
- snd_als4000_free_gameport
- snd_als4000_create_gameport
- snd_als4000_free_gameport
- snd_card_als4000_free
- snd_card_als4000_probe
- snd_card_als4000_remove
- snd_als4000_suspend
- snd_als4000_resume
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54 #include <linux/io.h>
55 #include <linux/init.h>
56 #include <linux/pci.h>
57 #include <linux/gameport.h>
58 #include <linux/module.h>
59 #include <linux/dma-mapping.h>
60 #include <sound/core.h>
61 #include <sound/pcm.h>
62 #include <sound/rawmidi.h>
63 #include <sound/mpu401.h>
64 #include <sound/opl3.h>
65 #include <sound/sb.h>
66 #include <sound/initval.h>
67
68 MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
69 MODULE_DESCRIPTION("Avance Logic ALS4000");
70 MODULE_LICENSE("GPL");
71 MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}");
72
73 #if IS_REACHABLE(CONFIG_GAMEPORT)
74 #define SUPPORT_JOYSTICK 1
75 #endif
76
77 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
78 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
79 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
80 #ifdef SUPPORT_JOYSTICK
81 static int joystick_port[SNDRV_CARDS];
82 #endif
83
84 module_param_array(index, int, NULL, 0444);
85 MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
86 module_param_array(id, charp, NULL, 0444);
87 MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
88 module_param_array(enable, bool, NULL, 0444);
89 MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
90 #ifdef SUPPORT_JOYSTICK
91 module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
92 MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
93 #endif
94
95 struct snd_card_als4000 {
96
97 unsigned long iobase;
98 struct pci_dev *pci;
99 struct snd_sb *chip;
100 #ifdef SUPPORT_JOYSTICK
101 struct gameport *gameport;
102 #endif
103 };
104
105 static const struct pci_device_id snd_als4000_ids[] = {
106 { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
107 { 0, }
108 };
109
110 MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
111
112 enum als4k_iobase_t {
113
114 ALS4K_IOD_00_AC97_ACCESS = 0x00,
115 ALS4K_IOW_04_AC97_READ = 0x04,
116 ALS4K_IOB_06_AC97_STATUS = 0x06,
117 ALS4K_IOB_07_IRQSTATUS = 0x07,
118 ALS4K_IOD_08_GCR_DATA = 0x08,
119 ALS4K_IOB_0C_GCR_INDEX = 0x0c,
120 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
121 ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
122 ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
123 ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
124 ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
125 ALS4K_IOB_14_MIXER_INDEX = 0x14,
126 ALS4K_IOB_15_MIXER_DATA = 0x15,
127 ALS4K_IOB_16_ESP_RESET = 0x16,
128 ALS4K_IOB_16_ACK_FOR_CR1E = 0x16,
129 ALS4K_IOB_18_OPL_ADDR0 = 0x18,
130 ALS4K_IOB_19_OPL_ADDR1 = 0x19,
131 ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
132 ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
133 ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c,
134 ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
135 ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
136 ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
137 ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
138 ALS4K_IOB_30_MIDI_DATA = 0x30,
139 ALS4K_IOB_31_MIDI_STATUS = 0x31,
140 ALS4K_IOB_31_MIDI_COMMAND = 0x31,
141 };
142
143 enum als4k_iobase_0e_t {
144 ALS4K_IOB_0E_MPU_IRQ = 0x10,
145 ALS4K_IOB_0E_CR1E_IRQ = 0x40,
146 ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
147 };
148
149 enum als4k_gcr_t {
150 ALS4K_GCR8C_MISC_CTRL = 0x8c,
151 ALS4K_GCR90_TEST_MODE_REG = 0x90,
152 ALS4K_GCR91_DMA0_ADDR = 0x91,
153 ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
154 ALS4K_GCR93_DMA1_ADDR = 0x93,
155 ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
156 ALS4K_GCR95_DMA3_ADDR = 0x95,
157 ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
158 ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
159 ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
160 ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
161 ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
162 ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
163 ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
164 ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
165 ALS4K_GCRA6_PM_CTRL = 0xa6,
166 ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
167 ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
168 ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
169 ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
170 };
171
172 enum als4k_gcr8c_t {
173 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
174 ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
175 };
176
177 static inline void snd_als4k_iobase_writeb(unsigned long iobase,
178 enum als4k_iobase_t reg,
179 u8 val)
180 {
181 outb(val, iobase + reg);
182 }
183
184 static inline void snd_als4k_iobase_writel(unsigned long iobase,
185 enum als4k_iobase_t reg,
186 u32 val)
187 {
188 outl(val, iobase + reg);
189 }
190
191 static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
192 enum als4k_iobase_t reg)
193 {
194 return inb(iobase + reg);
195 }
196
197 static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
198 enum als4k_iobase_t reg)
199 {
200 return inl(iobase + reg);
201 }
202
203 static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
204 enum als4k_gcr_t reg,
205 u32 val)
206 {
207 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
208 snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
209 }
210
211 static inline void snd_als4k_gcr_write(struct snd_sb *sb,
212 enum als4k_gcr_t reg,
213 u32 val)
214 {
215 snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
216 }
217
218 static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
219 enum als4k_gcr_t reg)
220 {
221
222 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
223 return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
224 }
225
226 static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
227 {
228 return snd_als4k_gcr_read_addr(sb->alt_port, reg);
229 }
230
231 enum als4k_cr_t {
232 ALS4K_CR0_SB_CONFIG = 0x00,
233 ALS4K_CR2_MISC_CONTROL = 0x02,
234 ALS4K_CR3_CONFIGURATION = 0x03,
235 ALS4K_CR17_FIFO_STATUS = 0x17,
236 ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
237 ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
238 ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
239 ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
240 ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
241 ALS4K_CR1E_FIFO2_CONTROL = 0x1e,
242 ALS4K_CR3A_MISC_CONTROL = 0x3a,
243 ALS4K_CR3B_CRC32_BYTE0 = 0x3b,
244 ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
245 ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
246 ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
247 };
248
249 enum als4k_cr0_t {
250 ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02,
251 ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04,
252 ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
253 };
254
255 static inline void snd_als4_cr_write(struct snd_sb *chip,
256 enum als4k_cr_t reg,
257 u8 data)
258 {
259
260
261
262 snd_sbmixer_write(chip, reg | 0xc0, data);
263 }
264
265 static inline u8 snd_als4_cr_read(struct snd_sb *chip,
266 enum als4k_cr_t reg)
267 {
268
269 return snd_sbmixer_read(chip, reg | 0xc0);
270 }
271
272
273
274 static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
275 {
276 if (!(chip->mode & SB_RATE_LOCK)) {
277 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
278 snd_sbdsp_command(chip, rate>>8);
279 snd_sbdsp_command(chip, rate);
280 }
281 }
282
283 static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
284 dma_addr_t addr, unsigned size)
285 {
286
287 snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
288 snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
289 }
290
291 static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
292 dma_addr_t addr,
293 unsigned size)
294 {
295
296 snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
297 snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
298 (size-1)|0x180000);
299 }
300
301 #define ALS4000_FORMAT_SIGNED (1<<0)
302 #define ALS4000_FORMAT_16BIT (1<<1)
303 #define ALS4000_FORMAT_STEREO (1<<2)
304
305 static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
306 {
307 int result;
308
309 result = 0;
310 if (snd_pcm_format_signed(runtime->format))
311 result |= ALS4000_FORMAT_SIGNED;
312 if (snd_pcm_format_physical_width(runtime->format) == 16)
313 result |= ALS4000_FORMAT_16BIT;
314 if (runtime->channels > 1)
315 result |= ALS4000_FORMAT_STEREO;
316 return result;
317 }
318
319
320 static const struct {
321 unsigned char dsp_cmd, dma_on, dma_off, format;
322 } playback_cmd_vals[]={
323
324 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
325
326 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
327
328 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
329
330 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
331
332 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
333
334 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
335
336 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
337
338 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
339 };
340 #define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
341
342
343 enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
344 static const unsigned char capture_cmd_vals[]=
345 {
346 CMD_WIDTH8|CMD_MONO,
347 CMD_WIDTH8|CMD_SIGNED|CMD_MONO,
348 CMD_MONO,
349 CMD_SIGNED|CMD_MONO,
350 CMD_WIDTH8|CMD_STEREO,
351 CMD_WIDTH8|CMD_SIGNED|CMD_STEREO,
352 CMD_STEREO,
353 CMD_SIGNED|CMD_STEREO,
354 };
355 #define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
356
357 static int snd_als4000_hw_params(struct snd_pcm_substream *substream,
358 struct snd_pcm_hw_params *hw_params)
359 {
360 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
361 }
362
363 static int snd_als4000_hw_free(struct snd_pcm_substream *substream)
364 {
365 snd_pcm_lib_free_pages(substream);
366 return 0;
367 }
368
369 static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
370 {
371 struct snd_sb *chip = snd_pcm_substream_chip(substream);
372 struct snd_pcm_runtime *runtime = substream->runtime;
373 unsigned long size;
374 unsigned count;
375
376 chip->capture_format = snd_als4000_get_format(runtime);
377
378 size = snd_pcm_lib_buffer_bytes(substream);
379 count = snd_pcm_lib_period_bytes(substream);
380
381 if (chip->capture_format & ALS4000_FORMAT_16BIT)
382 count >>= 1;
383 count--;
384
385 spin_lock_irq(&chip->reg_lock);
386 snd_als4000_set_rate(chip, runtime->rate);
387 snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
388 spin_unlock_irq(&chip->reg_lock);
389 spin_lock_irq(&chip->mixer_lock);
390 snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
391 snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
392 spin_unlock_irq(&chip->mixer_lock);
393 return 0;
394 }
395
396 static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
397 {
398 struct snd_sb *chip = snd_pcm_substream_chip(substream);
399 struct snd_pcm_runtime *runtime = substream->runtime;
400 unsigned long size;
401 unsigned count;
402
403 chip->playback_format = snd_als4000_get_format(runtime);
404
405 size = snd_pcm_lib_buffer_bytes(substream);
406 count = snd_pcm_lib_period_bytes(substream);
407
408 if (chip->playback_format & ALS4000_FORMAT_16BIT)
409 count >>= 1;
410 count--;
411
412
413
414
415
416
417
418 spin_lock_irq(&chip->reg_lock);
419 snd_als4000_set_rate(chip, runtime->rate);
420 snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
421
422
423
424 snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
425 snd_sbdsp_command(chip, playback_cmd(chip).format);
426 snd_sbdsp_command(chip, count & 0xff);
427 snd_sbdsp_command(chip, count >> 8);
428 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
429 spin_unlock_irq(&chip->reg_lock);
430
431 return 0;
432 }
433
434 static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
435 {
436 struct snd_sb *chip = snd_pcm_substream_chip(substream);
437 int result = 0;
438
439
440
441
442
443
444
445 spin_lock(&chip->mixer_lock);
446 switch (cmd) {
447 case SNDRV_PCM_TRIGGER_START:
448 case SNDRV_PCM_TRIGGER_RESUME:
449 chip->mode |= SB_RATE_LOCK_CAPTURE;
450 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
451 capture_cmd(chip));
452 break;
453 case SNDRV_PCM_TRIGGER_STOP:
454 case SNDRV_PCM_TRIGGER_SUSPEND:
455 chip->mode &= ~SB_RATE_LOCK_CAPTURE;
456 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
457 capture_cmd(chip));
458 break;
459 default:
460 result = -EINVAL;
461 break;
462 }
463 spin_unlock(&chip->mixer_lock);
464 return result;
465 }
466
467 static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
468 {
469 struct snd_sb *chip = snd_pcm_substream_chip(substream);
470 int result = 0;
471
472 spin_lock(&chip->reg_lock);
473 switch (cmd) {
474 case SNDRV_PCM_TRIGGER_START:
475 case SNDRV_PCM_TRIGGER_RESUME:
476 chip->mode |= SB_RATE_LOCK_PLAYBACK;
477 snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
478 break;
479 case SNDRV_PCM_TRIGGER_STOP:
480 case SNDRV_PCM_TRIGGER_SUSPEND:
481 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
482 chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
483 break;
484 default:
485 result = -EINVAL;
486 break;
487 }
488 spin_unlock(&chip->reg_lock);
489 return result;
490 }
491
492 static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
493 {
494 struct snd_sb *chip = snd_pcm_substream_chip(substream);
495 unsigned int result;
496
497 spin_lock(&chip->reg_lock);
498 result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
499 spin_unlock(&chip->reg_lock);
500 result &= 0xffff;
501 return bytes_to_frames( substream->runtime, result );
502 }
503
504 static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
505 {
506 struct snd_sb *chip = snd_pcm_substream_chip(substream);
507 unsigned result;
508
509 spin_lock(&chip->reg_lock);
510 result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
511 spin_unlock(&chip->reg_lock);
512 result &= 0xffff;
513 return bytes_to_frames( substream->runtime, result );
514 }
515
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519
520
521
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523
524
525
526
527
528
529 static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
530 {
531 struct snd_sb *chip = dev_id;
532 unsigned pci_irqstatus;
533 unsigned sb_irqstatus;
534
535
536
537 pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
538 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
539 if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
540 && (chip->playback_substream))
541 snd_pcm_period_elapsed(chip->playback_substream);
542 if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
543 && (chip->capture_substream))
544 snd_pcm_period_elapsed(chip->capture_substream);
545 if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
546 && (chip->rmidi))
547 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
548
549 snd_als4k_iobase_writeb(chip->alt_port,
550 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
551
552 spin_lock(&chip->mixer_lock);
553
554 sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
555 spin_unlock(&chip->mixer_lock);
556
557 if (sb_irqstatus & SB_IRQTYPE_8BIT)
558 snd_sb_ack_8bit(chip);
559 if (sb_irqstatus & SB_IRQTYPE_16BIT)
560 snd_sb_ack_16bit(chip);
561 if (sb_irqstatus & SB_IRQTYPE_MPUIN)
562 inb(chip->mpu_port);
563 if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
564 snd_als4k_iobase_readb(chip->alt_port,
565 ALS4K_IOB_16_ACK_FOR_CR1E);
566
567
568
569
570
571 return IRQ_RETVAL(
572 (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
573 ALS4K_IOB_0E_MPU_IRQ))
574 || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
575 SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
576 );
577 }
578
579
580
581 static const struct snd_pcm_hardware snd_als4000_playback =
582 {
583 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
584 SNDRV_PCM_INFO_MMAP_VALID),
585 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
586 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
587 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
588 .rate_min = 4000,
589 .rate_max = 48000,
590 .channels_min = 1,
591 .channels_max = 2,
592 .buffer_bytes_max = 65536,
593 .period_bytes_min = 64,
594 .period_bytes_max = 65536,
595 .periods_min = 1,
596 .periods_max = 1024,
597 .fifo_size = 0
598 };
599
600 static const struct snd_pcm_hardware snd_als4000_capture =
601 {
602 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
603 SNDRV_PCM_INFO_MMAP_VALID),
604 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
605 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
606 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
607 .rate_min = 4000,
608 .rate_max = 48000,
609 .channels_min = 1,
610 .channels_max = 2,
611 .buffer_bytes_max = 65536,
612 .period_bytes_min = 64,
613 .period_bytes_max = 65536,
614 .periods_min = 1,
615 .periods_max = 1024,
616 .fifo_size = 0
617 };
618
619
620
621 static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
622 {
623 struct snd_sb *chip = snd_pcm_substream_chip(substream);
624 struct snd_pcm_runtime *runtime = substream->runtime;
625
626 chip->playback_substream = substream;
627 runtime->hw = snd_als4000_playback;
628 return 0;
629 }
630
631 static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
632 {
633 struct snd_sb *chip = snd_pcm_substream_chip(substream);
634
635 chip->playback_substream = NULL;
636 snd_pcm_lib_free_pages(substream);
637 return 0;
638 }
639
640 static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
641 {
642 struct snd_sb *chip = snd_pcm_substream_chip(substream);
643 struct snd_pcm_runtime *runtime = substream->runtime;
644
645 chip->capture_substream = substream;
646 runtime->hw = snd_als4000_capture;
647 return 0;
648 }
649
650 static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
651 {
652 struct snd_sb *chip = snd_pcm_substream_chip(substream);
653
654 chip->capture_substream = NULL;
655 snd_pcm_lib_free_pages(substream);
656 return 0;
657 }
658
659
660
661 static const struct snd_pcm_ops snd_als4000_playback_ops = {
662 .open = snd_als4000_playback_open,
663 .close = snd_als4000_playback_close,
664 .ioctl = snd_pcm_lib_ioctl,
665 .hw_params = snd_als4000_hw_params,
666 .hw_free = snd_als4000_hw_free,
667 .prepare = snd_als4000_playback_prepare,
668 .trigger = snd_als4000_playback_trigger,
669 .pointer = snd_als4000_playback_pointer
670 };
671
672 static const struct snd_pcm_ops snd_als4000_capture_ops = {
673 .open = snd_als4000_capture_open,
674 .close = snd_als4000_capture_close,
675 .ioctl = snd_pcm_lib_ioctl,
676 .hw_params = snd_als4000_hw_params,
677 .hw_free = snd_als4000_hw_free,
678 .prepare = snd_als4000_capture_prepare,
679 .trigger = snd_als4000_capture_trigger,
680 .pointer = snd_als4000_capture_pointer
681 };
682
683 static int snd_als4000_pcm(struct snd_sb *chip, int device)
684 {
685 struct snd_pcm *pcm;
686 int err;
687
688 err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
689 if (err < 0)
690 return err;
691 pcm->private_data = chip;
692 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
693 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
695
696 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
697 64*1024, 64*1024);
698
699 chip->pcm = pcm;
700
701 return 0;
702 }
703
704
705
706 static void snd_als4000_set_addr(unsigned long iobase,
707 unsigned int sb_io,
708 unsigned int mpu_io,
709 unsigned int opl_io,
710 unsigned int game_io)
711 {
712 u32 cfg1 = 0;
713 u32 cfg2 = 0;
714
715 if (mpu_io > 0)
716 cfg2 |= (mpu_io | 1) << 16;
717 if (sb_io > 0)
718 cfg2 |= (sb_io | 1);
719 if (game_io > 0)
720 cfg1 |= (game_io | 1) << 16;
721 if (opl_io > 0)
722 cfg1 |= (opl_io | 1);
723 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
724 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
725 }
726
727 static void snd_als4000_configure(struct snd_sb *chip)
728 {
729 u8 tmp;
730 int i;
731
732
733 spin_lock_irq(&chip->mixer_lock);
734 tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
735 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
736 tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
737
738
739 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
740 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
741 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
742 spin_unlock_irq(&chip->mixer_lock);
743
744 spin_lock_irq(&chip->reg_lock);
745
746 snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
747 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
748
749
750 for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
751 snd_als4k_gcr_write(chip, i, 0);
752
753 snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
754 (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
755 spin_unlock_irq(&chip->reg_lock);
756 }
757
758 #ifdef SUPPORT_JOYSTICK
759 static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
760 {
761 struct gameport *gp;
762 struct resource *r;
763 int io_port;
764
765 if (joystick_port[dev] == 0)
766 return -ENODEV;
767
768 if (joystick_port[dev] == 1) {
769 for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
770 r = request_region(io_port, 8, "ALS4000 gameport");
771 if (r)
772 break;
773 }
774 } else {
775 io_port = joystick_port[dev];
776 r = request_region(io_port, 8, "ALS4000 gameport");
777 }
778
779 if (!r) {
780 dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n");
781 return -EBUSY;
782 }
783
784 acard->gameport = gp = gameport_allocate_port();
785 if (!gp) {
786 dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n");
787 release_and_free_resource(r);
788 return -ENOMEM;
789 }
790
791 gameport_set_name(gp, "ALS4000 Gameport");
792 gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
793 gameport_set_dev_parent(gp, &acard->pci->dev);
794 gp->io = io_port;
795 gameport_set_port_data(gp, r);
796
797
798 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
799
800 gameport_register_port(acard->gameport);
801
802 return 0;
803 }
804
805 static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
806 {
807 if (acard->gameport) {
808 struct resource *r = gameport_get_port_data(acard->gameport);
809
810 gameport_unregister_port(acard->gameport);
811 acard->gameport = NULL;
812
813
814 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
815
816 release_and_free_resource(r);
817 }
818 }
819 #else
820 static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
821 static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
822 #endif
823
824 static void snd_card_als4000_free( struct snd_card *card )
825 {
826 struct snd_card_als4000 *acard = card->private_data;
827
828
829 snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
830
831 snd_als4000_free_gameport(acard);
832 pci_release_regions(acard->pci);
833 pci_disable_device(acard->pci);
834 }
835
836 static int snd_card_als4000_probe(struct pci_dev *pci,
837 const struct pci_device_id *pci_id)
838 {
839 static int dev;
840 struct snd_card *card;
841 struct snd_card_als4000 *acard;
842 unsigned long iobase;
843 struct snd_sb *chip;
844 struct snd_opl3 *opl3;
845 unsigned short word;
846 int err;
847
848 if (dev >= SNDRV_CARDS)
849 return -ENODEV;
850 if (!enable[dev]) {
851 dev++;
852 return -ENOENT;
853 }
854
855
856 if ((err = pci_enable_device(pci)) < 0) {
857 return err;
858 }
859
860 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
861 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
862 dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n");
863 pci_disable_device(pci);
864 return -ENXIO;
865 }
866
867 if ((err = pci_request_regions(pci, "ALS4000")) < 0) {
868 pci_disable_device(pci);
869 return err;
870 }
871 iobase = pci_resource_start(pci, 0);
872
873 pci_read_config_word(pci, PCI_COMMAND, &word);
874 pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
875 pci_set_master(pci);
876
877 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
878 sizeof(*acard) ,
879 &card);
880 if (err < 0) {
881 pci_release_regions(pci);
882 pci_disable_device(pci);
883 return err;
884 }
885
886 acard = card->private_data;
887 acard->pci = pci;
888 acard->iobase = iobase;
889 card->private_free = snd_card_als4000_free;
890
891
892 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
893
894 if ((err = snd_sbdsp_create(card,
895 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
896 pci->irq,
897
898 snd_als4000_interrupt,
899 -1,
900 -1,
901 SB_HW_ALS4000,
902 &chip)) < 0) {
903 goto out_err;
904 }
905 acard->chip = chip;
906
907 chip->pci = pci;
908 chip->alt_port = iobase;
909
910 snd_als4000_configure(chip);
911
912 strcpy(card->driver, "ALS4000");
913 strcpy(card->shortname, "Avance Logic ALS4000");
914 sprintf(card->longname, "%s at 0x%lx, irq %i",
915 card->shortname, chip->alt_port, chip->irq);
916
917 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000,
918 iobase + ALS4K_IOB_30_MIDI_DATA,
919 MPU401_INFO_INTEGRATED |
920 MPU401_INFO_IRQ_HOOK,
921 -1, &chip->rmidi)) < 0) {
922 dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n",
923 iobase + ALS4K_IOB_30_MIDI_DATA);
924 goto out_err;
925 }
926
927
928
929
930
931
932 if ((err = snd_als4000_pcm(chip, 0)) < 0) {
933 goto out_err;
934 }
935 if ((err = snd_sbmixer_new(chip)) < 0) {
936 goto out_err;
937 }
938
939 if (snd_opl3_create(card,
940 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
941 iobase + ALS4K_IOB_12_ADLIB_ADDR2,
942 OPL3_HW_AUTO, 1, &opl3) < 0) {
943 dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n",
944 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
945 iobase + ALS4K_IOB_12_ADLIB_ADDR2);
946 } else {
947 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
948 goto out_err;
949 }
950 }
951
952 snd_als4000_create_gameport(acard, dev);
953
954 if ((err = snd_card_register(card)) < 0) {
955 goto out_err;
956 }
957 pci_set_drvdata(pci, card);
958 dev++;
959 err = 0;
960 goto out;
961
962 out_err:
963 snd_card_free(card);
964
965 out:
966 return err;
967 }
968
969 static void snd_card_als4000_remove(struct pci_dev *pci)
970 {
971 snd_card_free(pci_get_drvdata(pci));
972 }
973
974 #ifdef CONFIG_PM_SLEEP
975 static int snd_als4000_suspend(struct device *dev)
976 {
977 struct snd_card *card = dev_get_drvdata(dev);
978 struct snd_card_als4000 *acard = card->private_data;
979 struct snd_sb *chip = acard->chip;
980
981 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
982
983 snd_sbmixer_suspend(chip);
984 return 0;
985 }
986
987 static int snd_als4000_resume(struct device *dev)
988 {
989 struct snd_card *card = dev_get_drvdata(dev);
990 struct snd_card_als4000 *acard = card->private_data;
991 struct snd_sb *chip = acard->chip;
992
993 snd_als4000_configure(chip);
994 snd_sbdsp_reset(chip);
995 snd_sbmixer_resume(chip);
996
997 #ifdef SUPPORT_JOYSTICK
998 if (acard->gameport)
999 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
1000 #endif
1001
1002 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1003 return 0;
1004 }
1005
1006 static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume);
1007 #define SND_ALS4000_PM_OPS &snd_als4000_pm
1008 #else
1009 #define SND_ALS4000_PM_OPS NULL
1010 #endif
1011
1012 static struct pci_driver als4000_driver = {
1013 .name = KBUILD_MODNAME,
1014 .id_table = snd_als4000_ids,
1015 .probe = snd_card_als4000_probe,
1016 .remove = snd_card_als4000_remove,
1017 .driver = {
1018 .pm = SND_ALS4000_PM_OPS,
1019 },
1020 };
1021
1022 module_pci_driver(als4000_driver);