root/sound/pcmcia/pdaudiocf/pdaudiocf.h

INCLUDED FROM

DEFINITIONS

1. pdacf_reg_write
2. pdacf_reg_read

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Driver for Sound Cors PDAudioCF soundcard
   4  *
   5  * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
   6  */
   7 
   8 #ifndef __PDAUDIOCF_H
   9 #define __PDAUDIOCF_H
  10 
  11 #include <sound/pcm.h>
  12 #include <linux/io.h>
  13 #include <linux/interrupt.h>
  14 #include <pcmcia/cistpl.h>
  15 #include <pcmcia/ds.h>
  16 
  17 #include <sound/ak4117.h>
  18 
  19 /* PDAUDIOCF registers */
  20 #define PDAUDIOCF_REG_MD        0x00    /* music data, R/O */
  21 #define PDAUDIOCF_REG_WDP       0x02    /* write data pointer / 2, R/O */
  22 #define PDAUDIOCF_REG_RDP       0x04    /* read data pointer / 2, R/O */
  23 #define PDAUDIOCF_REG_TCR       0x06    /* test control register W/O */
  24 #define PDAUDIOCF_REG_SCR       0x08    /* status and control, R/W (see bit description) */
  25 #define PDAUDIOCF_REG_ISR       0x0a    /* interrupt status, R/O */
  26 #define PDAUDIOCF_REG_IER       0x0c    /* interrupt enable, R/W */
  27 #define PDAUDIOCF_REG_AK_IFR    0x0e    /* AK interface register, R/W */
  28 
  29 /* PDAUDIOCF_REG_TCR */
  30 #define PDAUDIOCF_ELIMAKMBIT    (1<<0)  /* simulate AKM music data */
  31 #define PDAUDIOCF_TESTDATASEL   (1<<1)  /* test data selection, 0 = 0x55, 1 = pseudo-random */
  32 
  33 /* PDAUDIOCF_REG_SCR */
  34 #define PDAUDIOCF_AK_SBP        (1<<0)  /* serial port busy flag */
  35 #define PDAUDIOCF_RST           (1<<2)  /* FPGA, AKM + SRAM buffer reset */
  36 #define PDAUDIOCF_PDN           (1<<3)  /* power down bit */
  37 #define PDAUDIOCF_CLKDIV0       (1<<4)  /* choose 24.576Mhz clock divided by 1,2,3 or 4 */
  38 #define PDAUDIOCF_CLKDIV1       (1<<5)
  39 #define PDAUDIOCF_RECORD        (1<<6)  /* start capturing to SRAM */
  40 #define PDAUDIOCF_AK_SDD        (1<<7)  /* music data detected */
  41 #define PDAUDIOCF_RED_LED_OFF   (1<<8)  /* red LED off override */
  42 #define PDAUDIOCF_BLUE_LED_OFF  (1<<9)  /* blue LED off override */
  43 #define PDAUDIOCF_DATAFMT0      (1<<10) /* data format bits: 00 = 16-bit, 01 = 18-bit */
  44 #define PDAUDIOCF_DATAFMT1      (1<<11) /* 10 = 20-bit, 11 = 24-bit, all right justified */
  45 #define PDAUDIOCF_FPGAREV(x)    ((x>>12)&0x0f) /* FPGA revision */
  46 
  47 /* PDAUDIOCF_REG_ISR */
  48 #define PDAUDIOCF_IRQLVL        (1<<0)  /* Buffer level IRQ */
  49 #define PDAUDIOCF_IRQOVR        (1<<1)  /* Overrun IRQ */
  50 #define PDAUDIOCF_IRQAKM        (1<<2)  /* AKM IRQ */
  51 
  52 /* PDAUDIOCF_REG_IER */
  53 #define PDAUDIOCF_IRQLVLEN0     (1<<0)  /* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
  54 #define PDAUDIOCF_IRQLVLEN1     (1<<1)  /* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
  55 #define PDAUDIOCF_IRQOVREN      (1<<2)  /* enable overrun IRQ */
  56 #define PDAUDIOCF_IRQAKMEN      (1<<3)  /* enable AKM IRQ */
  57 #define PDAUDIOCF_BLUEDUTY0     (1<<8)  /* blue LED duty cycle; 00 = 100%, 01 = 50% */
  58 #define PDAUDIOCF_BLUEDUTY1     (1<<9)  /* 02 = 25%, 11 = 12% */
  59 #define PDAUDIOCF_REDDUTY0      (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */
  60 #define PDAUDIOCF_REDDUTY1      (1<<11) /* 02 = 25%, 11 = 12% */
  61 #define PDAUDIOCF_BLUESDD       (1<<12) /* blue LED against SDD bit */
  62 #define PDAUDIOCF_BLUEMODULATE  (1<<13) /* save power when 100% duty cycle selected */
  63 #define PDAUDIOCF_REDMODULATE   (1<<14) /* save power when 100% duty cycle selected */
  64 #define PDAUDIOCF_HALFRATE      (1<<15) /* slow both LED blinks by half (also spdif detect rate) */
  65 
  66 /* chip status */
  67 #define PDAUDIOCF_STAT_IS_STALE (1<<0)
  68 #define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
  69 #define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)
  70 
  71 struct snd_pdacf {
  72         struct snd_card *card;
  73         int index;
  74 
  75         unsigned long port;
  76         int irq;
  77 
  78         struct mutex reg_lock;
  79         unsigned short regmap[8];
  80         unsigned short suspend_reg_scr;
  81 
  82         spinlock_t ak4117_lock;
  83         struct ak4117 *ak4117;
  84 
  85         unsigned int chip_status;
  86 
  87         struct snd_pcm *pcm;
  88         struct snd_pcm_substream *pcm_substream;
  89         unsigned int pcm_running: 1;
  90         unsigned int pcm_channels;
  91         unsigned int pcm_swab;
  92         unsigned int pcm_little;
  93         unsigned int pcm_frame;
  94         unsigned int pcm_sample;
  95         unsigned int pcm_xor;
  96         unsigned int pcm_size;
  97         unsigned int pcm_period;
  98         unsigned int pcm_tdone;
  99         unsigned int pcm_hwptr;
 100         void *pcm_area;
 101         
 102         /* pcmcia stuff */
 103         struct pcmcia_device    *p_dev;
 104 };
 105 
 106 static inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)
 107 {
 108         outw(chip->regmap[reg>>1] = val, chip->port + reg);
 109 }
 110 
 111 static inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)
 112 {
 113         return inw(chip->port + reg);
 114 }
 115 
 116 struct snd_pdacf *snd_pdacf_create(struct snd_card *card);
 117 int snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);
 118 void snd_pdacf_powerdown(struct snd_pdacf *chip);
 119 #ifdef CONFIG_PM
 120 int snd_pdacf_suspend(struct snd_pdacf *chip);
 121 int snd_pdacf_resume(struct snd_pdacf *chip);
 122 #endif
 123 int snd_pdacf_pcm_new(struct snd_pdacf *chip);
 124 irqreturn_t pdacf_interrupt(int irq, void *dev);
 125 irqreturn_t pdacf_threaded_irq(int irq, void *dev);
 126 void pdacf_reinit(struct snd_pdacf *chip, int resume);
 127 
 128 #endif /* __PDAUDIOCF_H */