This source file includes following definitions.
- IS_ASTRO
- IS_IKE
- IS_PLUTO
- IS_ELROY
- IS_MERCURY
- IS_QUICKSILVER
- agp_mode_mercury
1
2 #ifndef _ASM_PARISC_ROPES_H_
3 #define _ASM_PARISC_ROPES_H_
4
5 #include <asm/parisc-device.h>
6
7 #ifdef CONFIG_64BIT
8
9 #define ZX1_SUPPORT
10 #endif
11
12 #ifdef CONFIG_PROC_FS
13
14 #undef SBA_COLLECT_STATS
15 #endif
16
17
18
19
20
21
22
23
24 #define DELAYED_RESOURCE_CNT 16
25
26 #define MAX_IOC 2
27 #define ROPES_PER_IOC 8
28
29 struct ioc {
30 void __iomem *ioc_hpa;
31 char *res_map;
32 u64 *pdir_base;
33 unsigned long ibase;
34 unsigned long imask;
35 #ifdef ZX1_SUPPORT
36 unsigned long iovp_mask;
37 #endif
38 unsigned long *res_hint;
39 spinlock_t res_lock;
40 unsigned int res_bitshift;
41 unsigned int res_size;
42 #ifdef SBA_HINT_SUPPORT
43
44 unsigned long hint_mask_pdir;
45 unsigned int hint_shift_pdir;
46 #endif
47 #if DELAYED_RESOURCE_CNT > 0
48 int saved_cnt;
49 struct sba_dma_pair {
50 dma_addr_t iova;
51 size_t size;
52 } saved[DELAYED_RESOURCE_CNT];
53 #endif
54
55 #ifdef SBA_COLLECT_STATS
56 #define SBA_SEARCH_SAMPLE 0x100
57 unsigned long avg_search[SBA_SEARCH_SAMPLE];
58 unsigned long avg_idx;
59 unsigned long used_pages;
60 unsigned long msingle_calls;
61 unsigned long msingle_pages;
62 unsigned long msg_calls;
63 unsigned long msg_pages;
64 unsigned long usingle_calls;
65 unsigned long usingle_pages;
66 unsigned long usg_calls;
67 unsigned long usg_pages;
68 #endif
69
70 unsigned int pdir_size;
71 };
72
73 struct sba_device {
74 struct sba_device *next;
75 struct parisc_device *dev;
76 const char *name;
77 void __iomem *sba_hpa;
78 spinlock_t sba_lock;
79 unsigned int flags;
80 unsigned int hw_rev;
81
82 struct resource chip_resv;
83 struct resource iommu_resv;
84
85 unsigned int num_ioc;
86 struct ioc ioc[MAX_IOC];
87 };
88
89 #define ASTRO_RUNWAY_PORT 0x582
90 #define IKE_MERCED_PORT 0x803
91 #define REO_MERCED_PORT 0x804
92 #define REOG_MERCED_PORT 0x805
93 #define PLUTO_MCKINLEY_PORT 0x880
94
95 static inline int IS_ASTRO(struct parisc_device *d) {
96 return d->id.hversion == ASTRO_RUNWAY_PORT;
97 }
98
99 static inline int IS_IKE(struct parisc_device *d) {
100 return d->id.hversion == IKE_MERCED_PORT;
101 }
102
103 static inline int IS_PLUTO(struct parisc_device *d) {
104 return d->id.hversion == PLUTO_MCKINLEY_PORT;
105 }
106
107 #define PLUTO_IOVA_BASE (1UL*1024*1024*1024)
108 #define PLUTO_IOVA_SIZE (1UL*1024*1024*1024)
109 #define PLUTO_GART_SIZE (PLUTO_IOVA_SIZE / 2)
110
111 #define SBA_PDIR_VALID_BIT 0x8000000000000000ULL
112
113 #define SBA_AGPGART_COOKIE 0x0000badbadc0ffeeULL
114
115 #define SBA_FUNC_ID 0x0000
116 #define SBA_FCLASS 0x0008
117
118 #define SBA_FUNC_SIZE 4096
119
120 #define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE)
121 #define PLUTO_IOC_OFFSET (1 * SBA_FUNC_SIZE)
122
123 #define IKE_IOC_OFFSET(p) ((p+2) * SBA_FUNC_SIZE)
124
125 #define IOC_CTRL 0x8
126 #define IOC_CTRL_TC (1 << 0)
127 #define IOC_CTRL_CE (1 << 1)
128 #define IOC_CTRL_DE (1 << 2)
129 #define IOC_CTRL_RM (1 << 8)
130 #define IOC_CTRL_NC (1 << 9)
131 #define IOC_CTRL_D4 (1 << 11)
132 #define IOC_CTRL_DD (1 << 13)
133
134
135
136
137
138 #define LMMIO_DIRECT0_BASE 0x300
139 #define LMMIO_DIRECT0_MASK 0x308
140 #define LMMIO_DIRECT0_ROUTE 0x310
141
142 #define LMMIO_DIST_BASE 0x360
143 #define LMMIO_DIST_MASK 0x368
144 #define LMMIO_DIST_ROUTE 0x370
145
146 #define IOS_DIST_BASE 0x390
147 #define IOS_DIST_MASK 0x398
148 #define IOS_DIST_ROUTE 0x3A0
149
150 #define IOS_DIRECT_BASE 0x3C0
151 #define IOS_DIRECT_MASK 0x3C8
152 #define IOS_DIRECT_ROUTE 0x3D0
153
154
155
156
157 #define ROPE0_CTL 0x200
158 #define ROPE1_CTL 0x208
159 #define ROPE2_CTL 0x210
160 #define ROPE3_CTL 0x218
161 #define ROPE4_CTL 0x220
162 #define ROPE5_CTL 0x228
163 #define ROPE6_CTL 0x230
164 #define ROPE7_CTL 0x238
165
166 #define IOC_ROPE0_CFG 0x500
167 #define IOC_ROPE_AO 0x10
168
169 #define HF_ENABLE 0x40
170
171 #define IOC_IBASE 0x300
172 #define IOC_IMASK 0x308
173 #define IOC_PCOM 0x310
174 #define IOC_TCNFG 0x318
175 #define IOC_PDIR_BASE 0x320
176
177
178
179
180
181
182
183
184
185
186
187
188 #define IOVP_SIZE PAGE_SIZE
189 #define IOVP_SHIFT PAGE_SHIFT
190 #define IOVP_MASK PAGE_MASK
191
192 #define SBA_PERF_CFG 0x708
193 #define SBA_PERF_MASK1 0x718
194 #define SBA_PERF_MASK2 0x730
195
196
197
198
199
200 #define SBA_PERF_CNT1 0x200
201 #define SBA_PERF_CNT2 0x208
202 #define SBA_PERF_CNT3 0x210
203
204
205
206
207 struct lba_device {
208 struct pci_hba_data hba;
209
210 spinlock_t lba_lock;
211 void *iosapic_obj;
212
213 #ifdef CONFIG_64BIT
214 void __iomem *iop_base;
215 #endif
216
217 int flags;
218 int hw_rev;
219 };
220
221 #define ELROY_HVERS 0x782
222 #define MERCURY_HVERS 0x783
223 #define QUICKSILVER_HVERS 0x784
224
225 static inline int IS_ELROY(struct parisc_device *d) {
226 return (d->id.hversion == ELROY_HVERS);
227 }
228
229 static inline int IS_MERCURY(struct parisc_device *d) {
230 return (d->id.hversion == MERCURY_HVERS);
231 }
232
233 static inline int IS_QUICKSILVER(struct parisc_device *d) {
234 return (d->id.hversion == QUICKSILVER_HVERS);
235 }
236
237 static inline int agp_mode_mercury(void __iomem *hpa) {
238 u64 bus_mode;
239
240 bus_mode = readl(hpa + 0x0620);
241 if (bus_mode & 1)
242 return 1;
243
244 return 0;
245 }
246
247
248
249
250
251
252
253
254
255 extern void *iosapic_register(unsigned long hpa);
256 extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
257
258 #define LBA_FUNC_ID 0x0000
259 #define LBA_FCLASS 0x0008
260 #define LBA_CAPABLE 0x0030
261
262 #define LBA_PCI_CFG_ADDR 0x0040
263 #define LBA_PCI_CFG_DATA 0x0048
264
265 #define LBA_PMC_MTLT 0x0050
266 #define LBA_FW_SCRATCH 0x0058
267 #define LBA_ERROR_ADDR 0x0070
268
269 #define LBA_ARB_MASK 0x0080
270 #define LBA_ARB_PRI 0x0088
271 #define LBA_ARB_MODE 0x0090
272 #define LBA_ARB_MTLT 0x0098
273
274 #define LBA_MOD_ID 0x0100
275
276 #define LBA_STAT_CTL 0x0108
277 #define LBA_BUS_RESET 0x01
278 #define CLEAR_ERRLOG 0x10
279 #define CLEAR_ERRLOG_ENABLE 0x20
280 #define HF_ENABLE 0x40
281
282 #define LBA_LMMIO_BASE 0x0200
283 #define LBA_LMMIO_MASK 0x0208
284
285 #define LBA_GMMIO_BASE 0x0210
286 #define LBA_GMMIO_MASK 0x0218
287
288 #define LBA_WLMMIO_BASE 0x0220
289 #define LBA_WLMMIO_MASK 0x0228
290
291 #define LBA_WGMMIO_BASE 0x0230
292 #define LBA_WGMMIO_MASK 0x0238
293
294 #define LBA_IOS_BASE 0x0240
295 #define LBA_IOS_MASK 0x0248
296
297 #define LBA_ELMMIO_BASE 0x0250
298 #define LBA_ELMMIO_MASK 0x0258
299
300 #define LBA_EIOS_BASE 0x0260
301 #define LBA_EIOS_MASK 0x0268
302
303 #define LBA_GLOBAL_MASK 0x0270
304 #define LBA_DMA_CTL 0x0278
305
306 #define LBA_IBASE 0x0300
307 #define LBA_IMASK 0x0308
308
309
310 #define LBA_HINT_CFG 0x0310
311 #define LBA_HINT_BASE 0x0380
312
313 #define LBA_BUS_MODE 0x0620
314
315
316 #define LBA_ERROR_CONFIG 0x0680
317 #define LBA_SMART_MODE 0x20
318 #define LBA_ERROR_STATUS 0x0688
319 #define LBA_ROPE_CTL 0x06A0
320
321 #define LBA_IOSAPIC_BASE 0x800
322
323 #endif