root/arch/arm/mach-footbridge/include/mach/memory.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  arch/arm/mach-footbridge/include/mach/memory.h
   4  *
   5  *  Copyright (C) 1996-1999 Russell King.
   6  *
   7  *  Changelog:
   8  *   20-Oct-1996 RMK    Created
   9  *   31-Dec-1997 RMK    Fixed definitions to reduce warnings.
  10  *   17-May-1998 DAG    Added __virt_to_bus and __bus_to_virt functions.
  11  *   21-Nov-1998 RMK    Changed __virt_to_bus and __bus_to_virt to macros.
  12  *   21-Mar-1999 RMK    Added PAGE_OFFSET for co285 architecture.
  13  *                      Renamed to memory.h
  14  *                      Moved PAGE_OFFSET and TASK_SIZE here
  15  */
  16 #ifndef __ASM_ARCH_MEMORY_H
  17 #define __ASM_ARCH_MEMORY_H
  18 
  19 
  20 #if defined(CONFIG_FOOTBRIDGE_ADDIN)
  21 /*
  22  * If we may be using add-in footbridge mode, then we must
  23  * use the out-of-line translation that makes use of the
  24  * PCI BAR
  25  */
  26 #ifndef __ASSEMBLY__
  27 extern unsigned long __virt_to_bus(unsigned long);
  28 extern unsigned long __bus_to_virt(unsigned long);
  29 extern unsigned long __pfn_to_bus(unsigned long);
  30 extern unsigned long __bus_to_pfn(unsigned long);
  31 #endif
  32 #define __virt_to_bus   __virt_to_bus
  33 #define __bus_to_virt   __bus_to_virt
  34 
  35 #elif defined(CONFIG_FOOTBRIDGE_HOST)
  36 
  37 /*
  38  * The footbridge is programmed to expose the system RAM at 0xe0000000.
  39  * The requirement is that the RAM isn't placed at bus address 0, which
  40  * would clash with VGA cards.
  41  */
  42 #define BUS_OFFSET              0xe0000000
  43 #define __virt_to_bus(x)        ((x) + (BUS_OFFSET - PAGE_OFFSET))
  44 #define __bus_to_virt(x)        ((x) - (BUS_OFFSET - PAGE_OFFSET))
  45 #define __pfn_to_bus(x)         (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET))
  46 #define __bus_to_pfn(x)         __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET))
  47 
  48 #else
  49 
  50 #error "Undefined footbridge mode"
  51 
  52 #endif
  53 
  54 /*
  55  * Cache flushing area.
  56  */
  57 #define FLUSH_BASE              0xf9000000
  58 
  59 #define FLUSH_BASE_PHYS         0x50000000
  60 
  61 #endif