arch/arm/mach-footbridge/netwinder-hw.c

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This source file includes following definitions.
wb977_open
wb977_close
wb977_wb
wb977_ww
nw_gpio_modify_op
__gpio_modify_io
nw_gpio_modify_io
nw_gpio_read
wb977_init_global
wb977_init_printer
wb977_init_keyboard
wb977_init_irda
wb977_init_gpio
wb977_init
nw_cpld_modify
cpld_init
rwa010_unlock
rwa010_read_ident
rwa010_global_init
rwa010_game_port_init
rwa010_waveartist_init
rwa010_soundblaster_init
rwa010_soundblaster_reset
rwa010_init
nw_hw_init
fixup_netwinder
netwinder_restart
netwinder_led_set
netwinder_led_get
netwinder_leds_init
   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * linux/arch/arm/mach-footbridge/netwinder-hw.c
   4  *
   5  * Netwinder machine fixup
   6  *
   7  * Copyright (C) 1998, 1999 Russell King, Phil Blundell
   8  */
   9 #include <linux/module.h>
  10 #include <linux/ioport.h>
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/spinlock.h>
  16 #include <linux/slab.h>
  17 #include <linux/leds.h>
  18 
  19 #include <asm/hardware/dec21285.h>
  20 #include <asm/mach-types.h>
  21 #include <asm/setup.h>
  22 #include <asm/system_misc.h>
  23 
  24 #include <asm/mach/arch.h>
  25 
  26 #include "common.h"
  27 
  28 #define IRDA_IO_BASE            0x180
  29 #define GP1_IO_BASE             0x338
  30 #define GP2_IO_BASE             0x33a
  31 
  32 /*
  33  * Winbond WB83977F accessibility stuff
  34  */
  35 static inline void wb977_open(void)
  36 {
  37         outb(0x87, 0x370);
  38         outb(0x87, 0x370);
  39 }
  40 
  41 static inline void wb977_close(void)
  42 {
  43         outb(0xaa, 0x370);
  44 }
  45 
  46 static inline void wb977_wb(int reg, int val)
  47 {
  48         outb(reg, 0x370);
  49         outb(val, 0x371);
  50 }
  51 
  52 static inline void wb977_ww(int reg, int val)
  53 {
  54         outb(reg, 0x370);
  55         outb(val >> 8, 0x371);
  56         outb(reg + 1, 0x370);
  57         outb(val & 255, 0x371);
  58 }
  59 
  60 #define wb977_device_select(dev)        wb977_wb(0x07, dev)
  61 #define wb977_device_disable()          wb977_wb(0x30, 0x00)
  62 #define wb977_device_enable()           wb977_wb(0x30, 0x01)
  63 
  64 /*
  65  * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  66  */
  67 DEFINE_RAW_SPINLOCK(nw_gpio_lock);
  68 EXPORT_SYMBOL(nw_gpio_lock);
  69 
  70 static unsigned int current_gpio_op;
  71 static unsigned int current_gpio_io;
  72 static unsigned int current_cpld;
  73 
  74 void nw_gpio_modify_op(unsigned int mask, unsigned int set)
  75 {
  76         unsigned int new_gpio, changed;
  77 
  78         new_gpio = (current_gpio_op & ~mask) | set;
  79         changed = new_gpio ^ current_gpio_op;
  80         current_gpio_op = new_gpio;
  81 
  82         if (changed & 0xff)
  83                 outb(new_gpio, GP1_IO_BASE);
  84         if (changed & 0xff00)
  85                 outb(new_gpio >> 8, GP2_IO_BASE);
  86 }
  87 EXPORT_SYMBOL(nw_gpio_modify_op);
  88 
  89 static inline void __gpio_modify_io(int mask, int in)
  90 {
  91         unsigned int new_gpio, changed;
  92         int port;
  93 
  94         new_gpio = (current_gpio_io & ~mask) | in;
  95         changed = new_gpio ^ current_gpio_io;
  96         current_gpio_io = new_gpio;
  97 
  98         changed >>= 1;
  99         new_gpio >>= 1;
 100 
 101         wb977_device_select(7);
 102 
 103         for (port = 0xe1; changed && port < 0xe8; changed >>= 1) {
 104                 wb977_wb(port, new_gpio & 1);
 105 
 106                 port += 1;
 107                 new_gpio >>= 1;
 108         }
 109 
 110         wb977_device_select(8);
 111 
 112         for (port = 0xe8; changed && port < 0xec; changed >>= 1) {
 113                 wb977_wb(port, new_gpio & 1);
 114 
 115                 port += 1;
 116                 new_gpio >>= 1;
 117         }
 118 }
 119 
 120 void nw_gpio_modify_io(unsigned int mask, unsigned int in)
 121 {
 122         /* Open up the SuperIO chip */
 123         wb977_open();
 124 
 125         __gpio_modify_io(mask, in);
 126 
 127         /* Close up the EFER gate */
 128         wb977_close();
 129 }
 130 EXPORT_SYMBOL(nw_gpio_modify_io);
 131 
 132 unsigned int nw_gpio_read(void)
 133 {
 134         return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
 135 }
 136 EXPORT_SYMBOL(nw_gpio_read);
 137 
 138 /*
 139  * Initialise the Winbond W83977F global registers
 140  */
 141 static inline void wb977_init_global(void)
 142 {
 143         /*
 144          * Enable R/W config registers
 145          */
 146         wb977_wb(0x26, 0x40);
 147 
 148         /*
 149          * Power down FDC (not used)
 150          */
 151         wb977_wb(0x22, 0xfe);
 152 
 153         /*
 154          * GP12, GP11, CIRRX, IRRXH, GP10
 155          */
 156         wb977_wb(0x2a, 0xc1);
 157 
 158         /*
 159          * GP23, GP22, GP21, GP20, GP13
 160          */
 161         wb977_wb(0x2b, 0x6b);
 162 
 163         /*
 164          * GP17, GP16, GP15, GP14
 165          */
 166         wb977_wb(0x2c, 0x55);
 167 }
 168 
 169 /*
 170  * Initialise the Winbond W83977F printer port
 171  */
 172 static inline void wb977_init_printer(void)
 173 {
 174         wb977_device_select(1);
 175 
 176         /*
 177          * mode 1 == EPP
 178          */
 179         wb977_wb(0xf0, 0x01);
 180 }
 181 
 182 /*
 183  * Initialise the Winbond W83977F keyboard controller
 184  */
 185 static inline void wb977_init_keyboard(void)
 186 {
 187         wb977_device_select(5);
 188 
 189         /*
 190          * Keyboard controller address
 191          */
 192         wb977_ww(0x60, 0x0060);
 193         wb977_ww(0x62, 0x0064);
 194 
 195         /*
 196          * Keyboard IRQ 1, active high, edge trigger
 197          */
 198         wb977_wb(0x70, 1);
 199         wb977_wb(0x71, 0x02);
 200 
 201         /*
 202          * Mouse IRQ 5, active high, edge trigger
 203          */
 204         wb977_wb(0x72, 5);
 205         wb977_wb(0x73, 0x02);
 206 
 207         /*
 208          * KBC 8MHz
 209          */
 210         wb977_wb(0xf0, 0x40);
 211 
 212         /*
 213          * Enable device
 214          */
 215         wb977_device_enable();
 216 }
 217 
 218 /*
 219  * Initialise the Winbond W83977F Infra-Red device
 220  */
 221 static inline void wb977_init_irda(void)
 222 {
 223         wb977_device_select(6);
 224 
 225         /*
 226          * IR base address
 227          */
 228         wb977_ww(0x60, IRDA_IO_BASE);
 229 
 230         /*
 231          * IRDA IRQ 6, active high, edge trigger
 232          */
 233         wb977_wb(0x70, 6);
 234         wb977_wb(0x71, 0x02);
 235 
 236         /*
 237          * RX DMA - ISA DMA 0
 238          */
 239         wb977_wb(0x74, 0x00);
 240 
 241         /*
 242          * TX DMA - Disable Tx DMA
 243          */
 244         wb977_wb(0x75, 0x04);
 245 
 246         /*
 247          * Append CRC, Enable bank selection
 248          */
 249         wb977_wb(0xf0, 0x03);
 250 
 251         /*
 252          * Enable device
 253          */
 254         wb977_device_enable();
 255 }
 256 
 257 /*
 258  * Initialise Winbond W83977F general purpose IO
 259  */
 260 static inline void wb977_init_gpio(void)
 261 {
 262         unsigned long flags;
 263 
 264         /*
 265          * Set up initial I/O definitions
 266          */
 267         current_gpio_io = -1;
 268         __gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER);
 269 
 270         wb977_device_select(7);
 271 
 272         /*
 273          * Group1 base address
 274          */
 275         wb977_ww(0x60, GP1_IO_BASE);
 276         wb977_ww(0x62, 0);
 277         wb977_ww(0x64, 0);
 278 
 279         /*
 280          * GP10 (Orage button) IRQ 10, active high, edge trigger
 281          */
 282         wb977_wb(0x70, 10);
 283         wb977_wb(0x71, 0x02);
 284 
 285         /*
 286          * GP10: Debounce filter enabled, IRQ, input
 287          */
 288         wb977_wb(0xe0, 0x19);
 289 
 290         /*
 291          * Enable Group1
 292          */
 293         wb977_device_enable();
 294 
 295         wb977_device_select(8);
 296 
 297         /*
 298          * Group2 base address
 299          */
 300         wb977_ww(0x60, GP2_IO_BASE);
 301 
 302         /*
 303          * Clear watchdog timer regs
 304          *  - timer disable
 305          */
 306         wb977_wb(0xf2, 0x00);
 307 
 308         /*
 309          *  - disable LED, no mouse nor keyboard IRQ
 310          */
 311         wb977_wb(0xf3, 0x00);
 312 
 313         /*
 314          *  - timer counting, disable power LED, disable timeouot
 315          */
 316         wb977_wb(0xf4, 0x00);
 317 
 318         /*
 319          * Enable group2
 320          */
 321         wb977_device_enable();
 322 
 323         /*
 324          * Set Group1/Group2 outputs
 325          */
 326         raw_spin_lock_irqsave(&nw_gpio_lock, flags);
 327         nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
 328         raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 329 }
 330 
 331 /*
 332  * Initialise the Winbond W83977F chip.
 333  */
 334 static void __init wb977_init(void)
 335 {
 336         request_region(0x370, 2, "W83977AF configuration");
 337 
 338         /*
 339          * Open up the SuperIO chip
 340          */
 341         wb977_open();
 342 
 343         /*
 344          * Initialise the global registers
 345          */
 346         wb977_init_global();
 347 
 348         /*
 349          * Initialise the various devices in
 350          * the multi-IO chip.
 351          */
 352         wb977_init_printer();
 353         wb977_init_keyboard();
 354         wb977_init_irda();
 355         wb977_init_gpio();
 356 
 357         /*
 358          * Close up the EFER gate
 359          */
 360         wb977_close();
 361 }
 362 
 363 void nw_cpld_modify(unsigned int mask, unsigned int set)
 364 {
 365         int msk;
 366 
 367         current_cpld = (current_cpld & ~mask) | set;
 368 
 369         nw_gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
 370         nw_gpio_modify_op(GPIO_IOLOAD, 0);
 371 
 372         for (msk = 8; msk; msk >>= 1) {
 373                 int bit = current_cpld & msk;
 374 
 375                 nw_gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
 376                 nw_gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
 377         }
 378 
 379         nw_gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
 380         nw_gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
 381         nw_gpio_modify_op(GPIO_IOLOAD, 0);
 382 }
 383 EXPORT_SYMBOL(nw_cpld_modify);
 384 
 385 static void __init cpld_init(void)
 386 {
 387         unsigned long flags;
 388 
 389         raw_spin_lock_irqsave(&nw_gpio_lock, flags);
 390         nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
 391         raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 392 }
 393 
 394 static unsigned char rwa_unlock[] __initdata =
 395 { 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b,
 396   0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74,
 397   0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 };
 398 
 399 #ifndef DEBUG
 400 #define dprintk(x...)
 401 #else
 402 #define dprintk(x...) printk(x)
 403 #endif
 404 
 405 #define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0)
 406 
 407 static inline void rwa010_unlock(void)
 408 {
 409         int i;
 410 
 411         WRITE_RWA(2, 2);
 412         mdelay(10);
 413 
 414         for (i = 0; i < sizeof(rwa_unlock); i++) {
 415                 outb(rwa_unlock[i], 0x279);
 416                 udelay(10);
 417         }
 418 }
 419 
 420 static inline void rwa010_read_ident(void)
 421 {
 422         unsigned char si[9];
 423         int i, j;
 424 
 425         WRITE_RWA(3, 0);
 426         WRITE_RWA(0, 128);
 427 
 428         outb(1, 0x279);
 429 
 430         mdelay(1);
 431 
 432         dprintk("Identifier: ");
 433         for (i = 0; i < 9; i++) {
 434                 si[i] = 0;
 435                 for (j = 0; j < 8; j++) {
 436                         int bit;
 437                         udelay(250);
 438                         inb(0x203);
 439                         udelay(250);
 440                         bit = inb(0x203);
 441                         dprintk("%02X ", bit);
 442                         bit = (bit == 0xaa) ? 1 : 0;
 443                         si[i] |= bit << j;
 444                 }
 445                 dprintk("(%02X) ", si[i]);
 446         }
 447         dprintk("\n");
 448 }
 449 
 450 static inline void rwa010_global_init(void)
 451 {
 452         WRITE_RWA(6, 2);        // Assign a card no = 2
 453 
 454         dprintk("Card no = %d\n", inb(0x203));
 455 
 456         /* disable the modem section of the chip */
 457         WRITE_RWA(7, 3);
 458         WRITE_RWA(0x30, 0);
 459 
 460         /* disable the cdrom section of the chip */
 461         WRITE_RWA(7, 4);
 462         WRITE_RWA(0x30, 0);
 463 
 464         /* disable the MPU-401 section of the chip */
 465         WRITE_RWA(7, 2);
 466         WRITE_RWA(0x30, 0);
 467 }
 468 
 469 static inline void rwa010_game_port_init(void)
 470 {
 471         int i;
 472 
 473         WRITE_RWA(7, 5);
 474 
 475         dprintk("Slider base: ");
 476         WRITE_RWA(0x61, 1);
 477         i = inb(0x203);
 478 
 479         WRITE_RWA(0x60, 2);
 480         dprintk("%02X%02X (201)\n", inb(0x203), i);
 481 
 482         WRITE_RWA(0x30, 1);
 483 }
 484 
 485 static inline void rwa010_waveartist_init(int base, int irq, int dma)
 486 {
 487         int i;
 488 
 489         WRITE_RWA(7, 0);
 490 
 491         dprintk("WaveArtist base: ");
 492         WRITE_RWA(0x61, base & 255);
 493         i = inb(0x203);
 494 
 495         WRITE_RWA(0x60, base >> 8);
 496         dprintk("%02X%02X (%X),", inb(0x203), i, base);
 497 
 498         WRITE_RWA(0x70, irq);
 499         dprintk(" irq: %d (%d),", inb(0x203), irq);
 500 
 501         WRITE_RWA(0x74, dma);
 502         dprintk(" dma: %d (%d)\n", inb(0x203), dma);
 503 
 504         WRITE_RWA(0x30, 1);
 505 }
 506 
 507 static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma)
 508 {
 509         int i;
 510 
 511         WRITE_RWA(7, 1);
 512 
 513         dprintk("SoundBlaster base: ");
 514         WRITE_RWA(0x61, sb_base & 255);
 515         i = inb(0x203);
 516 
 517         WRITE_RWA(0x60, sb_base >> 8);
 518         dprintk("%02X%02X (%X),", inb(0x203), i, sb_base);
 519 
 520         dprintk(" irq: ");
 521         WRITE_RWA(0x70, irq);
 522         dprintk("%d (%d),", inb(0x203), irq);
 523 
 524         dprintk(" 8-bit DMA: ");
 525         WRITE_RWA(0x74, dma);
 526         dprintk("%d (%d)\n", inb(0x203), dma);
 527 
 528         dprintk("AdLib base: ");
 529         WRITE_RWA(0x63, al_base & 255);
 530         i = inb(0x203);
 531 
 532         WRITE_RWA(0x62, al_base >> 8);
 533         dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base);
 534 
 535         WRITE_RWA(0x30, 1);
 536 }
 537 
 538 static void rwa010_soundblaster_reset(void)
 539 {
 540         int i;
 541 
 542         outb(1, 0x226);
 543         udelay(3);
 544         outb(0, 0x226);
 545 
 546         for (i = 0; i < 5; i++) {
 547                 if (inb(0x22e) & 0x80)
 548                         break;
 549                 mdelay(1);
 550         }
 551         if (i == 5)
 552                 printk("SoundBlaster: DSP reset failed\n");
 553 
 554         dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a));
 555 
 556         for (i = 0; i < 5; i++) {
 557                 if ((inb(0x22c) & 0x80) == 0)
 558                         break;
 559                 mdelay(1);
 560         }
 561 
 562         if (i == 5)
 563                 printk("SoundBlaster: DSP not ready\n");
 564         else {
 565                 outb(0xe1, 0x22c);
 566 
 567                 dprintk("SoundBlaster DSP id: ");
 568                 i = inb(0x22a);
 569                 udelay(1);
 570                 i |= inb(0x22a) << 8;
 571                 dprintk("%04X\n", i);
 572 
 573                 for (i = 0; i < 5; i++) {
 574                         if ((inb(0x22c) & 0x80) == 0)
 575                                 break;
 576                         mdelay(1);
 577                 }
 578 
 579                 if (i == 5)
 580                         printk("SoundBlaster: could not turn speaker off\n");
 581 
 582                 outb(0xd3, 0x22c);
 583         }
 584 
 585         /* turn on OPL3 */
 586         outb(5, 0x38a);
 587         outb(1, 0x38b);
 588 }
 589 
 590 static void __init rwa010_init(void)
 591 {
 592         rwa010_unlock();
 593         rwa010_read_ident();
 594         rwa010_global_init();
 595         rwa010_game_port_init();
 596         rwa010_waveartist_init(0x250, 3, 7);
 597         rwa010_soundblaster_init(0x220, 0x388, 3, 1);
 598         rwa010_soundblaster_reset();
 599 }
 600 
 601 /*
 602  * Initialise any other hardware after we've got the PCI bus
 603  * initialised.  We may need the PCI bus to talk to this other
 604  * hardware.
 605  */
 606 static int __init nw_hw_init(void)
 607 {
 608         if (machine_is_netwinder()) {
 609                 wb977_init();
 610                 cpld_init();
 611                 rwa010_init();
 612         }
 613         return 0;
 614 }
 615 
 616 __initcall(nw_hw_init);
 617 
 618 /*
 619  * Older NeTTroms either do not provide a parameters
 620  * page, or they don't supply correct information in
 621  * the parameter page.
 622  */
 623 static void __init
 624 fixup_netwinder(struct tag *tags, char **cmdline)
 625 {
 626 #ifdef CONFIG_ISAPNP
 627         extern int isapnp_disable;
 628 
 629         /*
 630          * We must not use the kernels ISAPnP code
 631          * on the NetWinder - it will reset the settings
 632          * for the WaveArtist chip and render it inoperable.
 633          */
 634         isapnp_disable = 1;
 635 #endif
 636 }
 637 
 638 static void netwinder_restart(enum reboot_mode mode, const char *cmd)
 639 {
 640         if (mode == REBOOT_SOFT) {
 641                 /* Jump into the ROM */
 642                 soft_restart(0x41000000);
 643         } else {
 644                 local_irq_disable();
 645                 local_fiq_disable();
 646 
 647                 /* open up the SuperIO chip */
 648                 outb(0x87, 0x370);
 649                 outb(0x87, 0x370);
 650 
 651                 /* aux function group 1 (logical device 7) */
 652                 outb(0x07, 0x370);
 653                 outb(0x07, 0x371);
 654 
 655                 /* set GP16 for WD-TIMER output */
 656                 outb(0xe6, 0x370);
 657                 outb(0x00, 0x371);
 658 
 659                 /* set a RED LED and toggle WD_TIMER for rebooting */
 660                 outb(0xc4, 0x338);
 661         }
 662 }
 663 
 664 /* LEDs */
 665 #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
 666 struct netwinder_led {
 667         struct led_classdev     cdev;
 668         u8                      mask;
 669 };
 670 
 671 /*
 672  * The triggers lines up below will only be used if the
 673  * LED triggers are compiled in.
 674  */
 675 static const struct {
 676         const char *name;
 677         const char *trigger;
 678 } netwinder_leds[] = {
 679         { "netwinder:green", "heartbeat", },
 680         { "netwinder:red", "cpu0", },
 681 };
 682 
 683 /*
 684  * The LED control in Netwinder is reversed:
 685  *  - setting bit means turn off LED
 686  *  - clearing bit means turn on LED
 687  */
 688 static void netwinder_led_set(struct led_classdev *cdev,
 689                 enum led_brightness b)
 690 {
 691         struct netwinder_led *led = container_of(cdev,
 692                         struct netwinder_led, cdev);
 693         unsigned long flags;
 694         u32 reg;
 695 
 696         raw_spin_lock_irqsave(&nw_gpio_lock, flags);
 697         reg = nw_gpio_read();
 698         if (b != LED_OFF)
 699                 reg &= ~led->mask;
 700         else
 701                 reg |= led->mask;
 702         nw_gpio_modify_op(led->mask, reg);
 703         raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 704 }
 705 
 706 static enum led_brightness netwinder_led_get(struct led_classdev *cdev)
 707 {
 708         struct netwinder_led *led = container_of(cdev,
 709                         struct netwinder_led, cdev);
 710         unsigned long flags;
 711         u32 reg;
 712 
 713         raw_spin_lock_irqsave(&nw_gpio_lock, flags);
 714         reg = nw_gpio_read();
 715         raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 716 
 717         return (reg & led->mask) ? LED_OFF : LED_FULL;
 718 }
 719 
 720 static int __init netwinder_leds_init(void)
 721 {
 722         int i;
 723 
 724         if (!machine_is_netwinder())
 725                 return -ENODEV;
 726 
 727         for (i = 0; i < ARRAY_SIZE(netwinder_leds); i++) {
 728                 struct netwinder_led *led;
 729 
 730                 led = kzalloc(sizeof(*led), GFP_KERNEL);
 731                 if (!led)
 732                         break;
 733 
 734                 led->cdev.name = netwinder_leds[i].name;
 735                 led->cdev.brightness_set = netwinder_led_set;
 736                 led->cdev.brightness_get = netwinder_led_get;
 737                 led->cdev.default_trigger = netwinder_leds[i].trigger;
 738 
 739                 if (i == 0)
 740                         led->mask = GPIO_GREEN_LED;
 741                 else
 742                         led->mask = GPIO_RED_LED;
 743 
 744                 if (led_classdev_register(NULL, &led->cdev) < 0) {
 745                         kfree(led);
 746                         break;
 747                 }
 748         }
 749 
 750         return 0;
 751 }
 752 
 753 /*
 754  * Since we may have triggers on any subsystem, defer registration
 755  * until after subsystem_init.
 756  */
 757 fs_initcall(netwinder_leds_init);
 758 #endif
 759 
 760 MACHINE_START(NETWINDER, "Rebel-NetWinder")
 761         /* Maintainer: Russell King/Rebel.com */
 762         .atag_offset    = 0x100,
 763         .video_start    = 0x000a0000,
 764         .video_end      = 0x000bffff,
 765         .reserve_lp0    = 1,
 766         .reserve_lp2    = 1,
 767         .fixup          = fixup_netwinder,
 768         .map_io         = footbridge_map_io,
 769         .init_irq       = footbridge_init_irq,
 770         .init_time      = isa_timer_init,
 771         .restart        = netwinder_restart,
 772 MACHINE_END
/* [<][>][^][v][top][bottom][index][help] */
root/arch/arm/mach-footbridge/netwinder-hw.c

DEFINITIONS
