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9 #include <asm/head.h>
10 #include <asm/asi.h>
11 #include <asm/contregs.h>
12 #include <asm/page.h>
13 #include <asm/psr.h>
14 #include <asm/ptrace.h>
15 #include <asm/winmacro.h>
16 #include <asm/asmmacro.h>
17 #include <asm/thread_info.h>
18
19
20 #define t_psr l0
21 #define t_pc l1
22 #define t_npc l2
23 #define t_wim l3
24 #define t_twinmask l4
25 #define t_kstack l5
26 #define t_retpc l6
27 #define t_systable l7
28 #define curptr g6
29
30 .text
31 .align 4
32
33
34 .globl tsetup_7win_patch1, tsetup_7win_patch2
35 .globl tsetup_7win_patch3, tsetup_7win_patch4
36 .globl tsetup_7win_patch5, tsetup_7win_patch6
37 tsetup_7win_patch1: sll %t_wim, 0x6, %t_wim
38 tsetup_7win_patch2: and %g2, 0x7f, %g2
39 tsetup_7win_patch3: and %g2, 0x7f, %g2
40 tsetup_7win_patch4: and %g1, 0x7f, %g1
41 tsetup_7win_patch5: sll %t_wim, 0x6, %t_wim
42 tsetup_7win_patch6: and %g2, 0x7f, %g2
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75 .globl trap_setup, tsetup_patch1, tsetup_patch2
76 .globl tsetup_patch3, tsetup_patch4
77 .globl tsetup_patch5, tsetup_patch6
78 trap_setup:
79
80
81
82 mov 1, %t_twinmask
83 andcc %t_psr, PSR_PS, %g0 ! fromsupv_p = (psr & PSR_PS)
84 be trap_setup_from_user ! nope, from user mode
85 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
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90 sub %fp, (STACKFRAME_SZ + TRACEREG_SZ), %t_kstack
91 STORE_PT_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
92
93
94 andcc %t_twinmask, %t_wim, %g0
95 bne trap_setup_kernel_spill ! in trap window, clean up
96 nop
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100
101 jmpl %t_retpc + 0x8, %g0 ! return to caller
102 mov %t_kstack, %sp ! jump onto new stack
103
104 trap_setup_kernel_spill:
105 ld [%curptr + TI_UWINMASK], %g1
106 orcc %g0, %g1, %g0
107 bne trap_setup_user_spill ! there are some user windows, yuck
108
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110
111 srl %t_wim, 0x1, %g2 ! begin computation of new %wim
112 tsetup_patch1:
113 sll %t_wim, 0x7, %t_wim ! patched on 7 window Sparcs
114 or %t_wim, %g2, %g2
115 tsetup_patch2:
116 and %g2, 0xff, %g2 ! patched on 7 window Sparcs
117
118 save %g0, %g0, %g0
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121 wr %g2, 0x0, %wim
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124 STORE_WINDOW(sp)
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126 restore %g0, %g0, %g0
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128 jmpl %t_retpc + 0x8, %g0 ! return to caller
129 mov %t_kstack, %sp ! and onto new kernel stack
130
131 #define STACK_OFFSET (THREAD_SIZE - TRACEREG_SZ - STACKFRAME_SZ)
132
133 trap_setup_from_user:
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135 LOAD_CURRENT(t_kstack, t_twinmask)
136
137 sethi %hi(STACK_OFFSET), %t_twinmask
138 or %t_twinmask, %lo(STACK_OFFSET), %t_twinmask
139 add %t_kstack, %t_twinmask, %t_kstack
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141 mov 1, %t_twinmask
142 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
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145 STORE_PT_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
146
147 #if 0
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150 sethi %hi(STACK_OFFSET), %curptr
151 or %curptr, %lo(STACK_OFFSET), %curptr
152 sub %t_kstack, %curptr, %curptr
153 #else
154 sethi %hi(~(THREAD_SIZE - 1)), %curptr
155 and %t_kstack, %curptr, %curptr
156 #endif
157
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159 st %g0, [%curptr + TI_W_SAVED]
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162 andcc %t_twinmask, %t_wim, %g0
163 bne trap_setup_user_spill ! yep we are
164 orn %g0, %t_twinmask, %g1 ! negate trap win mask into %g1
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183 subcc %t_wim, %t_twinmask, %g2
184 bneg,a 1f
185 sub %g2, 0x1, %g2
186 1:
187 andn %g2, %t_twinmask, %g2
188 tsetup_patch3:
189 and %g2, 0xff, %g2 ! patched on 7win Sparcs
190 st %g2, [%curptr + TI_UWINMASK] ! store new umask
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192 jmpl %t_retpc + 0x8, %g0 ! return to caller
193 mov %t_kstack, %sp ! and onto kernel stack
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195 trap_setup_user_spill:
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202 tsetup_patch4:
203 and %g1, 0xff, %g1 ! patched on 7win Sparcs, mask
204 srl %t_wim, 0x1, %g2 ! compute new %wim
205 tsetup_patch5:
206 sll %t_wim, 0x7, %t_wim ! patched on 7win Sparcs
207 or %t_wim, %g2, %g2 ! %g2 is new %wim
208 tsetup_patch6:
209 and %g2, 0xff, %g2 ! patched on 7win Sparcs
210 andn %g1, %g2, %g1 ! clear this bit in %g1
211 st %g1, [%curptr + TI_UWINMASK]
212
213 save %g0, %g0, %g0
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215 wr %g2, 0x0, %wim
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220 b tsetup_srmmu_stackchk
221 andcc %sp, 0x7, %g0
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227
228 #define glob_tmp g1
229
230 .globl tsetup_srmmu_stackchk
231 tsetup_srmmu_stackchk:
232
233 bne trap_setup_user_stack_is_bolixed
234 sethi %hi(PAGE_OFFSET), %glob_tmp
235
236 cmp %glob_tmp, %sp
237 bleu,a 1f
238 LEON_PI( lda [%g0] ASI_LEON_MMUREGS, %glob_tmp) ! read MMU control
239 SUN_PI_( lda [%g0] ASI_M_MMUREGS, %glob_tmp) ! read MMU control
240
241 trap_setup_user_stack_is_bolixed:
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245 SAVE_BOLIXED_USER_STACK(curptr, g3)
246 restore %g0, %g0, %g0
247
248 jmpl %t_retpc + 0x8, %g0
249 mov %t_kstack, %sp
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251 1:
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253 or %glob_tmp, 0x2, %glob_tmp ! or in no_fault bit
254 LEON_PI(sta %glob_tmp, [%g0] ASI_LEON_MMUREGS) ! set it
255 SUN_PI_(sta %glob_tmp, [%g0] ASI_M_MMUREGS) ! set it
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258 STORE_WINDOW(sp)
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261 andn %glob_tmp, 0x2, %glob_tmp
262 LEON_PI(sta %glob_tmp, [%g0] ASI_LEON_MMUREGS)
263 SUN_PI_(sta %glob_tmp, [%g0] ASI_M_MMUREGS)
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265 mov AC_M_SFAR, %glob_tmp
266 LEON_PI(lda [%glob_tmp] ASI_LEON_MMUREGS, %g0)
267 SUN_PI_(lda [%glob_tmp] ASI_M_MMUREGS, %g0)
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269 mov AC_M_SFSR, %glob_tmp
270 LEON_PI(lda [%glob_tmp] ASI_LEON_MMUREGS, %glob_tmp)! save away status of winstore
271 SUN_PI_(lda [%glob_tmp] ASI_M_MMUREGS, %glob_tmp) ! save away status of winstore
272
273 andcc %glob_tmp, 0x2, %g0 ! did we fault?
274 bne trap_setup_user_stack_is_bolixed ! failure
275 nop
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277 restore %g0, %g0, %g0
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279 jmpl %t_retpc + 0x8, %g0
280 mov %t_kstack, %sp
281