root/arch/arm/include/debug/stm32.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
   4  * Author:   Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
   5  */
   6 
   7 #define STM32_UART_BASE                 0x40011000      /* USART1 */
   8 
   9 #ifdef CONFIG_STM32F4_DEBUG_UART
  10 #define STM32_USART_SR_OFF              0x00
  11 #define STM32_USART_TDR_OFF             0x04
  12 #endif
  13 
  14 #ifdef CONFIG_STM32F7_DEBUG_UART
  15 #define STM32_USART_SR_OFF              0x1C
  16 #define STM32_USART_TDR_OFF             0x28
  17 #endif
  18 
  19 #define STM32_USART_TC                  (1 << 6)        /* Tx complete       */
  20 #define STM32_USART_TXE                 (1 << 7)        /* Tx data reg empty */
  21 
  22 .macro  addruart, rp, rv, tmp
  23         ldr     \rp,      =STM32_UART_BASE      @ physical base
  24         ldr     \rv,      =STM32_UART_BASE      @ virt base /* NoMMU */
  25 .endm
  26 
  27 .macro  senduart,rd,rx
  28         strb    \rd, [\rx, #STM32_USART_TDR_OFF]
  29 .endm
  30 
  31 .macro  waituart,rd,rx
  32 1001:   ldr     \rd, [\rx, #(STM32_USART_SR_OFF)]       @ Read Status Register
  33         tst     \rd, #STM32_USART_TXE                   @ TXE = 1 = tx empty
  34         beq     1001b
  35 .endm
  36 
  37 .macro  busyuart,rd,rx
  38 1001:   ldr     \rd, [\rx, #(STM32_USART_SR_OFF)]       @ Read Status Register
  39         tst     \rd, #STM32_USART_TC                    @ TC = 1 = tx complete
  40         beq     1001b
  41 .endm