root/arch/arm/include/debug/vexpress.S

/* [<][>][^][v][top][bottom][index][help] */
   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* arch/arm/mach-realview/include/mach/debug-macro.S
   3  *
   4  * Debugging macro include header
   5  *
   6  *  Copyright (C) 1994-1999 Russell King
   7  *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
   8  */
   9 
  10 #define DEBUG_LL_PHYS_BASE              0x10000000
  11 #define DEBUG_LL_UART_OFFSET            0x00009000
  12 
  13 #define DEBUG_LL_PHYS_BASE_RS1          0x1c000000
  14 #define DEBUG_LL_UART_OFFSET_RS1        0x00090000
  15 
  16 #define DEBUG_LL_UART_PHYS_CRX          0xb0090000
  17 
  18 #define DEBUG_LL_VIRT_BASE              0xf8000000
  19 
  20 #if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT)
  21 
  22                 .macro  addruart,rp,rv,tmp
  23                 .arch   armv7-a
  24 
  25                 @ Make an educated guess regarding the memory map:
  26                 @ - the original A9 core tile (based on ARM Cortex-A9 r0p1)
  27                 @   should use UART at 0x10009000
  28                 @ - all other (RS1 complaint) tiles use UART mapped
  29                 @   at 0x1c090000
  30                 mrc     p15, 0, \rp, c0, c0, 0
  31                 movw    \rv, #0xc091
  32                 movt    \rv, #0x410f
  33                 cmp     \rp, \rv
  34 
  35                 @ Original memory map
  36                 moveq   \rp, #DEBUG_LL_UART_OFFSET
  37                 orreq   \rv, \rp, #DEBUG_LL_VIRT_BASE
  38                 orreq   \rp, \rp, #DEBUG_LL_PHYS_BASE
  39 
  40                 @ RS1 memory map
  41                 movne   \rp, #DEBUG_LL_UART_OFFSET_RS1
  42                 orrne   \rv, \rp, #DEBUG_LL_VIRT_BASE
  43                 orrne   \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
  44 
  45                 .endm
  46 
  47 #include <debug/pl01x.S>
  48 #endif

/* [<][>][^][v][top][bottom][index][help] */