root/arch/arm/mach-ixp4xx/include/mach/cpu.h

INCLUDED FROM

DEFINITIONS

1. ixp4xx_read_feature_bits
2. ixp4xx_write_feature_bits

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * arch/arm/mach-ixp4xx/include/mach/cpu.h
   4  *
   5  * IXP4XX cpu type detection
   6  *
   7  * Copyright (C) 2007 MontaVista Software, Inc.
   8  */
   9 
  10 #ifndef __ASM_ARCH_CPU_H__
  11 #define __ASM_ARCH_CPU_H__
  12 
  13 #include <linux/io.h>
  14 #include <asm/cputype.h>
  15 
  16 /* Processor id value in CP15 Register 0 */
  17 #define IXP42X_PROCESSOR_ID_VALUE       0x690541c0 /* including unused 0x690541Ex */
  18 #define IXP42X_PROCESSOR_ID_MASK        0xffffffc0
  19 
  20 #define IXP43X_PROCESSOR_ID_VALUE       0x69054040
  21 #define IXP43X_PROCESSOR_ID_MASK        0xfffffff0
  22 
  23 #define IXP46X_PROCESSOR_ID_VALUE       0x69054200 /* including IXP455 */
  24 #define IXP46X_PROCESSOR_ID_MASK        0xfffffff0
  25 
  26 #define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \
  27                                 IXP42X_PROCESSOR_ID_VALUE)
  28 #define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \
  29                          IXP42X_PROCESSOR_ID_VALUE)
  30 #define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \
  31                          IXP43X_PROCESSOR_ID_VALUE)
  32 #define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \
  33                          IXP46X_PROCESSOR_ID_VALUE)
  34 
  35 static inline u32 ixp4xx_read_feature_bits(void)
  36 {
  37         u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
  38 
  39         if (cpu_is_ixp42x_rev_a0())
  40                 return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
  41                                                IXP4XX_FEATURE_AES);
  42         if (cpu_is_ixp42x())
  43                 return val & IXP42X_FEATURE_MASK;
  44         if (cpu_is_ixp43x())
  45                 return val & IXP43X_FEATURE_MASK;
  46         return val & IXP46X_FEATURE_MASK;
  47 }
  48 
  49 static inline void ixp4xx_write_feature_bits(u32 value)
  50 {
  51         __raw_writel(~value, IXP4XX_EXP_CFG2);
  52 }
  53 
  54 #endif  /* _ASM_ARCH_CPU_H */