root/arch/arm/mach-iop32x/iq80321.c

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DEFINITIONS

This source file includes following definitions.
  1. iq80321_timer_init
  2. iq80321_map_io
  3. iq80321_pci_map_irq
  4. iq80321_pci_init
  5. iq80321_init_machine

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * arch/arm/mach-iop32x/iq80321.c
   4  *
   5  * Board support code for the Intel IQ80321 platform.
   6  *
   7  * Author: Rory Bolt <rorybolt@pacbell.net>
   8  * Copyright (C) 2002 Rory Bolt
   9  * Copyright (C) 2004 Intel Corp.
  10  */
  11 
  12 #include <linux/mm.h>
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/pci.h>
  16 #include <linux/string.h>
  17 #include <linux/serial_core.h>
  18 #include <linux/serial_8250.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/gpio/machine.h>
  23 #include <asm/irq.h>
  24 #include <asm/mach/arch.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/pci.h>
  27 #include <asm/mach/time.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/page.h>
  30 #include <asm/pgtable.h>
  31 
  32 #include "hardware.h"
  33 #include "irqs.h"
  34 #include "gpio-iop32x.h"
  35 
  36 /*
  37  * IQ80321 timer tick configuration.
  38  */
  39 static void __init iq80321_timer_init(void)
  40 {
  41         /* 33.333 MHz crystal.  */
  42         iop_init_time(200000000);
  43 }
  44 
  45 
  46 /*
  47  * IQ80321 I/O.
  48  */
  49 static struct map_desc iq80321_io_desc[] __initdata = {
  50         {       /* on-board devices */
  51                 .virtual        = IQ80321_UART,
  52                 .pfn            = __phys_to_pfn(IQ80321_UART),
  53                 .length         = 0x00100000,
  54                 .type           = MT_DEVICE,
  55         },
  56 };
  57 
  58 void __init iq80321_map_io(void)
  59 {
  60         iop3xx_map_io();
  61         iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
  62 }
  63 
  64 
  65 /*
  66  * IQ80321 PCI.
  67  */
  68 static int __init
  69 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  70 {
  71         int irq;
  72 
  73         if ((slot == 2 || slot == 6) && pin == 1) {
  74                 /* PCI-X Slot INTA */
  75                 irq = IRQ_IOP32X_XINT2;
  76         } else if ((slot == 2 || slot == 6) && pin == 2) {
  77                 /* PCI-X Slot INTA */
  78                 irq = IRQ_IOP32X_XINT3;
  79         } else if ((slot == 2 || slot == 6) && pin == 3) {
  80                 /* PCI-X Slot INTA */
  81                 irq = IRQ_IOP32X_XINT0;
  82         } else if ((slot == 2 || slot == 6) && pin == 4) {
  83                 /* PCI-X Slot INTA */
  84                 irq = IRQ_IOP32X_XINT1;
  85         } else if (slot == 4 || slot == 8) {
  86                 /* Gig-E */
  87                 irq = IRQ_IOP32X_XINT0;
  88         } else {
  89                 printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
  90                         "device PCI:%d:%d:%d\n", dev->bus->number,
  91                         PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  92                 irq = -1;
  93         }
  94 
  95         return irq;
  96 }
  97 
  98 static struct hw_pci iq80321_pci __initdata = {
  99         .nr_controllers = 1,
 100         .ops            = &iop3xx_ops,
 101         .setup          = iop3xx_pci_setup,
 102         .preinit        = iop3xx_pci_preinit_cond,
 103         .map_irq        = iq80321_pci_map_irq,
 104 };
 105 
 106 static int __init iq80321_pci_init(void)
 107 {
 108         if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
 109                 machine_is_iq80321())
 110                 pci_common_init(&iq80321_pci);
 111 
 112         return 0;
 113 }
 114 
 115 subsys_initcall(iq80321_pci_init);
 116 
 117 
 118 /*
 119  * IQ80321 machine initialisation.
 120  */
 121 static struct physmap_flash_data iq80321_flash_data = {
 122         .width          = 1,
 123 };
 124 
 125 static struct resource iq80321_flash_resource = {
 126         .start          = 0xf0000000,
 127         .end            = 0xf07fffff,
 128         .flags          = IORESOURCE_MEM,
 129 };
 130 
 131 static struct platform_device iq80321_flash_device = {
 132         .name           = "physmap-flash",
 133         .id             = 0,
 134         .dev            = {
 135                 .platform_data  = &iq80321_flash_data,
 136         },
 137         .num_resources  = 1,
 138         .resource       = &iq80321_flash_resource,
 139 };
 140 
 141 static struct plat_serial8250_port iq80321_serial_port[] = {
 142         {
 143                 .mapbase        = IQ80321_UART,
 144                 .membase        = (char *)IQ80321_UART,
 145                 .irq            = IRQ_IOP32X_XINT1,
 146                 .flags          = UPF_SKIP_TEST,
 147                 .iotype         = UPIO_MEM,
 148                 .regshift       = 0,
 149                 .uartclk        = 1843200,
 150         },
 151         { },
 152 };
 153 
 154 static struct resource iq80321_uart_resource = {
 155         .start          = IQ80321_UART,
 156         .end            = IQ80321_UART + 7,
 157         .flags          = IORESOURCE_MEM,
 158 };
 159 
 160 static struct platform_device iq80321_serial_device = {
 161         .name           = "serial8250",
 162         .id             = PLAT8250_DEV_PLATFORM,
 163         .dev            = {
 164                 .platform_data          = iq80321_serial_port,
 165         },
 166         .num_resources  = 1,
 167         .resource       = &iq80321_uart_resource,
 168 };
 169 
 170 static void __init iq80321_init_machine(void)
 171 {
 172         register_iop32x_gpio();
 173         gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
 174         gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
 175         platform_device_register(&iop3xx_i2c0_device);
 176         platform_device_register(&iop3xx_i2c1_device);
 177         platform_device_register(&iq80321_flash_device);
 178         platform_device_register(&iq80321_serial_device);
 179         platform_device_register(&iop3xx_dma_0_channel);
 180         platform_device_register(&iop3xx_dma_1_channel);
 181         platform_device_register(&iop3xx_aau_channel);
 182 }
 183 
 184 MACHINE_START(IQ80321, "Intel IQ80321")
 185         /* Maintainer: Intel Corp. */
 186         .atag_offset    = 0x100,
 187         .map_io         = iq80321_map_io,
 188         .init_irq       = iop32x_init_irq,
 189         .init_time      = iq80321_timer_init,
 190         .init_machine   = iq80321_init_machine,
 191         .restart        = iop3xx_restart,
 192 MACHINE_END

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