root/arch/arm/mach-shmobile/headsmp-scu.S

   1 /* SPDX-License-Identifier: GPL-2.0+
   2  *
   3  * Shared SCU setup for mach-shmobile
   4  *
   5  * Copyright (C) 2012 Bastian Hecht
   6  */
   7 
   8 #include <linux/linkage.h>
   9 #include <linux/init.h>
  10 #include <asm/memory.h>
  11 
  12 /*
  13  * Boot code for secondary CPUs.
  14  *
  15  * First we turn on L1 cache coherency for our CPU. Then we jump to
  16  * secondary_startup that invalidates the cache and hands over control
  17  * to the common ARM startup code.
  18  */
  19 ENTRY(shmobile_boot_scu)
  20                                         @ r0 = SCU base address
  21         mrc     p15, 0, r1, c0, c0, 5   @ read MPIDR
  22         and     r1, r1, #3              @ mask out cpu ID
  23         lsl     r1, r1, #3              @ we will shift by cpu_id * 8 bits
  24         ldr     r2, [r0, #8]            @ SCU Power Status Register
  25         mov     r3, #3
  26         lsl     r3, r3, r1
  27         bic     r2, r2, r3              @ Clear bits of our CPU (Run Mode)
  28         str     r2, [r0, #8]            @ write back
  29 
  30         b       secondary_startup
  31 ENDPROC(shmobile_boot_scu)