This source file includes following definitions.
- r8a7779_map_io
- r8a7779_init_irq_dt
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8
9 #include <linux/init.h>
10 #include <linux/irqchip.h>
11
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include "common.h"
16 #include "r8a7779.h"
17
18 static struct map_desc r8a7779_io_desc[] __initdata = {
19
20 {
21 .virtual = 0xf0000000,
22 .pfn = __phys_to_pfn(0xf0000000),
23 .length = SZ_2M,
24 .type = MT_DEVICE_NONSHARED
25 },
26
27 {
28 .virtual = 0xfe000000,
29 .pfn = __phys_to_pfn(0xfe000000),
30 .length = SZ_16M,
31 .type = MT_DEVICE_NONSHARED
32 },
33 };
34
35 static void __init r8a7779_map_io(void)
36 {
37 debug_ll_io_init();
38 iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
39 }
40
41
42 #define INT2SMSKCR0 IOMEM(0xfe7822a0)
43 #define INT2SMSKCR1 IOMEM(0xfe7822a4)
44 #define INT2SMSKCR2 IOMEM(0xfe7822a8)
45 #define INT2SMSKCR3 IOMEM(0xfe7822ac)
46 #define INT2SMSKCR4 IOMEM(0xfe7822b0)
47
48 #define INT2NTSR0 IOMEM(0xfe700060)
49 #define INT2NTSR1 IOMEM(0xfe700064)
50
51 static void __init r8a7779_init_irq_dt(void)
52 {
53 irqchip_init();
54
55
56 __raw_writel(0xffffffff, INT2NTSR0);
57 __raw_writel(0x3fffffff, INT2NTSR1);
58
59
60 __raw_writel(0xfffffff0, INT2SMSKCR0);
61 __raw_writel(0xfff7ffff, INT2SMSKCR1);
62 __raw_writel(0xfffbffdf, INT2SMSKCR2);
63 __raw_writel(0xbffffffc, INT2SMSKCR3);
64 __raw_writel(0x003fee3f, INT2SMSKCR4);
65 }
66
67 static const char *const r8a7779_compat_dt[] __initconst = {
68 "renesas,r8a7779",
69 NULL,
70 };
71
72 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
73 .smp = smp_ops(r8a7779_smp_ops),
74 .map_io = r8a7779_map_io,
75 .init_early = shmobile_init_delay,
76 .init_irq = r8a7779_init_irq_dt,
77 .init_late = shmobile_init_late,
78 .dt_compat = r8a7779_compat_dt,
79 MACHINE_END