root/arch/arm/mach-sa1100/nanoengine.c

DEFINITIONS

1. nanoengine_map_io
2. nanoengine_init

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * linux/arch/arm/mach-sa1100/nanoengine.c
   4  *
   5  * Bright Star Engineering's nanoEngine board init code.
   6  *
   7  * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
   8  */
   9 
  10 #include <linux/init.h>
  11 #include <linux/gpio/machine.h>
  12 #include <linux/kernel.h>
  13 #include <linux/platform_data/sa11x0-serial.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/root_dev.h>
  17 
  18 #include <asm/mach-types.h>
  19 #include <asm/setup.h>
  20 #include <asm/page.h>
  21 
  22 #include <asm/mach/arch.h>
  23 #include <asm/mach/flash.h>
  24 #include <asm/mach/map.h>
  25 
  26 #include <mach/hardware.h>
  27 #include <mach/nanoengine.h>
  28 #include <mach/irqs.h>
  29 
  30 #include "generic.h"
  31 
  32 /* Flash bank 0 */
  33 static struct mtd_partition nanoengine_partitions[] = {
  34         {
  35                 .name   = "nanoEngine boot firmware and parameter table",
  36                 .size           = 0x00010000,  /* 32K */
  37                 .offset         = 0,
  38                 .mask_flags     = MTD_WRITEABLE,
  39         }, {
  40                 .name           = "kernel/initrd reserved",
  41                 .size           = 0x002f0000,
  42                 .offset         = 0x00010000,
  43                 .mask_flags     = MTD_WRITEABLE,
  44         }, {
  45                 .name           = "experimental filesystem allocation",
  46                 .size           = 0x00100000,
  47                 .offset         = 0x00300000,
  48                 .mask_flags     = MTD_WRITEABLE,
  49         }
  50 };
  51 
  52 static struct flash_platform_data nanoengine_flash_data = {
  53         .map_name       = "jedec_probe",
  54         .parts          = nanoengine_partitions,
  55         .nr_parts       = ARRAY_SIZE(nanoengine_partitions),
  56 };
  57 
  58 static struct resource nanoengine_flash_resources[] = {
  59         DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
  60         DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
  61 };
  62 
  63 static struct map_desc nanoengine_io_desc[] __initdata = {
  64         {
  65                 /* System Registers */
  66                 .virtual        = 0xf0000000,
  67                 .pfn            = __phys_to_pfn(0x10000000),
  68                 .length         = 0x00100000,
  69                 .type           = MT_DEVICE
  70         }, {
  71                 /* Internal PCI Memory Read/Write */
  72                 .virtual        = NANO_PCI_MEM_RW_VIRT,
  73                 .pfn            = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
  74                 .length         = NANO_PCI_MEM_RW_SIZE,
  75                 .type           = MT_DEVICE
  76         }, {
  77                 /* Internal PCI Config Space */
  78                 .virtual        = NANO_PCI_CONFIG_SPACE_VIRT,
  79                 .pfn            = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
  80                 .length         = NANO_PCI_CONFIG_SPACE_SIZE,
  81                 .type           = MT_DEVICE
  82         }
  83 };
  84 
  85 static void __init nanoengine_map_io(void)
  86 {
  87         sa1100_map_io();
  88         iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
  89 
  90         sa1100_register_uart(0, 1);
  91         sa1100_register_uart(1, 2);
  92         sa1100_register_uart(2, 3);
  93         Ser1SDCR0 |= SDCR0_UART;
  94         /* disable IRDA -- UART2 is used as a normal serial port */
  95         Ser2UTCR4 = 0;
  96         Ser2HSCR0 = 0;
  97 }
  98 
  99 static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = {
 100         .dev_id = "sa11x0-pcmcia.0",
 101         .table = {
 102                 GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH),
 103                 GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW),
 104                 GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH),
 105                 { },
 106         },
 107 };
 108 
 109 static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = {
 110         .dev_id = "sa11x0-pcmcia.1",
 111         .table = {
 112                 GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH),
 113                 GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW),
 114                 GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH),
 115                 { },
 116         },
 117 };
 118 
 119 static void __init nanoengine_init(void)
 120 {
 121         sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table);
 122         sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table);
 123         sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
 124                 ARRAY_SIZE(nanoengine_flash_resources));
 125 }
 126 
 127 MACHINE_START(NANOENGINE, "BSE nanoEngine")
 128         .atag_offset    = 0x100,
 129         .map_io         = nanoengine_map_io,
 130         .nr_irqs        = SA1100_NR_IRQS,
 131         .init_irq       = sa1100_init_irq,
 132         .init_time      = sa1100_timer_init,
 133         .init_machine   = nanoengine_init,
 134         .init_late      = sa11x0_init_late,
 135         .restart        = sa11x0_restart,
 136 MACHINE_END