root/arch/arm/common/secure_cntvoff.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 2014 Renesas Electronics Corporation
   4  *
   5  * Initialization of CNTVOFF register from secure mode
   6  *
   7  */
   8 
   9 #include <linux/linkage.h>
  10 #include <asm/assembler.h>
  11 
  12 ENTRY(secure_cntvoff_init)
  13         .arch   armv7-a
  14         /*
  15          * CNTVOFF has to be initialized either from non-secure Hypervisor
  16          * mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
  17          * then it should be handled by the secure code. The CPU must implement
  18          * the virtualization extensions.
  19          */
  20         cps     #MON_MODE
  21         mrc     p15, 0, r1, c1, c1, 0           /* Get Secure Config */
  22         orr     r0, r1, #1
  23         mcr     p15, 0, r0, c1, c1, 0           /* Set Non Secure bit */
  24         isb
  25         mov     r0, #0
  26         mcrr    p15, 4, r0, r0, c14             /* CNTVOFF = 0 */
  27         isb
  28         mcr     p15, 0, r1, c1, c1, 0           /* Set Secure bit */
  29         isb
  30         cps     #SVC_MODE
  31         ret     lr
  32 ENDPROC(secure_cntvoff_init)