This source file includes following definitions.
- xip_omap_mpu_timer_read
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14 #ifndef __ARCH_OMAP_MTD_XIP_H__
15 #define __ARCH_OMAP_MTD_XIP_H__
16
17 #include <mach/hardware.h>
18 #define OMAP_MPU_TIMER_BASE (0xfffec500)
19 #define OMAP_MPU_TIMER_OFFSET 0x100
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21 typedef struct {
22 u32 cntl;
23 u32 load_tim;
24 u32 read_tim;
25 } xip_omap_mpu_timer_regs_t;
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27 #define xip_omap_mpu_timer_base(n) \
28 ((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
29 (n)*OMAP_MPU_TIMER_OFFSET))
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31 static inline unsigned long xip_omap_mpu_timer_read(int nr)
32 {
33 volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr);
34 return timer->read_tim;
35 }
36
37 #define xip_irqpending() \
38 (omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR))
39 #define xip_currtime() (~xip_omap_mpu_timer_read(0))
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46 #ifdef CONFIG_MACH_OMAP_PERSEUS2
47 #define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7)
48 #else
49 #define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6)
50 #endif
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59 #define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1))
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61 #endif