This source file includes following definitions.
- omap7xx_gpio_init
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19 #include <linux/gpio.h>
20 #include <linux/platform_data/gpio-omap.h>
21
22 #include <mach/irqs.h>
23
24 #include "soc.h"
25
26 #define OMAP7XX_GPIO1_BASE 0xfffbc000
27 #define OMAP7XX_GPIO2_BASE 0xfffbc800
28 #define OMAP7XX_GPIO3_BASE 0xfffbd000
29 #define OMAP7XX_GPIO4_BASE 0xfffbd800
30 #define OMAP7XX_GPIO5_BASE 0xfffbe000
31 #define OMAP7XX_GPIO6_BASE 0xfffbe800
32 #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
33
34
35 static struct resource omap7xx_mpu_gpio_resources[] = {
36 {
37 .start = OMAP1_MPUIO_VBASE,
38 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 {
42 .start = INT_7XX_MPUIO,
43 .flags = IORESOURCE_IRQ,
44 },
45 };
46
47 static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
48 .revision = USHRT_MAX,
49 .direction = OMAP_MPUIO_IO_CNTL / 2,
50 .datain = OMAP_MPUIO_INPUT_LATCH / 2,
51 .dataout = OMAP_MPUIO_OUTPUT / 2,
52 .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
53 .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
54 .irqenable_inv = true,
55 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1,
56 };
57
58 static struct omap_gpio_platform_data omap7xx_mpu_gpio_config = {
59 .is_mpuio = true,
60 .bank_width = 16,
61 .bank_stride = 2,
62 .regs = &omap7xx_mpuio_regs,
63 };
64
65 static struct platform_device omap7xx_mpu_gpio = {
66 .name = "omap_gpio",
67 .id = 0,
68 .dev = {
69 .platform_data = &omap7xx_mpu_gpio_config,
70 },
71 .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
72 .resource = omap7xx_mpu_gpio_resources,
73 };
74
75
76 static struct resource omap7xx_gpio1_resources[] = {
77 {
78 .start = OMAP7XX_GPIO1_BASE,
79 .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1,
80 .flags = IORESOURCE_MEM,
81 },
82 {
83 .start = INT_7XX_GPIO_BANK1,
84 .flags = IORESOURCE_IRQ,
85 },
86 };
87
88 static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
89 .revision = USHRT_MAX,
90 .direction = OMAP7XX_GPIO_DIR_CONTROL,
91 .datain = OMAP7XX_GPIO_DATA_INPUT,
92 .dataout = OMAP7XX_GPIO_DATA_OUTPUT,
93 .irqstatus = OMAP7XX_GPIO_INT_STATUS,
94 .irqenable = OMAP7XX_GPIO_INT_MASK,
95 .irqenable_inv = true,
96 .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
97 };
98
99 static struct omap_gpio_platform_data omap7xx_gpio1_config = {
100 .bank_width = 32,
101 .regs = &omap7xx_gpio_regs,
102 };
103
104 static struct platform_device omap7xx_gpio1 = {
105 .name = "omap_gpio",
106 .id = 1,
107 .dev = {
108 .platform_data = &omap7xx_gpio1_config,
109 },
110 .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
111 .resource = omap7xx_gpio1_resources,
112 };
113
114
115 static struct resource omap7xx_gpio2_resources[] = {
116 {
117 .start = OMAP7XX_GPIO2_BASE,
118 .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1,
119 .flags = IORESOURCE_MEM,
120 },
121 {
122 .start = INT_7XX_GPIO_BANK2,
123 .flags = IORESOURCE_IRQ,
124 },
125 };
126
127 static struct omap_gpio_platform_data omap7xx_gpio2_config = {
128 .bank_width = 32,
129 .regs = &omap7xx_gpio_regs,
130 };
131
132 static struct platform_device omap7xx_gpio2 = {
133 .name = "omap_gpio",
134 .id = 2,
135 .dev = {
136 .platform_data = &omap7xx_gpio2_config,
137 },
138 .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
139 .resource = omap7xx_gpio2_resources,
140 };
141
142
143 static struct resource omap7xx_gpio3_resources[] = {
144 {
145 .start = OMAP7XX_GPIO3_BASE,
146 .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 {
150 .start = INT_7XX_GPIO_BANK3,
151 .flags = IORESOURCE_IRQ,
152 },
153 };
154
155 static struct omap_gpio_platform_data omap7xx_gpio3_config = {
156 .bank_width = 32,
157 .regs = &omap7xx_gpio_regs,
158 };
159
160 static struct platform_device omap7xx_gpio3 = {
161 .name = "omap_gpio",
162 .id = 3,
163 .dev = {
164 .platform_data = &omap7xx_gpio3_config,
165 },
166 .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
167 .resource = omap7xx_gpio3_resources,
168 };
169
170
171 static struct resource omap7xx_gpio4_resources[] = {
172 {
173 .start = OMAP7XX_GPIO4_BASE,
174 .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1,
175 .flags = IORESOURCE_MEM,
176 },
177 {
178 .start = INT_7XX_GPIO_BANK4,
179 .flags = IORESOURCE_IRQ,
180 },
181 };
182
183 static struct omap_gpio_platform_data omap7xx_gpio4_config = {
184 .bank_width = 32,
185 .regs = &omap7xx_gpio_regs,
186 };
187
188 static struct platform_device omap7xx_gpio4 = {
189 .name = "omap_gpio",
190 .id = 4,
191 .dev = {
192 .platform_data = &omap7xx_gpio4_config,
193 },
194 .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
195 .resource = omap7xx_gpio4_resources,
196 };
197
198
199 static struct resource omap7xx_gpio5_resources[] = {
200 {
201 .start = OMAP7XX_GPIO5_BASE,
202 .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1,
203 .flags = IORESOURCE_MEM,
204 },
205 {
206 .start = INT_7XX_GPIO_BANK5,
207 .flags = IORESOURCE_IRQ,
208 },
209 };
210
211 static struct omap_gpio_platform_data omap7xx_gpio5_config = {
212 .bank_width = 32,
213 .regs = &omap7xx_gpio_regs,
214 };
215
216 static struct platform_device omap7xx_gpio5 = {
217 .name = "omap_gpio",
218 .id = 5,
219 .dev = {
220 .platform_data = &omap7xx_gpio5_config,
221 },
222 .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
223 .resource = omap7xx_gpio5_resources,
224 };
225
226
227 static struct resource omap7xx_gpio6_resources[] = {
228 {
229 .start = OMAP7XX_GPIO6_BASE,
230 .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 {
234 .start = INT_7XX_GPIO_BANK6,
235 .flags = IORESOURCE_IRQ,
236 },
237 };
238
239 static struct omap_gpio_platform_data omap7xx_gpio6_config = {
240 .bank_width = 32,
241 .regs = &omap7xx_gpio_regs,
242 };
243
244 static struct platform_device omap7xx_gpio6 = {
245 .name = "omap_gpio",
246 .id = 6,
247 .dev = {
248 .platform_data = &omap7xx_gpio6_config,
249 },
250 .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
251 .resource = omap7xx_gpio6_resources,
252 };
253
254 static struct platform_device *omap7xx_gpio_dev[] __initdata = {
255 &omap7xx_mpu_gpio,
256 &omap7xx_gpio1,
257 &omap7xx_gpio2,
258 &omap7xx_gpio3,
259 &omap7xx_gpio4,
260 &omap7xx_gpio5,
261 &omap7xx_gpio6,
262 };
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269 static int __init omap7xx_gpio_init(void)
270 {
271 int i;
272
273 if (!cpu_is_omap7xx())
274 return -EINVAL;
275
276 for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
277 platform_device_register(omap7xx_gpio_dev[i]);
278
279 return 0;
280 }
281 postcore_initcall(omap7xx_gpio_init);