root/arch/arm/mach-omap1/sram.S

/* [<][>][^][v][top][bottom][index][help] */
   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * linux/arch/arm/plat-omap/sram-fn.S
   4  *
   5  * Functions that need to be run in internal SRAM
   6  */
   7 
   8 #include <linux/linkage.h>
   9 
  10 #include <asm/assembler.h>
  11 
  12 #include <mach/hardware.h>
  13 
  14 #include "iomap.h"
  15 
  16         .text
  17 
  18 /*
  19  * Reprograms ULPD and CKCTL.
  20  */
  21         .align  3
  22 ENTRY(omap1_sram_reprogram_clock)
  23         stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
  24 
  25         mov     r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
  26         orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
  27         orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
  28 
  29         mov     r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
  30         orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
  31         orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
  32 
  33         tst     r0, #1 << 4                     @ want lock mode?
  34         beq     newck                           @ nope
  35         bic     r0, r0, #1 << 4                 @ else clear lock bit
  36         strh    r0, [r2]                        @ set dpll into bypass mode
  37         orr     r0, r0, #1 << 4                 @ set lock bit again
  38 
  39 newck:
  40         strh    r1, [r3]                        @ write new ckctl value
  41         strh    r0, [r2]                        @ write new dpll value
  42 
  43         mov     r4, #0x0700                     @ let the clocks settle
  44         orr     r4, r4, #0x00ff
  45 delay:  sub     r4, r4, #1
  46         cmp     r4, #0
  47         bne     delay
  48 
  49 lock:   ldrh    r4, [r2], #0                    @ read back dpll value
  50         tst     r0, #1 << 4                     @ want lock mode?
  51         beq     out                             @ nope
  52         tst     r4, #1 << 0                     @ dpll rate locked?
  53         beq     lock                            @ try again
  54 
  55 out:
  56         ldmfd   sp!, {r0 - r12, pc}             @ restore regs and return
  57 ENTRY(omap1_sram_reprogram_clock_sz)
  58         .word   . - omap1_sram_reprogram_clock

/* [<][>][^][v][top][bottom][index][help] */