root/arch/xtensa/kernel/mxhead.S

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   1 /*
   2  * Xtensa Secondary Processors startup code.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2001 - 2013 Tensilica Inc.
   9  *
  10  * Joe Taylor <joe@tensilica.com>
  11  * Chris Zankel <chris@zankel.net>
  12  * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
  13  * Pete Delaney <piet@tensilica.com>
  14  */
  15 
  16 #include <linux/linkage.h>
  17 
  18 #include <asm/cacheasm.h>
  19 #include <asm/initialize_mmu.h>
  20 #include <asm/mxregs.h>
  21 #include <asm/regs.h>
  22 
  23 
  24         .section .SecondaryResetVector.text, "ax"
  25 
  26 
  27 ENTRY(_SecondaryResetVector)
  28         _j _SetupOCD
  29 
  30         .begin  no-absolute-literals
  31         .literal_position
  32 
  33 _SetupOCD:
  34         /*
  35          * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions).
  36          * Set Interrupt Level just below XCHAL_DEBUGLEVEL to allow
  37          * xt-gdb to single step via DEBUG exceptions received directly
  38          * by ocd.
  39          */
  40         movi    a1, 1
  41         movi    a0, 0
  42         wsr     a1, windowstart
  43         wsr     a0, windowbase
  44         rsync
  45 
  46         movi    a1, LOCKLEVEL
  47         wsr     a1, ps
  48         rsync
  49 
  50 _SetupMMU:
  51 #ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  52         initialize_mmu
  53 #endif
  54 
  55         /*
  56          * Start Secondary Processors with NULL pointer to boot params.
  57          */
  58         movi    a2, 0                           #  a2 == NULL
  59         movi    a3, _startup
  60         jx      a3
  61 
  62         .end    no-absolute-literals

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