This source file includes following definitions.
- ioport_map
- ioport_unmap
- __raw_readb
- __raw_readw
- __raw_readl
- __raw_writeb
- __raw_writew
- __raw_writel
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6 #ifndef _ASM_ARC_IO_H
7 #define _ASM_ARC_IO_H
8
9 #include <linux/types.h>
10 #include <asm/byteorder.h>
11 #include <asm/page.h>
12 #include <asm/unaligned.h>
13
14 #ifdef CONFIG_ISA_ARCV2
15 #include <asm/barrier.h>
16 #define __iormb() rmb()
17 #define __iowmb() wmb()
18 #else
19 #define __iormb() do { } while (0)
20 #define __iowmb() do { } while (0)
21 #endif
22
23 extern void __iomem *ioremap(phys_addr_t paddr, unsigned long size);
24 extern void __iomem *ioremap_prot(phys_addr_t paddr, unsigned long size,
25 unsigned long flags);
26 static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
27 {
28 return (void __iomem *)port;
29 }
30
31 static inline void ioport_unmap(void __iomem *addr)
32 {
33 }
34
35 extern void iounmap(const void __iomem *addr);
36
37 #define ioremap_nocache(phy, sz) ioremap(phy, sz)
38 #define ioremap_wc(phy, sz) ioremap(phy, sz)
39 #define ioremap_wt(phy, sz) ioremap(phy, sz)
40
41
42
43
44 #define ioread16be(p) ({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
45 #define ioread32be(p) ({ u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
46
47 #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force u16)cpu_to_be16(v), p); })
48 #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force u32)cpu_to_be32(v), p); })
49
50
51 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
52
53 #define __raw_readb __raw_readb
54 static inline u8 __raw_readb(const volatile void __iomem *addr)
55 {
56 u8 b;
57
58 __asm__ __volatile__(
59 " ldb%U1 %0, %1 \n"
60 : "=r" (b)
61 : "m" (*(volatile u8 __force *)addr)
62 : "memory");
63
64 return b;
65 }
66
67 #define __raw_readw __raw_readw
68 static inline u16 __raw_readw(const volatile void __iomem *addr)
69 {
70 u16 s;
71
72 __asm__ __volatile__(
73 " ldw%U1 %0, %1 \n"
74 : "=r" (s)
75 : "m" (*(volatile u16 __force *)addr)
76 : "memory");
77
78 return s;
79 }
80
81 #define __raw_readl __raw_readl
82 static inline u32 __raw_readl(const volatile void __iomem *addr)
83 {
84 u32 w;
85
86 __asm__ __volatile__(
87 " ld%U1 %0, %1 \n"
88 : "=r" (w)
89 : "m" (*(volatile u32 __force *)addr)
90 : "memory");
91
92 return w;
93 }
94
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98
99
100 #define __raw_readsx(t,f) \
101 static inline void __raw_reads##f(const volatile void __iomem *addr, \
102 void *ptr, unsigned int count) \
103 { \
104 bool is_aligned = ((unsigned long)ptr % ((t) / 8)) == 0; \
105 u##t *buf = ptr; \
106 \
107 if (!count) \
108 return; \
109 \
110 \
111 if (is_aligned) { \
112 do { \
113 u##t x = __raw_read##f(addr); \
114 *buf++ = x; \
115 } while (--count); \
116 } else { \
117 do { \
118 u##t x = __raw_read##f(addr); \
119 put_unaligned(x, buf++); \
120 } while (--count); \
121 } \
122 }
123
124 #define __raw_readsb __raw_readsb
125 __raw_readsx(8, b)
126 #define __raw_readsw __raw_readsw
127 __raw_readsx(16, w)
128 #define __raw_readsl __raw_readsl
129 __raw_readsx(32, l)
130
131 #define __raw_writeb __raw_writeb
132 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
133 {
134 __asm__ __volatile__(
135 " stb%U1 %0, %1 \n"
136 :
137 : "r" (b), "m" (*(volatile u8 __force *)addr)
138 : "memory");
139 }
140
141 #define __raw_writew __raw_writew
142 static inline void __raw_writew(u16 s, volatile void __iomem *addr)
143 {
144 __asm__ __volatile__(
145 " stw%U1 %0, %1 \n"
146 :
147 : "r" (s), "m" (*(volatile u16 __force *)addr)
148 : "memory");
149
150 }
151
152 #define __raw_writel __raw_writel
153 static inline void __raw_writel(u32 w, volatile void __iomem *addr)
154 {
155 __asm__ __volatile__(
156 " st%U1 %0, %1 \n"
157 :
158 : "r" (w), "m" (*(volatile u32 __force *)addr)
159 : "memory");
160
161 }
162
163 #define __raw_writesx(t,f) \
164 static inline void __raw_writes##f(volatile void __iomem *addr, \
165 const void *ptr, unsigned int count) \
166 { \
167 bool is_aligned = ((unsigned long)ptr % ((t) / 8)) == 0; \
168 const u##t *buf = ptr; \
169 \
170 if (!count) \
171 return; \
172 \
173 \
174 if (is_aligned) { \
175 do { \
176 __raw_write##f(*buf++, addr); \
177 } while (--count); \
178 } else { \
179 do { \
180 __raw_write##f(get_unaligned(buf++), addr); \
181 } while (--count); \
182 } \
183 }
184
185 #define __raw_writesb __raw_writesb
186 __raw_writesx(8, b)
187 #define __raw_writesw __raw_writesw
188 __raw_writesx(16, w)
189 #define __raw_writesl __raw_writesl
190 __raw_writesx(32, l)
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203
204 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
205 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
206 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
207 #define readsb(p,d,l) ({ __raw_readsb(p,d,l); __iormb(); })
208 #define readsw(p,d,l) ({ __raw_readsw(p,d,l); __iormb(); })
209 #define readsl(p,d,l) ({ __raw_readsl(p,d,l); __iormb(); })
210
211 #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
212 #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
213 #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
214 #define writesb(p,d,l) ({ __iowmb(); __raw_writesb(p,d,l); })
215 #define writesw(p,d,l) ({ __iowmb(); __raw_writesw(p,d,l); })
216 #define writesl(p,d,l) ({ __iowmb(); __raw_writesl(p,d,l); })
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227 #define readb_relaxed(c) __raw_readb(c)
228 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
229 __raw_readw(c)); __r; })
230 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
231 __raw_readl(c)); __r; })
232
233 #define writeb_relaxed(v,c) __raw_writeb(v,c)
234 #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c)
235 #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
236
237 #include <asm-generic/io.h>
238
239 #endif