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8 #ifndef __ASM_ARCH_EXYNOS_SMC_H
9 #define __ASM_ARCH_EXYNOS_SMC_H
10
11 #define SMC_CMD_INIT (-1)
12 #define SMC_CMD_INFO (-2)
13
14 #define SMC_CMD_SLEEP (-3)
15 #define SMC_CMD_CPU1BOOT (-4)
16 #define SMC_CMD_CPU0AFTR (-5)
17 #define SMC_CMD_SAVE (-6)
18 #define SMC_CMD_SHUTDOWN (-7)
19
20 #define SMC_CMD_C15RESUME (-11)
21
22 #define SMC_CMD_L2X0CTRL (-21)
23 #define SMC_CMD_L2X0SETUP1 (-22)
24 #define SMC_CMD_L2X0SETUP2 (-23)
25 #define SMC_CMD_L2X0INVALL (-24)
26 #define SMC_CMD_L2X0DEBUG (-25)
27
28
29 #define SMC_CMD_REG (-101)
30
31
32 #define SMC_REG_CLASS_SFR_W (0x1 << 30)
33 #define SMC_REG_ID_SFR_W(addr) (SMC_REG_CLASS_SFR_W | ((addr) >> 2))
34
35 #ifndef __ASSEMBLY__
36
37 extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
38
39 #endif
40
41
42 #define OP_TYPE_CORE 0x0
43 #define OP_TYPE_CLUSTER 0x1
44
45
46 #define SMC_POWERSTATE_IDLE 0x1
47
48 #endif