This source file includes following definitions.
- cmx2xx_init_dm9000
- cmx2xx_init_dm9000
- cmx2xx_init_touchscreen
- cmx2xx_init_touchscreen
- cmx2xx_init_leds
- cmx2xx_init_leds
- cmx2xx_set_display
- cmx2xx_init_display
- cmx2xx_init_display
- cmx2xx_suspend
- cmx2xx_resume
- cmx2xx_pm_init
- cmx2xx_pm_init
- cmx2xx_init_ac97
- cmx2xx_init_ac97
- cmx2xx_init
- cmx2xx_init_irq
- cmx2xx_map_io
- cmx2xx_map_io
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8
9 #include <linux/platform_device.h>
10 #include <linux/syscore_ops.h>
11 #include <linux/irq.h>
12 #include <linux/gpio.h>
13 #include <linux/regulator/machine.h>
14
15 #include <linux/dm9000.h>
16 #include <linux/leds.h>
17
18 #include <asm/mach/arch.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
21
22 #include "pxa25x.h"
23 #undef GPIO24_SSP1_SFRM
24 #undef GPIO86_GPIO
25 #undef GPIO87_GPIO
26 #undef GPIO88_GPIO
27 #undef GPIO89_GPIO
28 #include "pxa27x.h"
29 #undef GPIO24_SSP1_SFRM
30 #undef GPIO86_GPIO
31 #undef GPIO87_GPIO
32 #undef GPIO88_GPIO
33 #undef GPIO89_GPIO
34 #include <mach/audio.h>
35 #include <linux/platform_data/video-pxafb.h>
36 #include <mach/smemc.h>
37
38 #include <asm/hardware/it8152.h>
39
40 #include "generic.h"
41 #include "cm-x2xx-pci.h"
42
43 extern void cmx255_init(void);
44 extern void cmx270_init(void);
45
46
47 #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
48
49
50 #define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
51 #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
52
53
54 #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
55 #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
56
57
58 #define CMX255_GPIO_RED (27)
59 #define CMX255_GPIO_GREEN (32)
60 #define CMX270_GPIO_RED (93)
61 #define CMX270_GPIO_GREEN (94)
62
63
64 #define GPIO22_ETHIRQ (22)
65 #define GPIO10_ETHIRQ (10)
66 #define CMX255_GPIO_IT8152_IRQ (0)
67 #define CMX270_GPIO_IT8152_IRQ (22)
68
69 #define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
70 #define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
71
72 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
73 static struct resource cmx255_dm9000_resource[] = {
74 [0] = {
75 .start = CMX255_DM9000_PHYS_BASE,
76 .end = CMX255_DM9000_PHYS_BASE + 3,
77 .flags = IORESOURCE_MEM,
78 },
79 [1] = {
80 .start = CMX255_DM9000_PHYS_BASE + 4,
81 .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
82 .flags = IORESOURCE_MEM,
83 },
84 [2] = {
85 .start = CMX255_ETHIRQ,
86 .end = CMX255_ETHIRQ,
87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
88 }
89 };
90
91 static struct resource cmx270_dm9000_resource[] = {
92 [0] = {
93 .start = CMX270_DM9000_PHYS_BASE,
94 .end = CMX270_DM9000_PHYS_BASE + 3,
95 .flags = IORESOURCE_MEM,
96 },
97 [1] = {
98 .start = CMX270_DM9000_PHYS_BASE + 8,
99 .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
100 .flags = IORESOURCE_MEM,
101 },
102 [2] = {
103 .start = CMX270_ETHIRQ,
104 .end = CMX270_ETHIRQ,
105 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
106 }
107 };
108
109 static struct dm9000_plat_data cmx270_dm9000_platdata = {
110 .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
111 };
112
113 static struct platform_device cmx2xx_dm9000_device = {
114 .name = "dm9000",
115 .id = 0,
116 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
117 .dev = {
118 .platform_data = &cmx270_dm9000_platdata,
119 }
120 };
121
122 static void __init cmx2xx_init_dm9000(void)
123 {
124 if (cpu_is_pxa25x())
125 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
126 else
127 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
128 platform_device_register(&cmx2xx_dm9000_device);
129 }
130 #else
131 static inline void cmx2xx_init_dm9000(void) {}
132 #endif
133
134
135 #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
136 static struct platform_device cmx2xx_ts_device = {
137 .name = "ucb1400_core",
138 .id = -1,
139 };
140
141 static void __init cmx2xx_init_touchscreen(void)
142 {
143 platform_device_register(&cmx2xx_ts_device);
144 }
145 #else
146 static inline void cmx2xx_init_touchscreen(void) {}
147 #endif
148
149
150 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
151 static struct gpio_led cmx2xx_leds[] = {
152 [0] = {
153 .name = "cm-x2xx:red",
154 .default_trigger = "nand-disk",
155 .active_low = 1,
156 },
157 [1] = {
158 .name = "cm-x2xx:green",
159 .default_trigger = "heartbeat",
160 .active_low = 1,
161 },
162 };
163
164 static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
165 .num_leds = ARRAY_SIZE(cmx2xx_leds),
166 .leds = cmx2xx_leds,
167 };
168
169 static struct platform_device cmx2xx_led_device = {
170 .name = "leds-gpio",
171 .id = -1,
172 .dev = {
173 .platform_data = &cmx2xx_gpio_led_pdata,
174 },
175 };
176
177 static void __init cmx2xx_init_leds(void)
178 {
179 if (cpu_is_pxa25x()) {
180 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
181 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
182 } else {
183 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
184 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
185 }
186 platform_device_register(&cmx2xx_led_device);
187 }
188 #else
189 static inline void cmx2xx_init_leds(void) {}
190 #endif
191
192 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
193
194
195
196
197
198 #define MTYPE_STN320x240 0
199 #define MTYPE_TFT640x480 1
200 #define MTYPE_CRT640x480 2
201 #define MTYPE_CRT800x600 3
202 #define MTYPE_TFT320x240 6
203 #define MTYPE_STN640x480 7
204
205 static struct pxafb_mode_info generic_stn_320x240_mode = {
206 .pixclock = 76923,
207 .bpp = 8,
208 .xres = 320,
209 .yres = 240,
210 .hsync_len = 3,
211 .vsync_len = 2,
212 .left_margin = 3,
213 .upper_margin = 0,
214 .right_margin = 3,
215 .lower_margin = 0,
216 .sync = (FB_SYNC_HOR_HIGH_ACT |
217 FB_SYNC_VERT_HIGH_ACT),
218 .cmap_greyscale = 0,
219 };
220
221 static struct pxafb_mach_info generic_stn_320x240 = {
222 .modes = &generic_stn_320x240_mode,
223 .num_modes = 1,
224 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
225 LCD_AC_BIAS_FREQ(0xff),
226 .cmap_inverse = 0,
227 .cmap_static = 0,
228 };
229
230 static struct pxafb_mode_info generic_tft_640x480_mode = {
231 .pixclock = 38461,
232 .bpp = 8,
233 .xres = 640,
234 .yres = 480,
235 .hsync_len = 60,
236 .vsync_len = 2,
237 .left_margin = 70,
238 .upper_margin = 10,
239 .right_margin = 70,
240 .lower_margin = 5,
241 .sync = 0,
242 .cmap_greyscale = 0,
243 };
244
245 static struct pxafb_mach_info generic_tft_640x480 = {
246 .modes = &generic_tft_640x480_mode,
247 .num_modes = 1,
248 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
249 LCD_AC_BIAS_FREQ(0xff),
250 .cmap_inverse = 0,
251 .cmap_static = 0,
252 };
253
254 static struct pxafb_mode_info generic_crt_640x480_mode = {
255 .pixclock = 38461,
256 .bpp = 8,
257 .xres = 640,
258 .yres = 480,
259 .hsync_len = 63,
260 .vsync_len = 2,
261 .left_margin = 81,
262 .upper_margin = 33,
263 .right_margin = 16,
264 .lower_margin = 10,
265 .sync = (FB_SYNC_HOR_HIGH_ACT |
266 FB_SYNC_VERT_HIGH_ACT),
267 .cmap_greyscale = 0,
268 };
269
270 static struct pxafb_mach_info generic_crt_640x480 = {
271 .modes = &generic_crt_640x480_mode,
272 .num_modes = 1,
273 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
274 .cmap_inverse = 0,
275 .cmap_static = 0,
276 };
277
278 static struct pxafb_mode_info generic_crt_800x600_mode = {
279 .pixclock = 28846,
280 .bpp = 8,
281 .xres = 800,
282 .yres = 600,
283 .hsync_len = 63,
284 .vsync_len = 2,
285 .left_margin = 26,
286 .upper_margin = 21,
287 .right_margin = 26,
288 .lower_margin = 11,
289 .sync = (FB_SYNC_HOR_HIGH_ACT |
290 FB_SYNC_VERT_HIGH_ACT),
291 .cmap_greyscale = 0,
292 };
293
294 static struct pxafb_mach_info generic_crt_800x600 = {
295 .modes = &generic_crt_800x600_mode,
296 .num_modes = 1,
297 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
298 .cmap_inverse = 0,
299 .cmap_static = 0,
300 };
301
302 static struct pxafb_mode_info generic_tft_320x240_mode = {
303 .pixclock = 134615,
304 .bpp = 16,
305 .xres = 320,
306 .yres = 240,
307 .hsync_len = 63,
308 .vsync_len = 7,
309 .left_margin = 75,
310 .upper_margin = 0,
311 .right_margin = 15,
312 .lower_margin = 15,
313 .sync = 0,
314 .cmap_greyscale = 0,
315 };
316
317 static struct pxafb_mach_info generic_tft_320x240 = {
318 .modes = &generic_tft_320x240_mode,
319 .num_modes = 1,
320 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
321 .cmap_inverse = 0,
322 .cmap_static = 0,
323 };
324
325 static struct pxafb_mode_info generic_stn_640x480_mode = {
326 .pixclock = 57692,
327 .bpp = 8,
328 .xres = 640,
329 .yres = 480,
330 .hsync_len = 4,
331 .vsync_len = 2,
332 .left_margin = 10,
333 .upper_margin = 5,
334 .right_margin = 10,
335 .lower_margin = 5,
336 .sync = (FB_SYNC_HOR_HIGH_ACT |
337 FB_SYNC_VERT_HIGH_ACT),
338 .cmap_greyscale = 0,
339 };
340
341 static struct pxafb_mach_info generic_stn_640x480 = {
342 .modes = &generic_stn_640x480_mode,
343 .num_modes = 1,
344 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
345 .cmap_inverse = 0,
346 .cmap_static = 0,
347 };
348
349 static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
350
351 static int __init cmx2xx_set_display(char *str)
352 {
353 int disp_type = simple_strtol(str, NULL, 0);
354 switch (disp_type) {
355 case MTYPE_STN320x240:
356 cmx2xx_display = &generic_stn_320x240;
357 break;
358 case MTYPE_TFT640x480:
359 cmx2xx_display = &generic_tft_640x480;
360 break;
361 case MTYPE_CRT640x480:
362 cmx2xx_display = &generic_crt_640x480;
363 break;
364 case MTYPE_CRT800x600:
365 cmx2xx_display = &generic_crt_800x600;
366 break;
367 case MTYPE_TFT320x240:
368 cmx2xx_display = &generic_tft_320x240;
369 break;
370 case MTYPE_STN640x480:
371 cmx2xx_display = &generic_stn_640x480;
372 break;
373 default:
374 cmx2xx_display = &generic_crt_640x480;
375 break;
376 }
377 return 1;
378 }
379
380
381
382
383
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385
386
387 __setup("monitor=", cmx2xx_set_display);
388
389 static void __init cmx2xx_init_display(void)
390 {
391 pxa_set_fb_info(NULL, cmx2xx_display);
392 }
393 #else
394 static inline void cmx2xx_init_display(void) {}
395 #endif
396
397 #ifdef CONFIG_PM
398 static unsigned long sleep_save_msc[10];
399
400 static int cmx2xx_suspend(void)
401 {
402 cmx2xx_pci_suspend();
403
404
405 sleep_save_msc[0] = __raw_readl(MSC0);
406 sleep_save_msc[1] = __raw_readl(MSC1);
407 sleep_save_msc[2] = __raw_readl(MSC2);
408
409
410 PCFR = 0x0;
411 PSLR = 0xff400000;
412 PMCR = 0x00000005;
413 PWER = 0x80000000;
414 PFER = 0x00000000;
415 PRER = 0x00000000;
416 PGSR0 = 0xC0018800;
417 PGSR1 = 0x004F0002;
418 PGSR2 = 0x6021C000;
419 PGSR3 = 0x00020000;
420
421 return 0;
422 }
423
424 static void cmx2xx_resume(void)
425 {
426 cmx2xx_pci_resume();
427
428
429 __raw_writel(sleep_save_msc[0], MSC0);
430 __raw_writel(sleep_save_msc[1], MSC1);
431 __raw_writel(sleep_save_msc[2], MSC2);
432 }
433
434 static struct syscore_ops cmx2xx_pm_syscore_ops = {
435 .resume = cmx2xx_resume,
436 .suspend = cmx2xx_suspend,
437 };
438
439 static int __init cmx2xx_pm_init(void)
440 {
441 register_syscore_ops(&cmx2xx_pm_syscore_ops);
442
443 return 0;
444 }
445 #else
446 static int __init cmx2xx_pm_init(void) { return 0; }
447 #endif
448
449 #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
450 static void __init cmx2xx_init_ac97(void)
451 {
452 pxa_set_ac97_info(NULL);
453 }
454 #else
455 static inline void cmx2xx_init_ac97(void) {}
456 #endif
457
458 static void __init cmx2xx_init(void)
459 {
460 pxa_set_ffuart_info(NULL);
461 pxa_set_btuart_info(NULL);
462 pxa_set_stuart_info(NULL);
463
464 cmx2xx_pm_init();
465
466 if (cpu_is_pxa25x())
467 cmx255_init();
468 else
469 cmx270_init();
470
471 cmx2xx_init_dm9000();
472 cmx2xx_init_display();
473 cmx2xx_init_ac97();
474 cmx2xx_init_touchscreen();
475 cmx2xx_init_leds();
476
477 regulator_has_full_constraints();
478 }
479
480 static void __init cmx2xx_init_irq(void)
481 {
482 if (cpu_is_pxa25x()) {
483 pxa25x_init_irq();
484 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
485 } else {
486 pxa27x_init_irq();
487 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
488 }
489 }
490
491 #ifdef CONFIG_PCI
492
493 static struct map_desc cmx2xx_io_desc[] __initdata = {
494 [0] = {
495 .virtual = (unsigned long)CMX2XX_IT8152_VIRT,
496 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
497 .length = SZ_64M,
498 .type = MT_DEVICE
499 },
500 };
501
502 static void __init cmx2xx_map_io(void)
503 {
504 if (cpu_is_pxa25x())
505 pxa25x_map_io();
506
507 if (cpu_is_pxa27x())
508 pxa27x_map_io();
509
510 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
511
512 it8152_base_address = CMX2XX_IT8152_VIRT;
513 }
514 #else
515 static void __init cmx2xx_map_io(void)
516 {
517 if (cpu_is_pxa25x())
518 pxa25x_map_io();
519
520 if (cpu_is_pxa27x())
521 pxa27x_map_io();
522 }
523 #endif
524
525 MACHINE_START(ARMCORE, "Compulab CM-X2XX")
526 .atag_offset = 0x100,
527 .map_io = cmx2xx_map_io,
528 .nr_irqs = CMX2XX_NR_IRQS,
529 .init_irq = cmx2xx_init_irq,
530
531 .handle_irq = pxa25x_handle_irq,
532 .init_time = pxa_timer_init,
533 .init_machine = cmx2xx_init,
534 #ifdef CONFIG_PCI
535 .dma_zone_size = SZ_64M,
536 #endif
537 .restart = pxa_restart,
538 MACHINE_END