This source file includes following definitions.
- sdrc_write_reg
- sdrc_read_reg
- sms_write_reg
- sms_read_reg
- omap2_sdrc_init
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2 #ifndef __ARCH_ARM_MACH_OMAP2_SDRC_H
3 #define __ARCH_ARM_MACH_OMAP2_SDRC_H
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15 #undef DEBUG
16
17 #ifndef __ASSEMBLER__
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19 #include <linux/io.h>
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21 extern void __iomem *omap2_sdrc_base;
22 extern void __iomem *omap2_sms_base;
23
24 #define OMAP_SDRC_REGADDR(reg) (omap2_sdrc_base + (reg))
25 #define OMAP_SMS_REGADDR(reg) (omap2_sms_base + (reg))
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29 static inline void sdrc_write_reg(u32 val, u16 reg)
30 {
31 writel_relaxed(val, OMAP_SDRC_REGADDR(reg));
32 }
33
34 static inline u32 sdrc_read_reg(u16 reg)
35 {
36 return readl_relaxed(OMAP_SDRC_REGADDR(reg));
37 }
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40
41 static inline void sms_write_reg(u32 val, u16 reg)
42 {
43 writel_relaxed(val, OMAP_SMS_REGADDR(reg));
44 }
45
46 static inline u32 sms_read_reg(u16 reg)
47 {
48 return readl_relaxed(OMAP_SMS_REGADDR(reg));
49 }
50
51 extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms);
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67 struct omap_sdrc_params {
68 unsigned long rate;
69 u32 actim_ctrla;
70 u32 actim_ctrlb;
71 u32 rfr_ctrl;
72 u32 mr;
73 };
74
75 #ifdef CONFIG_SOC_HAS_OMAP2_SDRC
76 void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
77 struct omap_sdrc_params *sdrc_cs1);
78 #else
79 static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
80 struct omap_sdrc_params *sdrc_cs1) {};
81 #endif
82
83 int omap2_sdrc_get_params(unsigned long r,
84 struct omap_sdrc_params **sdrc_cs0,
85 struct omap_sdrc_params **sdrc_cs1);
86 void omap2_sms_save_context(void);
87 void omap2_sms_restore_context(void);
88
89 struct memory_timings {
90 u32 m_type;
91 u32 dll_mode;
92 u32 slow_dll_ctrl;
93 u32 fast_dll_ctrl;
94 u32 base_cs;
95 };
96
97 extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
98 struct omap_sdrc_params *rx51_get_sdram_timings(void);
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100 u32 omap2xxx_sdrc_dll_is_unlocked(void);
101 u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
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103
104 #else
105 #define OMAP242X_SDRC_REGADDR(reg) \
106 OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
107 #define OMAP243X_SDRC_REGADDR(reg) \
108 OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
109 #define OMAP34XX_SDRC_REGADDR(reg) \
110 OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
111
112 #endif
113
114
115 #define MIN_SDRC_DLL_LOCK_FREQ 83000000
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118 #define SDRC_MPURATE_SCALE 8
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121 #define SDRC_MPURATE_BASE_SHIFT 9
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127 #define SDRC_MPURATE_LOOPS 96
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131 #define SDRC_SYSCONFIG 0x010
132 #define SDRC_CS_CFG 0x040
133 #define SDRC_SHARING 0x044
134 #define SDRC_ERR_TYPE 0x04C
135 #define SDRC_DLLA_CTRL 0x060
136 #define SDRC_DLLA_STATUS 0x064
137 #define SDRC_DLLB_CTRL 0x068
138 #define SDRC_DLLB_STATUS 0x06C
139 #define SDRC_POWER 0x070
140 #define SDRC_MCFG_0 0x080
141 #define SDRC_MR_0 0x084
142 #define SDRC_EMR2_0 0x08c
143 #define SDRC_ACTIM_CTRL_A_0 0x09c
144 #define SDRC_ACTIM_CTRL_B_0 0x0a0
145 #define SDRC_RFR_CTRL_0 0x0a4
146 #define SDRC_MANUAL_0 0x0a8
147 #define SDRC_MCFG_1 0x0B0
148 #define SDRC_MR_1 0x0B4
149 #define SDRC_EMR2_1 0x0BC
150 #define SDRC_ACTIM_CTRL_A_1 0x0C4
151 #define SDRC_ACTIM_CTRL_B_1 0x0C8
152 #define SDRC_RFR_CTRL_1 0x0D4
153 #define SDRC_MANUAL_1 0x0D8
154
155 #define SDRC_POWER_AUTOCOUNT_SHIFT 8
156 #define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT)
157 #define SDRC_POWER_CLKCTRL_SHIFT 4
158 #define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT)
159 #define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT)
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185 #define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1)
186 #define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1)
187 #define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1)
188 #define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1)
189 #define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1)
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196 #define OMAP242X_SMS_REGADDR(reg) \
197 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
198 #define OMAP243X_SMS_REGADDR(reg) \
199 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
200 #define OMAP343X_SMS_REGADDR(reg) \
201 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
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205 #define SMS_SYSCONFIG 0x010
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210 #endif