root/arch/arm/mach-omap2/omap34xx.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * This file contains the processor specific definitions of the TI OMAP34XX.
   4  *
   5  * Copyright (C) 2007 Texas Instruments.
   6  * Copyright (C) 2007 Nokia Corporation.
   7  */
   8 
   9 #ifndef __ASM_ARCH_OMAP3_H
  10 #define __ASM_ARCH_OMAP3_H
  11 
  12 /*
  13  * Please place only base defines here and put the rest in device
  14  * specific headers.
  15  */
  16 
  17 #define L4_34XX_BASE            0x48000000
  18 #define L4_WK_34XX_BASE         0x48300000
  19 #define L4_PER_34XX_BASE        0x49000000
  20 #define L4_EMU_34XX_BASE        0x54000000
  21 #define L3_34XX_BASE            0x68000000
  22 
  23 #define L4_WK_AM33XX_BASE       0x44C00000
  24 
  25 #define OMAP3430_32KSYNCT_BASE  0x48320000
  26 #define OMAP3430_CM_BASE        0x48004800
  27 #define OMAP3430_PRM_BASE       0x48306800
  28 #define OMAP343X_SMS_BASE       0x6C000000
  29 #define OMAP343X_SDRC_BASE      0x6D000000
  30 #define OMAP34XX_GPMC_BASE      0x6E000000
  31 #define OMAP343X_SCM_BASE       0x48002000
  32 #define OMAP343X_CTRL_BASE      OMAP343X_SCM_BASE
  33 
  34 #define OMAP34XX_IC_BASE        0x48200000
  35 
  36 #define OMAP3430_ISP_BASE       (L4_34XX_BASE + 0xBC000)
  37 #define OMAP3430_ISP_MMU_BASE   (OMAP3430_ISP_BASE + 0x1400)
  38 #define OMAP3430_ISP_BASE2      (OMAP3430_ISP_BASE + 0x1800)
  39 
  40 #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
  41 #define OMAP34XX_USBTLL_BASE    (L4_34XX_BASE + 0x62000)
  42 #define OMAP34XX_UHH_CONFIG_BASE        (L4_34XX_BASE + 0x64000)
  43 #define OMAP34XX_OHCI_BASE      (L4_34XX_BASE + 0x64400)
  44 #define OMAP34XX_EHCI_BASE      (L4_34XX_BASE + 0x64800)
  45 #define OMAP34XX_SR1_BASE       0x480C9000
  46 #define OMAP34XX_SR2_BASE       0x480CB000
  47 
  48 #define OMAP34XX_MAILBOX_BASE           (L4_34XX_BASE + 0x94000)
  49 
  50 /* Security */
  51 #define OMAP34XX_SEC_BASE       (L4_34XX_BASE + 0xA0000)
  52 #define OMAP34XX_SEC_SHA1MD5_BASE       (OMAP34XX_SEC_BASE + 0x23000)
  53 #define OMAP34XX_SEC_AES_BASE   (OMAP34XX_SEC_BASE + 0x25000)
  54 
  55 #endif /* __ASM_ARCH_OMAP3_H */
  56