root/arch/arm/mach-omap2/omap_hwmod.c

DEFINITIONS

1. _update_sysc_cache
2. _write_sysconfig
3. _set_master_standbymode
4. _set_slave_idlemode
5. _set_clockactivity
6. _set_softreset
7. _clear_softreset
8. _wait_softreset_complete
9. _set_dmadisable
10. _set_module_autoidle
11. _enable_wakeup
12. _disable_wakeup
13. _get_clkdm
14. _add_initiator_dep
15. _del_initiator_dep
16. _setup_clkctrl_provider
17. _init_clkctrl_providers
18. _omap4_xlate_clkctrl
19. _lookup_clkctrl_clk
20. _init_main_clk
21. _init_interface_clks
22. _init_opt_clks
23. _enable_optional_clocks
24. _disable_optional_clocks
25. _enable_clocks
26. _omap4_clkctrl_managed_by_clkfwk
27. _omap4_has_clkctrl_clock
28. _disable_clocks
29. _omap4_enable_module
30. _omap4_wait_target_disable
31. _save_mpu_port_index
32. _find_mpu_rt_port
33. _enable_sysc
34. _idle_sysc
35. _shutdown_sysc
36. _lookup
37. _init_clkdm
38. _init_clocks
39. _lookup_hardreset
40. _assert_hardreset
41. _deassert_hardreset
42. _read_hardreset
43. _are_all_hardreset_lines_asserted
44. _are_any_hardreset_lines_asserted
45. _omap4_disable_module
46. _ocp_softreset
47. _reset
48. _omap4_update_context_lost
49. _omap4_get_context_lost
50. _enable_preprogram
51. _enable
52. _idle
53. _shutdown
54. of_dev_find_hwmod
55. of_dev_hwmod_lookup
56. omap_hwmod_fix_mpu_rt_idx
57. omap_hwmod_parse_module_range
58. _init_mpu_rt_base
59. parse_module_flags
60. _setup_iclk_autoidle
61. _setup_reset
62. _setup_postsetup
63. _setup
64. _register
65. _add_link
66. _register_link
67. _omap2xxx_3xxx_wait_target_ready
68. _omap4_wait_target_ready
69. _omap2_assert_hardreset
70. _omap2_deassert_hardreset
71. _omap2_is_hardreset_asserted
72. _omap4_assert_hardreset
73. _omap4_deassert_hardreset
74. _omap4_is_hardreset_asserted
75. _omap4_disable_direct_prcm
76. _am33xx_deassert_hardreset
77. omap_hwmod_read
78. omap_hwmod_write
79. omap_hwmod_softreset
80. omap_hwmod_lookup
81. omap_hwmod_for_each
82. omap_hwmod_register_links
83. _ensure_mpu_hwmod_is_setup
84. omap_hwmod_setup_one
85. omap_hwmod_check_one
86. omap_hwmod_check_sysc
87. omap_hwmod_init_regbits
88. omap_hwmod_init_reg_offs
89. omap_hwmod_init_sysc_flags
90. omap_hwmod_init_idlemodes
91. omap_hwmod_check_module
92. omap_hwmod_allocate_module
93. omap_hwmod_init_reset_quirk
94. omap_hwmod_init_reset_quirks
95. omap_hwmod_init_module
96. omap_hwmod_setup_earlycon_flags
97. omap_hwmod_setup_all
98. omap_hwmod_enable
99. omap_hwmod_idle
100. omap_hwmod_shutdown
101. omap_hwmod_get_pwrdm
102. omap_hwmod_get_mpu_rt_va
103. omap_hwmod_enable_wakeup
104. omap_hwmod_disable_wakeup
105. omap_hwmod_assert_hardreset
106. omap_hwmod_deassert_hardreset
107. omap_hwmod_for_each_by_class
108. omap_hwmod_set_postsetup_state
109. omap_hwmod_get_context_loss_count
110. omap_hwmod_init
111. omap_hwmod_get_main_clk

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * omap_hwmod implementation for OMAP2/3/4
   4  *
   5  * Copyright (C) 2009-2011 Nokia Corporation
   6  * Copyright (C) 2011-2012 Texas Instruments, Inc.
   7  *
   8  * Paul Walmsley, Benoît Cousson, Kevin Hilman
   9  *
  10  * Created in collaboration with (alphabetical order): Thara Gopinath,
  11  * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  12  * Sawant, Santosh Shilimkar, Richard Woodruff
  13  *
  14  * Introduction
  15  * ------------
  16  * One way to view an OMAP SoC is as a collection of largely unrelated
  17  * IP blocks connected by interconnects.  The IP blocks include
  18  * devices such as ARM processors, audio serial interfaces, UARTs,
  19  * etc.  Some of these devices, like the DSP, are created by TI;
  20  * others, like the SGX, largely originate from external vendors.  In
  21  * TI's documentation, on-chip devices are referred to as "OMAP
  22  * modules."  Some of these IP blocks are identical across several
  23  * OMAP versions.  Others are revised frequently.
  24  *
  25  * These OMAP modules are tied together by various interconnects.
  26  * Most of the address and data flow between modules is via OCP-based
  27  * interconnects such as the L3 and L4 buses; but there are other
  28  * interconnects that distribute the hardware clock tree, handle idle
  29  * and reset signaling, supply power, and connect the modules to
  30  * various pads or balls on the OMAP package.
  31  *
  32  * OMAP hwmod provides a consistent way to describe the on-chip
  33  * hardware blocks and their integration into the rest of the chip.
  34  * This description can be automatically generated from the TI
  35  * hardware database.  OMAP hwmod provides a standard, consistent API
  36  * to reset, enable, idle, and disable these hardware blocks.  And
  37  * hwmod provides a way for other core code, such as the Linux device
  38  * code or the OMAP power management and address space mapping code,
  39  * to query the hardware database.
  40  *
  41  * Using hwmod
  42  * -----------
  43  * Drivers won't call hwmod functions directly.  That is done by the
  44  * omap_device code, and in rare occasions, by custom integration code
  45  * in arch/arm/ *omap*.  The omap_device code includes functions to
  46  * build a struct platform_device using omap_hwmod data, and that is
  47  * currently how hwmod data is communicated to drivers and to the
  48  * Linux driver model.  Most drivers will call omap_hwmod functions only
  49  * indirectly, via pm_runtime*() functions.
  50  *
  51  * From a layering perspective, here is where the OMAP hwmod code
  52  * fits into the kernel software stack:
  53  *
  54  *            +-------------------------------+
  55  *            |      Device driver code       |
  56  *            |      (e.g., drivers/)         |
  57  *            +-------------------------------+
  58  *            |      Linux driver model       |
  59  *            |     (platform_device /        |
  60  *            |  platform_driver data/code)   |
  61  *            +-------------------------------+
  62  *            | OMAP core-driver integration  |
  63  *            |(arch/arm/mach-omap2/devices.c)|
  64  *            +-------------------------------+
  65  *            |      omap_device code         |
  66  *            | (../plat-omap/omap_device.c)  |
  67  *            +-------------------------------+
  68  *   ---->    |    omap_hwmod code/data       |    <-----
  69  *            | (../mach-omap2/omap_hwmod*)   |
  70  *            +-------------------------------+
  71  *            | OMAP clock/PRCM/register fns  |
  72  *            | ({read,write}l_relaxed, clk*) |
  73  *            +-------------------------------+
  74  *
  75  * Device drivers should not contain any OMAP-specific code or data in
  76  * them.  They should only contain code to operate the IP block that
  77  * the driver is responsible for.  This is because these IP blocks can
  78  * also appear in other SoCs, either from TI (such as DaVinci) or from
  79  * other manufacturers; and drivers should be reusable across other
  80  * platforms.
  81  *
  82  * The OMAP hwmod code also will attempt to reset and idle all on-chip
  83  * devices upon boot.  The goal here is for the kernel to be
  84  * completely self-reliant and independent from bootloaders.  This is
  85  * to ensure a repeatable configuration, both to ensure consistent
  86  * runtime behavior, and to make it easier for others to reproduce
  87  * bugs.
  88  *
  89  * OMAP module activity states
  90  * ---------------------------
  91  * The hwmod code considers modules to be in one of several activity
  92  * states.  IP blocks start out in an UNKNOWN state, then once they
  93  * are registered via the hwmod code, proceed to the REGISTERED state.
  94  * Once their clock names are resolved to clock pointers, the module
  95  * enters the CLKS_INITED state; and finally, once the module has been
  96  * reset and the integration registers programmed, the INITIALIZED state
  97  * is entered.  The hwmod code will then place the module into either
  98  * the IDLE state to save power, or in the case of a critical system
  99  * module, the ENABLED state.
 100  *
 101  * OMAP core integration code can then call omap_hwmod*() functions
 102  * directly to move the module between the IDLE, ENABLED, and DISABLED
 103  * states, as needed.  This is done during both the PM idle loop, and
 104  * in the OMAP core integration code's implementation of the PM runtime
 105  * functions.
 106  *
 107  * References
 108  * ----------
 109  * This is a partial list.
 110  * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
 111  * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
 112  * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
 113  * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
 114  * - Open Core Protocol Specification 2.2
 115  *
 116  * To do:
 117  * - handle IO mapping
 118  * - bus throughput & module latency measurement code
 119  *
 120  * XXX add tests at the beginning of each function to ensure the hwmod is
 121  * in the appropriate state
 122  * XXX error return values should be checked to ensure that they are
 123  * appropriate
 124  */
 125 #undef DEBUG
 126 
 127 #include <linux/kernel.h>
 128 #include <linux/errno.h>
 129 #include <linux/io.h>
 130 #include <linux/clk.h>
 131 #include <linux/clk-provider.h>
 132 #include <linux/delay.h>
 133 #include <linux/err.h>
 134 #include <linux/list.h>
 135 #include <linux/mutex.h>
 136 #include <linux/spinlock.h>
 137 #include <linux/slab.h>
 138 #include <linux/cpu.h>
 139 #include <linux/of.h>
 140 #include <linux/of_address.h>
 141 #include <linux/memblock.h>
 142 
 143 #include <linux/platform_data/ti-sysc.h>
 144 
 145 #include <dt-bindings/bus/ti-sysc.h>
 146 
 147 #include <asm/system_misc.h>
 148 
 149 #include "clock.h"
 150 #include "omap_hwmod.h"
 151 
 152 #include "soc.h"
 153 #include "common.h"
 154 #include "clockdomain.h"
 155 #include "hdq1w.h"
 156 #include "mmc.h"
 157 #include "powerdomain.h"
 158 #include "cm2xxx.h"
 159 #include "cm3xxx.h"
 160 #include "cm33xx.h"
 161 #include "prm.h"
 162 #include "prm3xxx.h"
 163 #include "prm44xx.h"
 164 #include "prm33xx.h"
 165 #include "prminst44xx.h"
 166 #include "pm.h"
 167 #include "wd_timer.h"
 168 
 169 /* Name of the OMAP hwmod for the MPU */
 170 #define MPU_INITIATOR_NAME              "mpu"
 171 
 172 /*
 173  * Number of struct omap_hwmod_link records per struct
 174  * omap_hwmod_ocp_if record (master->slave and slave->master)
 175  */
 176 #define LINKS_PER_OCP_IF                2
 177 
 178 /*
 179  * Address offset (in bytes) between the reset control and the reset
 180  * status registers: 4 bytes on OMAP4
 181  */
 182 #define OMAP4_RST_CTRL_ST_OFFSET        4
 183 
 184 /*
 185  * Maximum length for module clock handle names
 186  */
 187 #define MOD_CLK_MAX_NAME_LEN            32
 188 
 189 /**
 190  * struct clkctrl_provider - clkctrl provider mapping data
 191  * @num_addrs: number of base address ranges for the provider
 192  * @addr: base address(es) for the provider
 193  * @size: size(s) of the provider address space(s)
 194  * @node: device node associated with the provider
 195  * @link: list link
 196  */
 197 struct clkctrl_provider {
 198         int                     num_addrs;
 199         u32                     *addr;
 200         u32                     *size;
 201         struct device_node      *node;
 202         struct list_head        link;
 203 };
 204 
 205 static LIST_HEAD(clkctrl_providers);
 206 
 207 /**
 208  * struct omap_hwmod_reset - IP specific reset functions
 209  * @match: string to match against the module name
 210  * @len: number of characters to match
 211  * @reset: IP specific reset function
 212  *
 213  * Used only in cases where struct omap_hwmod is dynamically allocated.
 214  */
 215 struct omap_hwmod_reset {
 216         const char *match;
 217         int len;
 218         int (*reset)(struct omap_hwmod *oh);
 219 };
 220 
 221 /**
 222  * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
 223  * @enable_module: function to enable a module (via MODULEMODE)
 224  * @disable_module: function to disable a module (via MODULEMODE)
 225  *
 226  * XXX Eventually this functionality will be hidden inside the PRM/CM
 227  * device drivers.  Until then, this should avoid huge blocks of cpu_is_*()
 228  * conditionals in this code.
 229  */
 230 struct omap_hwmod_soc_ops {
 231         void (*enable_module)(struct omap_hwmod *oh);
 232         int (*disable_module)(struct omap_hwmod *oh);
 233         int (*wait_target_ready)(struct omap_hwmod *oh);
 234         int (*assert_hardreset)(struct omap_hwmod *oh,
 235                                 struct omap_hwmod_rst_info *ohri);
 236         int (*deassert_hardreset)(struct omap_hwmod *oh,
 237                                   struct omap_hwmod_rst_info *ohri);
 238         int (*is_hardreset_asserted)(struct omap_hwmod *oh,
 239                                      struct omap_hwmod_rst_info *ohri);
 240         int (*init_clkdm)(struct omap_hwmod *oh);
 241         void (*update_context_lost)(struct omap_hwmod *oh);
 242         int (*get_context_lost)(struct omap_hwmod *oh);
 243         int (*disable_direct_prcm)(struct omap_hwmod *oh);
 244         u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
 245 };
 246 
 247 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
 248 static struct omap_hwmod_soc_ops soc_ops;
 249 
 250 /* omap_hwmod_list contains all registered struct omap_hwmods */
 251 static LIST_HEAD(omap_hwmod_list);
 252 static DEFINE_MUTEX(list_lock);
 253 
 254 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
 255 static struct omap_hwmod *mpu_oh;
 256 
 257 /* inited: set to true once the hwmod code is initialized */
 258 static bool inited;
 259 
 260 /* Private functions */
 261 
 262 /**
 263  * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
 264  * @oh: struct omap_hwmod *
 265  *
 266  * Load the current value of the hwmod OCP_SYSCONFIG register into the
 267  * struct omap_hwmod for later use.  Returns -EINVAL if the hwmod has no
 268  * OCP_SYSCONFIG register or 0 upon success.
 269  */
 270 static int _update_sysc_cache(struct omap_hwmod *oh)
 271 {
 272         if (!oh->class->sysc) {
 273                 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
 274                 return -EINVAL;
 275         }
 276 
 277         /* XXX ensure module interface clock is up */
 278 
 279         oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
 280 
 281         if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
 282                 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
 283 
 284         return 0;
 285 }
 286 
 287 /**
 288  * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
 289  * @v: OCP_SYSCONFIG value to write
 290  * @oh: struct omap_hwmod *
 291  *
 292  * Write @v into the module class' OCP_SYSCONFIG register, if it has
 293  * one.  No return value.
 294  */
 295 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
 296 {
 297         if (!oh->class->sysc) {
 298                 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
 299                 return;
 300         }
 301 
 302         /* XXX ensure module interface clock is up */
 303 
 304         /* Module might have lost context, always update cache and register */
 305         oh->_sysc_cache = v;
 306 
 307         /*
 308          * Some IP blocks (such as RTC) require unlocking of IP before
 309          * accessing its registers. If a function pointer is present
 310          * to unlock, then call it before accessing sysconfig and
 311          * call lock after writing sysconfig.
 312          */
 313         if (oh->class->unlock)
 314                 oh->class->unlock(oh);
 315 
 316         omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
 317 
 318         if (oh->class->lock)
 319                 oh->class->lock(oh);
 320 }
 321 
 322 /**
 323  * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
 324  * @oh: struct omap_hwmod *
 325  * @standbymode: MIDLEMODE field bits
 326  * @v: pointer to register contents to modify
 327  *
 328  * Update the master standby mode bits in @v to be @standbymode for
 329  * the @oh hwmod.  Does not write to the hardware.  Returns -EINVAL
 330  * upon error or 0 upon success.
 331  */
 332 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
 333                                    u32 *v)
 334 {
 335         u32 mstandby_mask;
 336         u8 mstandby_shift;
 337 
 338         if (!oh->class->sysc ||
 339             !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
 340                 return -EINVAL;
 341 
 342         if (!oh->class->sysc->sysc_fields) {
 343                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 344                 return -EINVAL;
 345         }
 346 
 347         mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
 348         mstandby_mask = (0x3 << mstandby_shift);
 349 
 350         *v &= ~mstandby_mask;
 351         *v |= __ffs(standbymode) << mstandby_shift;
 352 
 353         return 0;
 354 }
 355 
 356 /**
 357  * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
 358  * @oh: struct omap_hwmod *
 359  * @idlemode: SIDLEMODE field bits
 360  * @v: pointer to register contents to modify
 361  *
 362  * Update the slave idle mode bits in @v to be @idlemode for the @oh
 363  * hwmod.  Does not write to the hardware.  Returns -EINVAL upon error
 364  * or 0 upon success.
 365  */
 366 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
 367 {
 368         u32 sidle_mask;
 369         u8 sidle_shift;
 370 
 371         if (!oh->class->sysc ||
 372             !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
 373                 return -EINVAL;
 374 
 375         if (!oh->class->sysc->sysc_fields) {
 376                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 377                 return -EINVAL;
 378         }
 379 
 380         sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
 381         sidle_mask = (0x3 << sidle_shift);
 382 
 383         *v &= ~sidle_mask;
 384         *v |= __ffs(idlemode) << sidle_shift;
 385 
 386         return 0;
 387 }
 388 
 389 /**
 390  * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
 391  * @oh: struct omap_hwmod *
 392  * @clockact: CLOCKACTIVITY field bits
 393  * @v: pointer to register contents to modify
 394  *
 395  * Update the clockactivity mode bits in @v to be @clockact for the
 396  * @oh hwmod.  Used for additional powersaving on some modules.  Does
 397  * not write to the hardware.  Returns -EINVAL upon error or 0 upon
 398  * success.
 399  */
 400 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
 401 {
 402         u32 clkact_mask;
 403         u8  clkact_shift;
 404 
 405         if (!oh->class->sysc ||
 406             !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
 407                 return -EINVAL;
 408 
 409         if (!oh->class->sysc->sysc_fields) {
 410                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 411                 return -EINVAL;
 412         }
 413 
 414         clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
 415         clkact_mask = (0x3 << clkact_shift);
 416 
 417         *v &= ~clkact_mask;
 418         *v |= clockact << clkact_shift;
 419 
 420         return 0;
 421 }
 422 
 423 /**
 424  * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
 425  * @oh: struct omap_hwmod *
 426  * @v: pointer to register contents to modify
 427  *
 428  * Set the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
 429  * error or 0 upon success.
 430  */
 431 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
 432 {
 433         u32 softrst_mask;
 434 
 435         if (!oh->class->sysc ||
 436             !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
 437                 return -EINVAL;
 438 
 439         if (!oh->class->sysc->sysc_fields) {
 440                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 441                 return -EINVAL;
 442         }
 443 
 444         softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
 445 
 446         *v |= softrst_mask;
 447 
 448         return 0;
 449 }
 450 
 451 /**
 452  * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
 453  * @oh: struct omap_hwmod *
 454  * @v: pointer to register contents to modify
 455  *
 456  * Clear the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
 457  * error or 0 upon success.
 458  */
 459 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
 460 {
 461         u32 softrst_mask;
 462 
 463         if (!oh->class->sysc ||
 464             !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
 465                 return -EINVAL;
 466 
 467         if (!oh->class->sysc->sysc_fields) {
 468                 WARN(1,
 469                      "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
 470                      oh->name);
 471                 return -EINVAL;
 472         }
 473 
 474         softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
 475 
 476         *v &= ~softrst_mask;
 477 
 478         return 0;
 479 }
 480 
 481 /**
 482  * _wait_softreset_complete - wait for an OCP softreset to complete
 483  * @oh: struct omap_hwmod * to wait on
 484  *
 485  * Wait until the IP block represented by @oh reports that its OCP
 486  * softreset is complete.  This can be triggered by software (see
 487  * _ocp_softreset()) or by hardware upon returning from off-mode (one
 488  * example is HSMMC).  Waits for up to MAX_MODULE_SOFTRESET_WAIT
 489  * microseconds.  Returns the number of microseconds waited.
 490  */
 491 static int _wait_softreset_complete(struct omap_hwmod *oh)
 492 {
 493         struct omap_hwmod_class_sysconfig *sysc;
 494         u32 softrst_mask;
 495         int c = 0;
 496 
 497         sysc = oh->class->sysc;
 498 
 499         if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
 500                 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
 501                                    & SYSS_RESETDONE_MASK),
 502                                   MAX_MODULE_SOFTRESET_WAIT, c);
 503         else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
 504                 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
 505                 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
 506                                     & softrst_mask),
 507                                   MAX_MODULE_SOFTRESET_WAIT, c);
 508         }
 509 
 510         return c;
 511 }
 512 
 513 /**
 514  * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
 515  * @oh: struct omap_hwmod *
 516  *
 517  * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
 518  * of some modules. When the DMA must perform read/write accesses, the
 519  * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
 520  * for power management, software must set the DMADISABLE bit back to 1.
 521  *
 522  * Set the DMADISABLE bit in @v for hwmod @oh.  Returns -EINVAL upon
 523  * error or 0 upon success.
 524  */
 525 static int _set_dmadisable(struct omap_hwmod *oh)
 526 {
 527         u32 v;
 528         u32 dmadisable_mask;
 529 
 530         if (!oh->class->sysc ||
 531             !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
 532                 return -EINVAL;
 533 
 534         if (!oh->class->sysc->sysc_fields) {
 535                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 536                 return -EINVAL;
 537         }
 538 
 539         /* clocks must be on for this operation */
 540         if (oh->_state != _HWMOD_STATE_ENABLED) {
 541                 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
 542                 return -EINVAL;
 543         }
 544 
 545         pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
 546 
 547         v = oh->_sysc_cache;
 548         dmadisable_mask =
 549                 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
 550         v |= dmadisable_mask;
 551         _write_sysconfig(v, oh);
 552 
 553         return 0;
 554 }
 555 
 556 /**
 557  * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
 558  * @oh: struct omap_hwmod *
 559  * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
 560  * @v: pointer to register contents to modify
 561  *
 562  * Update the module autoidle bit in @v to be @autoidle for the @oh
 563  * hwmod.  The autoidle bit controls whether the module can gate
 564  * internal clocks automatically when it isn't doing anything; the
 565  * exact function of this bit varies on a per-module basis.  This
 566  * function does not write to the hardware.  Returns -EINVAL upon
 567  * error or 0 upon success.
 568  */
 569 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
 570                                 u32 *v)
 571 {
 572         u32 autoidle_mask;
 573         u8 autoidle_shift;
 574 
 575         if (!oh->class->sysc ||
 576             !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
 577                 return -EINVAL;
 578 
 579         if (!oh->class->sysc->sysc_fields) {
 580                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 581                 return -EINVAL;
 582         }
 583 
 584         autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
 585         autoidle_mask = (0x1 << autoidle_shift);
 586 
 587         *v &= ~autoidle_mask;
 588         *v |= autoidle << autoidle_shift;
 589 
 590         return 0;
 591 }
 592 
 593 /**
 594  * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
 595  * @oh: struct omap_hwmod *
 596  *
 597  * Allow the hardware module @oh to send wakeups.  Returns -EINVAL
 598  * upon error or 0 upon success.
 599  */
 600 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
 601 {
 602         if (!oh->class->sysc ||
 603             !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
 604               (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
 605               (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
 606                 return -EINVAL;
 607 
 608         if (!oh->class->sysc->sysc_fields) {
 609                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 610                 return -EINVAL;
 611         }
 612 
 613         if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
 614                 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
 615 
 616         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
 617                 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
 618         if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
 619                 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
 620 
 621         /* XXX test pwrdm_get_wken for this hwmod's subsystem */
 622 
 623         return 0;
 624 }
 625 
 626 /**
 627  * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
 628  * @oh: struct omap_hwmod *
 629  *
 630  * Prevent the hardware module @oh to send wakeups.  Returns -EINVAL
 631  * upon error or 0 upon success.
 632  */
 633 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
 634 {
 635         if (!oh->class->sysc ||
 636             !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
 637               (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
 638               (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
 639                 return -EINVAL;
 640 
 641         if (!oh->class->sysc->sysc_fields) {
 642                 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
 643                 return -EINVAL;
 644         }
 645 
 646         if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
 647                 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
 648 
 649         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
 650                 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
 651         if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
 652                 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
 653 
 654         /* XXX test pwrdm_get_wken for this hwmod's subsystem */
 655 
 656         return 0;
 657 }
 658 
 659 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
 660 {
 661         struct clk_hw_omap *clk;
 662 
 663         if (oh->clkdm) {
 664                 return oh->clkdm;
 665         } else if (oh->_clk) {
 666                 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
 667                         return NULL;
 668                 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
 669                 return clk->clkdm;
 670         }
 671         return NULL;
 672 }
 673 
 674 /**
 675  * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
 676  * @oh: struct omap_hwmod *
 677  *
 678  * Prevent the hardware module @oh from entering idle while the
 679  * hardare module initiator @init_oh is active.  Useful when a module
 680  * will be accessed by a particular initiator (e.g., if a module will
 681  * be accessed by the IVA, there should be a sleepdep between the IVA
 682  * initiator and the module).  Only applies to modules in smart-idle
 683  * mode.  If the clockdomain is marked as not needing autodeps, return
 684  * 0 without doing anything.  Otherwise, returns -EINVAL upon error or
 685  * passes along clkdm_add_sleepdep() value upon success.
 686  */
 687 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
 688 {
 689         struct clockdomain *clkdm, *init_clkdm;
 690 
 691         clkdm = _get_clkdm(oh);
 692         init_clkdm = _get_clkdm(init_oh);
 693 
 694         if (!clkdm || !init_clkdm)
 695                 return -EINVAL;
 696 
 697         if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
 698                 return 0;
 699 
 700         return clkdm_add_sleepdep(clkdm, init_clkdm);
 701 }
 702 
 703 /**
 704  * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
 705  * @oh: struct omap_hwmod *
 706  *
 707  * Allow the hardware module @oh to enter idle while the hardare
 708  * module initiator @init_oh is active.  Useful when a module will not
 709  * be accessed by a particular initiator (e.g., if a module will not
 710  * be accessed by the IVA, there should be no sleepdep between the IVA
 711  * initiator and the module).  Only applies to modules in smart-idle
 712  * mode.  If the clockdomain is marked as not needing autodeps, return
 713  * 0 without doing anything.  Returns -EINVAL upon error or passes
 714  * along clkdm_del_sleepdep() value upon success.
 715  */
 716 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
 717 {
 718         struct clockdomain *clkdm, *init_clkdm;
 719 
 720         clkdm = _get_clkdm(oh);
 721         init_clkdm = _get_clkdm(init_oh);
 722 
 723         if (!clkdm || !init_clkdm)
 724                 return -EINVAL;
 725 
 726         if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
 727                 return 0;
 728 
 729         return clkdm_del_sleepdep(clkdm, init_clkdm);
 730 }
 731 
 732 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
 733         { .compatible = "ti,clkctrl" },
 734         { }
 735 };
 736 
 737 static int __init _setup_clkctrl_provider(struct device_node *np)
 738 {
 739         const __be32 *addrp;
 740         struct clkctrl_provider *provider;
 741         u64 size;
 742         int i;
 743 
 744         provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
 745         if (!provider)
 746                 return -ENOMEM;
 747 
 748         provider->node = np;
 749 
 750         provider->num_addrs =
 751                 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
 752 
 753         provider->addr =
 754                 memblock_alloc(sizeof(void *) * provider->num_addrs,
 755                                SMP_CACHE_BYTES);
 756         if (!provider->addr)
 757                 return -ENOMEM;
 758 
 759         provider->size =
 760                 memblock_alloc(sizeof(u32) * provider->num_addrs,
 761                                SMP_CACHE_BYTES);
 762         if (!provider->size)
 763                 return -ENOMEM;
 764 
 765         for (i = 0; i < provider->num_addrs; i++) {
 766                 addrp = of_get_address(np, i, &size, NULL);
 767                 provider->addr[i] = (u32)of_translate_address(np, addrp);
 768                 provider->size[i] = size;
 769                 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
 770                          provider->addr[i] + provider->size[i]);
 771         }
 772 
 773         list_add(&provider->link, &clkctrl_providers);
 774 
 775         return 0;
 776 }
 777 
 778 static int __init _init_clkctrl_providers(void)
 779 {
 780         struct device_node *np;
 781         int ret = 0;
 782 
 783         for_each_matching_node(np, ti_clkctrl_match_table) {
 784                 ret = _setup_clkctrl_provider(np);
 785                 if (ret)
 786                         break;
 787         }
 788 
 789         return ret;
 790 }
 791 
 792 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
 793 {
 794         if (!oh->prcm.omap4.modulemode)
 795                 return 0;
 796 
 797         return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
 798                                      oh->clkdm->cm_inst,
 799                                      oh->prcm.omap4.clkctrl_offs);
 800 }
 801 
 802 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
 803 {
 804         struct clkctrl_provider *provider;
 805         struct clk *clk;
 806         u32 addr;
 807 
 808         if (!soc_ops.xlate_clkctrl)
 809                 return NULL;
 810 
 811         addr = soc_ops.xlate_clkctrl(oh);
 812         if (!addr)
 813                 return NULL;
 814 
 815         pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
 816 
 817         list_for_each_entry(provider, &clkctrl_providers, link) {
 818                 int i;
 819 
 820                 for (i = 0; i < provider->num_addrs; i++) {
 821                         if (provider->addr[i] <= addr &&
 822                             provider->addr[i] + provider->size[i] > addr) {
 823                                 struct of_phandle_args clkspec;
 824 
 825                                 clkspec.np = provider->node;
 826                                 clkspec.args_count = 2;
 827                                 clkspec.args[0] = addr - provider->addr[0];
 828                                 clkspec.args[1] = 0;
 829 
 830                                 clk = of_clk_get_from_provider(&clkspec);
 831 
 832                                 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
 833                                          __func__, oh->name, clk,
 834                                          clkspec.args[0], provider->node);
 835 
 836                                 return clk;
 837                         }
 838                 }
 839         }
 840 
 841         return NULL;
 842 }
 843 
 844 /**
 845  * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
 846  * @oh: struct omap_hwmod *
 847  *
 848  * Called from _init_clocks().  Populates the @oh _clk (main
 849  * functional clock pointer) if a clock matching the hwmod name is found,
 850  * or a main_clk is present.  Returns 0 on success or -EINVAL on error.
 851  */
 852 static int _init_main_clk(struct omap_hwmod *oh)
 853 {
 854         int ret = 0;
 855         struct clk *clk = NULL;
 856 
 857         clk = _lookup_clkctrl_clk(oh);
 858 
 859         if (!IS_ERR_OR_NULL(clk)) {
 860                 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
 861                          __clk_get_name(clk), oh->name);
 862                 oh->main_clk = __clk_get_name(clk);
 863                 oh->_clk = clk;
 864                 soc_ops.disable_direct_prcm(oh);
 865         } else {
 866                 if (!oh->main_clk)
 867                         return 0;
 868 
 869                 oh->_clk = clk_get(NULL, oh->main_clk);
 870         }
 871 
 872         if (IS_ERR(oh->_clk)) {
 873                 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
 874                         oh->name, oh->main_clk);
 875                 return -EINVAL;
 876         }
 877         /*
 878          * HACK: This needs a re-visit once clk_prepare() is implemented
 879          * to do something meaningful. Today its just a no-op.
 880          * If clk_prepare() is used at some point to do things like
 881          * voltage scaling etc, then this would have to be moved to
 882          * some point where subsystems like i2c and pmic become
 883          * available.
 884          */
 885         clk_prepare(oh->_clk);
 886 
 887         if (!_get_clkdm(oh))
 888                 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
 889                            oh->name, oh->main_clk);
 890 
 891         return ret;
 892 }
 893 
 894 /**
 895  * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
 896  * @oh: struct omap_hwmod *
 897  *
 898  * Called from _init_clocks().  Populates the @oh OCP slave interface
 899  * clock pointers.  Returns 0 on success or -EINVAL on error.
 900  */
 901 static int _init_interface_clks(struct omap_hwmod *oh)
 902 {
 903         struct omap_hwmod_ocp_if *os;
 904         struct clk *c;
 905         int ret = 0;
 906 
 907         list_for_each_entry(os, &oh->slave_ports, node) {
 908                 if (!os->clk)
 909                         continue;
 910 
 911                 c = clk_get(NULL, os->clk);
 912                 if (IS_ERR(c)) {
 913                         pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
 914                                 oh->name, os->clk);
 915                         ret = -EINVAL;
 916                         continue;
 917                 }
 918                 os->_clk = c;
 919                 /*
 920                  * HACK: This needs a re-visit once clk_prepare() is implemented
 921                  * to do something meaningful. Today its just a no-op.
 922                  * If clk_prepare() is used at some point to do things like
 923                  * voltage scaling etc, then this would have to be moved to
 924                  * some point where subsystems like i2c and pmic become
 925                  * available.
 926                  */
 927                 clk_prepare(os->_clk);
 928         }
 929 
 930         return ret;
 931 }
 932 
 933 /**
 934  * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
 935  * @oh: struct omap_hwmod *
 936  *
 937  * Called from _init_clocks().  Populates the @oh omap_hwmod_opt_clk
 938  * clock pointers.  Returns 0 on success or -EINVAL on error.
 939  */
 940 static int _init_opt_clks(struct omap_hwmod *oh)
 941 {
 942         struct omap_hwmod_opt_clk *oc;
 943         struct clk *c;
 944         int i;
 945         int ret = 0;
 946 
 947         for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
 948                 c = clk_get(NULL, oc->clk);
 949                 if (IS_ERR(c)) {
 950                         pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
 951                                 oh->name, oc->clk);
 952                         ret = -EINVAL;
 953                         continue;
 954                 }
 955                 oc->_clk = c;
 956                 /*
 957                  * HACK: This needs a re-visit once clk_prepare() is implemented
 958                  * to do something meaningful. Today its just a no-op.
 959                  * If clk_prepare() is used at some point to do things like
 960                  * voltage scaling etc, then this would have to be moved to
 961                  * some point where subsystems like i2c and pmic become
 962                  * available.
 963                  */
 964                 clk_prepare(oc->_clk);
 965         }
 966 
 967         return ret;
 968 }
 969 
 970 static void _enable_optional_clocks(struct omap_hwmod *oh)
 971 {
 972         struct omap_hwmod_opt_clk *oc;
 973         int i;
 974 
 975         pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
 976 
 977         for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
 978                 if (oc->_clk) {
 979                         pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
 980                                  __clk_get_name(oc->_clk));
 981                         clk_enable(oc->_clk);
 982                 }
 983 }
 984 
 985 static void _disable_optional_clocks(struct omap_hwmod *oh)
 986 {
 987         struct omap_hwmod_opt_clk *oc;
 988         int i;
 989 
 990         pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
 991 
 992         for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
 993                 if (oc->_clk) {
 994                         pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
 995                                  __clk_get_name(oc->_clk));
 996                         clk_disable(oc->_clk);
 997                 }
 998 }
 999 
1000 /**
1001  * _enable_clocks - enable hwmod main clock and interface clocks
1002  * @oh: struct omap_hwmod *
1003  *
1004  * Enables all clocks necessary for register reads and writes to succeed
1005  * on the hwmod @oh.  Returns 0.
1006  */
1007 static int _enable_clocks(struct omap_hwmod *oh)
1008 {
1009         struct omap_hwmod_ocp_if *os;
1010 
1011         pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
1012 
1013         if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1014                 _enable_optional_clocks(oh);
1015 
1016         if (oh->_clk)
1017                 clk_enable(oh->_clk);
1018 
1019         list_for_each_entry(os, &oh->slave_ports, node) {
1020                 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1021                         omap2_clk_deny_idle(os->_clk);
1022                         clk_enable(os->_clk);
1023                 }
1024         }
1025 
1026         /* The opt clocks are controlled by the device driver. */
1027 
1028         return 0;
1029 }
1030 
1031 /**
1032  * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1033  * @oh: struct omap_hwmod *
1034  */
1035 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1036 {
1037         if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1038                 return true;
1039 
1040         return false;
1041 }
1042 
1043 /**
1044  * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1045  * @oh: struct omap_hwmod *
1046  */
1047 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1048 {
1049         if (oh->prcm.omap4.clkctrl_offs)
1050                 return true;
1051 
1052         if (!oh->prcm.omap4.clkctrl_offs &&
1053             oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1054                 return true;
1055 
1056         return false;
1057 }
1058 
1059 /**
1060  * _disable_clocks - disable hwmod main clock and interface clocks
1061  * @oh: struct omap_hwmod *
1062  *
1063  * Disables the hwmod @oh main functional and interface clocks.  Returns 0.
1064  */
1065 static int _disable_clocks(struct omap_hwmod *oh)
1066 {
1067         struct omap_hwmod_ocp_if *os;
1068 
1069         pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1070 
1071         if (oh->_clk)
1072                 clk_disable(oh->_clk);
1073 
1074         list_for_each_entry(os, &oh->slave_ports, node) {
1075                 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1076                         clk_disable(os->_clk);
1077                         omap2_clk_allow_idle(os->_clk);
1078                 }
1079         }
1080 
1081         if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1082                 _disable_optional_clocks(oh);
1083 
1084         /* The opt clocks are controlled by the device driver. */
1085 
1086         return 0;
1087 }
1088 
1089 /**
1090  * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1091  * @oh: struct omap_hwmod *
1092  *
1093  * Enables the PRCM module mode related to the hwmod @oh.
1094  * No return value.
1095  */
1096 static void _omap4_enable_module(struct omap_hwmod *oh)
1097 {
1098         if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1099             _omap4_clkctrl_managed_by_clkfwk(oh))
1100                 return;
1101 
1102         pr_debug("omap_hwmod: %s: %s: %d\n",
1103                  oh->name, __func__, oh->prcm.omap4.modulemode);
1104 
1105         omap_cm_module_enable(oh->prcm.omap4.modulemode,
1106                               oh->clkdm->prcm_partition,
1107                               oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1108 }
1109 
1110 /**
1111  * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1112  * @oh: struct omap_hwmod *
1113  *
1114  * Wait for a module @oh to enter slave idle.  Returns 0 if the module
1115  * does not have an IDLEST bit or if the module successfully enters
1116  * slave idle; otherwise, pass along the return value of the
1117  * appropriate *_cm*_wait_module_idle() function.
1118  */
1119 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1120 {
1121         if (!oh)
1122                 return -EINVAL;
1123 
1124         if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1125                 return 0;
1126 
1127         if (oh->flags & HWMOD_NO_IDLEST)
1128                 return 0;
1129 
1130         if (_omap4_clkctrl_managed_by_clkfwk(oh))
1131                 return 0;
1132 
1133         if (!_omap4_has_clkctrl_clock(oh))
1134                 return 0;
1135 
1136         return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1137                                         oh->clkdm->cm_inst,
1138                                         oh->prcm.omap4.clkctrl_offs, 0);
1139 }
1140 
1141 /**
1142  * _save_mpu_port_index - find and save the index to @oh's MPU port
1143  * @oh: struct omap_hwmod *
1144  *
1145  * Determines the array index of the OCP slave port that the MPU uses
1146  * to address the device, and saves it into the struct omap_hwmod.
1147  * Intended to be called during hwmod registration only. No return
1148  * value.
1149  */
1150 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1151 {
1152         struct omap_hwmod_ocp_if *os = NULL;
1153 
1154         if (!oh)
1155                 return;
1156 
1157         oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1158 
1159         list_for_each_entry(os, &oh->slave_ports, node) {
1160                 if (os->user & OCP_USER_MPU) {
1161                         oh->_mpu_port = os;
1162                         oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1163                         break;
1164                 }
1165         }
1166 
1167         return;
1168 }
1169 
1170 /**
1171  * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1172  * @oh: struct omap_hwmod *
1173  *
1174  * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1175  * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1176  * communicate with the IP block.  This interface need not be directly
1177  * connected to the MPU (and almost certainly is not), but is directly
1178  * connected to the IP block represented by @oh.  Returns a pointer
1179  * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1180  * error or if there does not appear to be a path from the MPU to this
1181  * IP block.
1182  */
1183 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1184 {
1185         if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1186                 return NULL;
1187 
1188         return oh->_mpu_port;
1189 };
1190 
1191 /**
1192  * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1193  * @oh: struct omap_hwmod *
1194  *
1195  * Ensure that the OCP_SYSCONFIG register for the IP block represented
1196  * by @oh is set to indicate to the PRCM that the IP block is active.
1197  * Usually this means placing the module into smart-idle mode and
1198  * smart-standby, but if there is a bug in the automatic idle handling
1199  * for the IP block, it may need to be placed into the force-idle or
1200  * no-idle variants of these modes.  No return value.
1201  */
1202 static void _enable_sysc(struct omap_hwmod *oh)
1203 {
1204         u8 idlemode, sf;
1205         u32 v;
1206         bool clkdm_act;
1207         struct clockdomain *clkdm;
1208 
1209         if (!oh->class->sysc)
1210                 return;
1211 
1212         /*
1213          * Wait until reset has completed, this is needed as the IP
1214          * block is reset automatically by hardware in some cases
1215          * (off-mode for example), and the drivers require the
1216          * IP to be ready when they access it
1217          */
1218         if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1219                 _enable_optional_clocks(oh);
1220         _wait_softreset_complete(oh);
1221         if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1222                 _disable_optional_clocks(oh);
1223 
1224         v = oh->_sysc_cache;
1225         sf = oh->class->sysc->sysc_flags;
1226 
1227         clkdm = _get_clkdm(oh);
1228         if (sf & SYSC_HAS_SIDLEMODE) {
1229                 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1230                     oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1231                         idlemode = HWMOD_IDLEMODE_NO;
1232                 } else {
1233                         if (sf & SYSC_HAS_ENAWAKEUP)
1234                                 _enable_wakeup(oh, &v);
1235                         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1236                                 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1237                         else
1238                                 idlemode = HWMOD_IDLEMODE_SMART;
1239                 }
1240 
1241                 /*
1242                  * This is special handling for some IPs like
1243                  * 32k sync timer. Force them to idle!
1244                  */
1245                 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1246                 if (clkdm_act && !(oh->class->sysc->idlemodes &
1247                                    (SIDLE_SMART | SIDLE_SMART_WKUP)))
1248                         idlemode = HWMOD_IDLEMODE_FORCE;
1249 
1250                 _set_slave_idlemode(oh, idlemode, &v);
1251         }
1252 
1253         if (sf & SYSC_HAS_MIDLEMODE) {
1254                 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1255                         idlemode = HWMOD_IDLEMODE_FORCE;
1256                 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1257                         idlemode = HWMOD_IDLEMODE_NO;
1258                 } else {
1259                         if (sf & SYSC_HAS_ENAWAKEUP)
1260                                 _enable_wakeup(oh, &v);
1261                         if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1262                                 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1263                         else
1264                                 idlemode = HWMOD_IDLEMODE_SMART;
1265                 }
1266                 _set_master_standbymode(oh, idlemode, &v);
1267         }
1268 
1269         /*
1270          * XXX The clock framework should handle this, by
1271          * calling into this code.  But this must wait until the
1272          * clock structures are tagged with omap_hwmod entries
1273          */
1274         if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1275             (sf & SYSC_HAS_CLOCKACTIVITY))
1276                 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1277 
1278         _write_sysconfig(v, oh);
1279 
1280         /*
1281          * Set the autoidle bit only after setting the smartidle bit
1282          * Setting this will not have any impact on the other modules.
1283          */
1284         if (sf & SYSC_HAS_AUTOIDLE) {
1285                 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1286                         0 : 1;
1287                 _set_module_autoidle(oh, idlemode, &v);
1288                 _write_sysconfig(v, oh);
1289         }
1290 }
1291 
1292 /**
1293  * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1294  * @oh: struct omap_hwmod *
1295  *
1296  * If module is marked as SWSUP_SIDLE, force the module into slave
1297  * idle; otherwise, configure it for smart-idle.  If module is marked
1298  * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1299  * configure it for smart-standby.  No return value.
1300  */
1301 static void _idle_sysc(struct omap_hwmod *oh)
1302 {
1303         u8 idlemode, sf;
1304         u32 v;
1305 
1306         if (!oh->class->sysc)
1307                 return;
1308 
1309         v = oh->_sysc_cache;
1310         sf = oh->class->sysc->sysc_flags;
1311 
1312         if (sf & SYSC_HAS_SIDLEMODE) {
1313                 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1314                         idlemode = HWMOD_IDLEMODE_FORCE;
1315                 } else {
1316                         if (sf & SYSC_HAS_ENAWAKEUP)
1317                                 _enable_wakeup(oh, &v);
1318                         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1319                                 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1320                         else
1321                                 idlemode = HWMOD_IDLEMODE_SMART;
1322                 }
1323                 _set_slave_idlemode(oh, idlemode, &v);
1324         }
1325 
1326         if (sf & SYSC_HAS_MIDLEMODE) {
1327                 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1328                     (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1329                         idlemode = HWMOD_IDLEMODE_FORCE;
1330                 } else {
1331                         if (sf & SYSC_HAS_ENAWAKEUP)
1332                                 _enable_wakeup(oh, &v);
1333                         if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1334                                 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1335                         else
1336                                 idlemode = HWMOD_IDLEMODE_SMART;
1337                 }
1338                 _set_master_standbymode(oh, idlemode, &v);
1339         }
1340 
1341         /* If the cached value is the same as the new value, skip the write */
1342         if (oh->_sysc_cache != v)
1343                 _write_sysconfig(v, oh);
1344 }
1345 
1346 /**
1347  * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1348  * @oh: struct omap_hwmod *
1349  *
1350  * Force the module into slave idle and master suspend. No return
1351  * value.
1352  */
1353 static void _shutdown_sysc(struct omap_hwmod *oh)
1354 {
1355         u32 v;
1356         u8 sf;
1357 
1358         if (!oh->class->sysc)
1359                 return;
1360 
1361         v = oh->_sysc_cache;
1362         sf = oh->class->sysc->sysc_flags;
1363 
1364         if (sf & SYSC_HAS_SIDLEMODE)
1365                 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1366 
1367         if (sf & SYSC_HAS_MIDLEMODE)
1368                 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1369 
1370         if (sf & SYSC_HAS_AUTOIDLE)
1371                 _set_module_autoidle(oh, 1, &v);
1372 
1373         _write_sysconfig(v, oh);
1374 }
1375 
1376 /**
1377  * _lookup - find an omap_hwmod by name
1378  * @name: find an omap_hwmod by name
1379  *
1380  * Return a pointer to an omap_hwmod by name, or NULL if not found.
1381  */
1382 static struct omap_hwmod *_lookup(const char *name)
1383 {
1384         struct omap_hwmod *oh, *temp_oh;
1385 
1386         oh = NULL;
1387 
1388         list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1389                 if (!strcmp(name, temp_oh->name)) {
1390                         oh = temp_oh;
1391                         break;
1392                 }
1393         }
1394 
1395         return oh;
1396 }
1397 
1398 /**
1399  * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1400  * @oh: struct omap_hwmod *
1401  *
1402  * Convert a clockdomain name stored in a struct omap_hwmod into a
1403  * clockdomain pointer, and save it into the struct omap_hwmod.
1404  * Return -EINVAL if the clkdm_name lookup failed.
1405  */
1406 static int _init_clkdm(struct omap_hwmod *oh)
1407 {
1408         if (!oh->clkdm_name) {
1409                 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1410                 return 0;
1411         }
1412 
1413         oh->clkdm = clkdm_lookup(oh->clkdm_name);
1414         if (!oh->clkdm) {
1415                 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1416                         oh->name, oh->clkdm_name);
1417                 return 0;
1418         }
1419 
1420         pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1421                 oh->name, oh->clkdm_name);
1422 
1423         return 0;
1424 }
1425 
1426 /**
1427  * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1428  * well the clockdomain.
1429  * @oh: struct omap_hwmod *
1430  * @np: device_node mapped to this hwmod
1431  *
1432  * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1433  * Resolves all clock names embedded in the hwmod.  Returns 0 on
1434  * success, or a negative error code on failure.
1435  */
1436 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1437 {
1438         int ret = 0;
1439 
1440         if (oh->_state != _HWMOD_STATE_REGISTERED)
1441                 return 0;
1442 
1443         pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1444 
1445         if (soc_ops.init_clkdm)
1446                 ret |= soc_ops.init_clkdm(oh);
1447 
1448         ret |= _init_main_clk(oh);
1449         ret |= _init_interface_clks(oh);
1450         ret |= _init_opt_clks(oh);
1451 
1452         if (!ret)
1453                 oh->_state = _HWMOD_STATE_CLKS_INITED;
1454         else
1455                 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1456 
1457         return ret;
1458 }
1459 
1460 /**
1461  * _lookup_hardreset - fill register bit info for this hwmod/reset line
1462  * @oh: struct omap_hwmod *
1463  * @name: name of the reset line in the context of this hwmod
1464  * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1465  *
1466  * Return the bit position of the reset line that match the
1467  * input name. Return -ENOENT if not found.
1468  */
1469 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1470                              struct omap_hwmod_rst_info *ohri)
1471 {
1472         int i;
1473 
1474         for (i = 0; i < oh->rst_lines_cnt; i++) {
1475                 const char *rst_line = oh->rst_lines[i].name;
1476                 if (!strcmp(rst_line, name)) {
1477                         ohri->rst_shift = oh->rst_lines[i].rst_shift;
1478                         ohri->st_shift = oh->rst_lines[i].st_shift;
1479                         pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1480                                  oh->name, __func__, rst_line, ohri->rst_shift,
1481                                  ohri->st_shift);
1482 
1483                         return 0;
1484                 }
1485         }
1486 
1487         return -ENOENT;
1488 }
1489 
1490 /**
1491  * _assert_hardreset - assert the HW reset line of submodules
1492  * contained in the hwmod module.
1493  * @oh: struct omap_hwmod *
1494  * @name: name of the reset line to lookup and assert
1495  *
1496  * Some IP like dsp, ipu or iva contain processor that require an HW
1497  * reset line to be assert / deassert in order to enable fully the IP.
1498  * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1499  * asserting the hardreset line on the currently-booted SoC, or passes
1500  * along the return value from _lookup_hardreset() or the SoC's
1501  * assert_hardreset code.
1502  */
1503 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1504 {
1505         struct omap_hwmod_rst_info ohri;
1506         int ret = -EINVAL;
1507 
1508         if (!oh)
1509                 return -EINVAL;
1510 
1511         if (!soc_ops.assert_hardreset)
1512                 return -ENOSYS;
1513 
1514         ret = _lookup_hardreset(oh, name, &ohri);
1515         if (ret < 0)
1516                 return ret;
1517 
1518         ret = soc_ops.assert_hardreset(oh, &ohri);
1519 
1520         return ret;
1521 }
1522 
1523 /**
1524  * _deassert_hardreset - deassert the HW reset line of submodules contained
1525  * in the hwmod module.
1526  * @oh: struct omap_hwmod *
1527  * @name: name of the reset line to look up and deassert
1528  *
1529  * Some IP like dsp, ipu or iva contain processor that require an HW
1530  * reset line to be assert / deassert in order to enable fully the IP.
1531  * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1532  * deasserting the hardreset line on the currently-booted SoC, or passes
1533  * along the return value from _lookup_hardreset() or the SoC's
1534  * deassert_hardreset code.
1535  */
1536 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1537 {
1538         struct omap_hwmod_rst_info ohri;
1539         int ret = -EINVAL;
1540 
1541         if (!oh)
1542                 return -EINVAL;
1543 
1544         if (!soc_ops.deassert_hardreset)
1545                 return -ENOSYS;
1546 
1547         ret = _lookup_hardreset(oh, name, &ohri);
1548         if (ret < 0)
1549                 return ret;
1550 
1551         if (oh->clkdm) {
1552                 /*
1553                  * A clockdomain must be in SW_SUP otherwise reset
1554                  * might not be completed. The clockdomain can be set
1555                  * in HW_AUTO only when the module become ready.
1556                  */
1557                 clkdm_deny_idle(oh->clkdm);
1558                 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1559                 if (ret) {
1560                         WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1561                              oh->name, oh->clkdm->name, ret);
1562                         return ret;
1563                 }
1564         }
1565 
1566         _enable_clocks(oh);
1567         if (soc_ops.enable_module)
1568                 soc_ops.enable_module(oh);
1569 
1570         ret = soc_ops.deassert_hardreset(oh, &ohri);
1571 
1572         if (soc_ops.disable_module)
1573                 soc_ops.disable_module(oh);
1574         _disable_clocks(oh);
1575 
1576         if (ret == -EBUSY)
1577                 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1578 
1579         if (oh->clkdm) {
1580                 /*
1581                  * Set the clockdomain to HW_AUTO, assuming that the
1582                  * previous state was HW_AUTO.
1583                  */
1584                 clkdm_allow_idle(oh->clkdm);
1585 
1586                 clkdm_hwmod_disable(oh->clkdm, oh);
1587         }
1588 
1589         return ret;
1590 }
1591 
1592 /**
1593  * _read_hardreset - read the HW reset line state of submodules
1594  * contained in the hwmod module
1595  * @oh: struct omap_hwmod *
1596  * @name: name of the reset line to look up and read
1597  *
1598  * Return the state of the reset line.  Returns -EINVAL if @oh is
1599  * null, -ENOSYS if we have no way of reading the hardreset line
1600  * status on the currently-booted SoC, or passes along the return
1601  * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1602  * code.
1603  */
1604 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1605 {
1606         struct omap_hwmod_rst_info ohri;
1607         int ret = -EINVAL;
1608 
1609         if (!oh)
1610                 return -EINVAL;
1611 
1612         if (!soc_ops.is_hardreset_asserted)
1613                 return -ENOSYS;
1614 
1615         ret = _lookup_hardreset(oh, name, &ohri);
1616         if (ret < 0)
1617                 return ret;
1618 
1619         return soc_ops.is_hardreset_asserted(oh, &ohri);
1620 }
1621 
1622 /**
1623  * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1624  * @oh: struct omap_hwmod *
1625  *
1626  * If all hardreset lines associated with @oh are asserted, then return true.
1627  * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1628  * associated with @oh are asserted, then return false.
1629  * This function is used to avoid executing some parts of the IP block
1630  * enable/disable sequence if its hardreset line is set.
1631  */
1632 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1633 {
1634         int i, rst_cnt = 0;
1635 
1636         if (oh->rst_lines_cnt == 0)
1637                 return false;
1638 
1639         for (i = 0; i < oh->rst_lines_cnt; i++)
1640                 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1641                         rst_cnt++;
1642 
1643         if (oh->rst_lines_cnt == rst_cnt)
1644                 return true;
1645 
1646         return false;
1647 }
1648 
1649 /**
1650  * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1651  * hard-reset
1652  * @oh: struct omap_hwmod *
1653  *
1654  * If any hardreset lines associated with @oh are asserted, then
1655  * return true.  Otherwise, if no hardreset lines associated with @oh
1656  * are asserted, or if @oh has no hardreset lines, then return false.
1657  * This function is used to avoid executing some parts of the IP block
1658  * enable/disable sequence if any hardreset line is set.
1659  */
1660 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1661 {
1662         int rst_cnt = 0;
1663         int i;
1664 
1665         for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1666                 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1667                         rst_cnt++;
1668 
1669         return (rst_cnt) ? true : false;
1670 }
1671 
1672 /**
1673  * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1674  * @oh: struct omap_hwmod *
1675  *
1676  * Disable the PRCM module mode related to the hwmod @oh.
1677  * Return EINVAL if the modulemode is not supported and 0 in case of success.
1678  */
1679 static int _omap4_disable_module(struct omap_hwmod *oh)
1680 {
1681         int v;
1682 
1683         if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1684             _omap4_clkctrl_managed_by_clkfwk(oh))
1685                 return -EINVAL;
1686 
1687         /*
1688          * Since integration code might still be doing something, only
1689          * disable if all lines are under hardreset.
1690          */
1691         if (_are_any_hardreset_lines_asserted(oh))
1692                 return 0;
1693 
1694         pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1695 
1696         omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1697                                oh->prcm.omap4.clkctrl_offs);
1698 
1699         v = _omap4_wait_target_disable(oh);
1700         if (v)
1701                 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1702                         oh->name);
1703 
1704         return 0;
1705 }
1706 
1707 /**
1708  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1709  * @oh: struct omap_hwmod *
1710  *
1711  * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit.  hwmod must be
1712  * enabled for this to work.  Returns -ENOENT if the hwmod cannot be
1713  * reset this way, -EINVAL if the hwmod is in the wrong state,
1714  * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1715  *
1716  * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1717  * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1718  * use the SYSCONFIG softreset bit to provide the status.
1719  *
1720  * Note that some IP like McBSP do have reset control but don't have
1721  * reset status.
1722  */
1723 static int _ocp_softreset(struct omap_hwmod *oh)
1724 {
1725         u32 v;
1726         int c = 0;
1727         int ret = 0;
1728 
1729         if (!oh->class->sysc ||
1730             !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1731                 return -ENOENT;
1732 
1733         /* clocks must be on for this operation */
1734         if (oh->_state != _HWMOD_STATE_ENABLED) {
1735                 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1736                         oh->name);
1737                 return -EINVAL;
1738         }
1739 
1740         /* For some modules, all optionnal clocks need to be enabled as well */
1741         if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1742                 _enable_optional_clocks(oh);
1743 
1744         pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1745 
1746         v = oh->_sysc_cache;
1747         ret = _set_softreset(oh, &v);
1748         if (ret)
1749                 goto dis_opt_clks;
1750 
1751         _write_sysconfig(v, oh);
1752 
1753         if (oh->class->sysc->srst_udelay)
1754                 udelay(oh->class->sysc->srst_udelay);
1755 
1756         c = _wait_softreset_complete(oh);
1757         if (c == MAX_MODULE_SOFTRESET_WAIT) {
1758                 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1759                         oh->name, MAX_MODULE_SOFTRESET_WAIT);
1760                 ret = -ETIMEDOUT;
1761                 goto dis_opt_clks;
1762         } else {
1763                 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1764         }
1765 
1766         ret = _clear_softreset(oh, &v);
1767         if (ret)
1768                 goto dis_opt_clks;
1769 
1770         _write_sysconfig(v, oh);
1771 
1772         /*
1773          * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1774          * _wait_target_ready() or _reset()
1775          */
1776 
1777 dis_opt_clks:
1778         if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1779                 _disable_optional_clocks(oh);
1780 
1781         return ret;
1782 }
1783 
1784 /**
1785  * _reset - reset an omap_hwmod
1786  * @oh: struct omap_hwmod *
1787  *
1788  * Resets an omap_hwmod @oh.  If the module has a custom reset
1789  * function pointer defined, then call it to reset the IP block, and
1790  * pass along its return value to the caller.  Otherwise, if the IP
1791  * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1792  * associated with it, call a function to reset the IP block via that
1793  * method, and pass along the return value to the caller.  Finally, if
1794  * the IP block has some hardreset lines associated with it, assert
1795  * all of those, but do _not_ deassert them. (This is because driver
1796  * authors have expressed an apparent requirement to control the
1797  * deassertion of the hardreset lines themselves.)
1798  *
1799  * The default software reset mechanism for most OMAP IP blocks is
1800  * triggered via the OCP_SYSCONFIG.SOFTRESET bit.  However, some
1801  * hwmods cannot be reset via this method.  Some are not targets and
1802  * therefore have no OCP header registers to access.  Others (like the
1803  * IVA) have idiosyncratic reset sequences.  So for these relatively
1804  * rare cases, custom reset code can be supplied in the struct
1805  * omap_hwmod_class .reset function pointer.
1806  *
1807  * _set_dmadisable() is called to set the DMADISABLE bit so that it
1808  * does not prevent idling of the system. This is necessary for cases
1809  * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1810  * kernel without disabling dma.
1811  *
1812  * Passes along the return value from either _ocp_softreset() or the
1813  * custom reset function - these must return -EINVAL if the hwmod
1814  * cannot be reset this way or if the hwmod is in the wrong state,
1815  * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1816  */
1817 static int _reset(struct omap_hwmod *oh)
1818 {
1819         int i, r;
1820 
1821         pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1822 
1823         if (oh->class->reset) {
1824                 r = oh->class->reset(oh);
1825         } else {
1826                 if (oh->rst_lines_cnt > 0) {
1827                         for (i = 0; i < oh->rst_lines_cnt; i++)
1828                                 _assert_hardreset(oh, oh->rst_lines[i].name);
1829                         return 0;
1830                 } else {
1831                         r = _ocp_softreset(oh);
1832                         if (r == -ENOENT)
1833                                 r = 0;
1834                 }
1835         }
1836 
1837         _set_dmadisable(oh);
1838 
1839         /*
1840          * OCP_SYSCONFIG bits need to be reprogrammed after a
1841          * softreset.  The _enable() function should be split to avoid
1842          * the rewrite of the OCP_SYSCONFIG register.
1843          */
1844         if (oh->class->sysc) {
1845                 _update_sysc_cache(oh);
1846                 _enable_sysc(oh);
1847         }
1848 
1849         return r;
1850 }
1851 
1852 /**
1853  * _omap4_update_context_lost - increment hwmod context loss counter if
1854  * hwmod context was lost, and clear hardware context loss reg
1855  * @oh: hwmod to check for context loss
1856  *
1857  * If the PRCM indicates that the hwmod @oh lost context, increment
1858  * our in-memory context loss counter, and clear the RM_*_CONTEXT
1859  * bits. No return value.
1860  */
1861 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1862 {
1863         if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1864                 return;
1865 
1866         if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1867                                           oh->clkdm->pwrdm.ptr->prcm_offs,
1868                                           oh->prcm.omap4.context_offs))
1869                 return;
1870 
1871         oh->prcm.omap4.context_lost_counter++;
1872         prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1873                                          oh->clkdm->pwrdm.ptr->prcm_offs,
1874                                          oh->prcm.omap4.context_offs);
1875 }
1876 
1877 /**
1878  * _omap4_get_context_lost - get context loss counter for a hwmod
1879  * @oh: hwmod to get context loss counter for
1880  *
1881  * Returns the in-memory context loss counter for a hwmod.
1882  */
1883 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1884 {
1885         return oh->prcm.omap4.context_lost_counter;
1886 }
1887 
1888 /**
1889  * _enable_preprogram - Pre-program an IP block during the _enable() process
1890  * @oh: struct omap_hwmod *
1891  *
1892  * Some IP blocks (such as AESS) require some additional programming
1893  * after enable before they can enter idle.  If a function pointer to
1894  * do so is present in the hwmod data, then call it and pass along the
1895  * return value; otherwise, return 0.
1896  */
1897 static int _enable_preprogram(struct omap_hwmod *oh)
1898 {
1899         if (!oh->class->enable_preprogram)
1900                 return 0;
1901 
1902         return oh->class->enable_preprogram(oh);
1903 }
1904 
1905 /**
1906  * _enable - enable an omap_hwmod
1907  * @oh: struct omap_hwmod *
1908  *
1909  * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1910  * register target.  Returns -EINVAL if the hwmod is in the wrong
1911  * state or passes along the return value of _wait_target_ready().
1912  */
1913 static int _enable(struct omap_hwmod *oh)
1914 {
1915         int r;
1916 
1917         pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1918 
1919         /*
1920          * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1921          * state at init.
1922          */
1923         if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1924                 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1925                 return 0;
1926         }
1927 
1928         if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1929             oh->_state != _HWMOD_STATE_IDLE &&
1930             oh->_state != _HWMOD_STATE_DISABLED) {
1931                 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1932                         oh->name);
1933                 return -EINVAL;
1934         }
1935 
1936         /*
1937          * If an IP block contains HW reset lines and all of them are
1938          * asserted, we let integration code associated with that
1939          * block handle the enable.  We've received very little
1940          * information on what those driver authors need, and until
1941          * detailed information is provided and the driver code is
1942          * posted to the public lists, this is probably the best we
1943          * can do.
1944          */
1945         if (_are_all_hardreset_lines_asserted(oh))
1946                 return 0;
1947 
1948         _add_initiator_dep(oh, mpu_oh);
1949 
1950         if (oh->clkdm) {
1951                 /*
1952                  * A clockdomain must be in SW_SUP before enabling
1953                  * completely the module. The clockdomain can be set
1954                  * in HW_AUTO only when the module become ready.
1955                  */
1956                 clkdm_deny_idle(oh->clkdm);
1957                 r = clkdm_hwmod_enable(oh->clkdm, oh);
1958                 if (r) {
1959                         WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1960                              oh->name, oh->clkdm->name, r);
1961                         return r;
1962                 }
1963         }
1964 
1965         _enable_clocks(oh);
1966         if (soc_ops.enable_module)
1967                 soc_ops.enable_module(oh);
1968         if (oh->flags & HWMOD_BLOCK_WFI)
1969                 cpu_idle_poll_ctrl(true);
1970 
1971         if (soc_ops.update_context_lost)
1972                 soc_ops.update_context_lost(oh);
1973 
1974         r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1975                 -EINVAL;
1976         if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1977                 clkdm_allow_idle(oh->clkdm);
1978 
1979         if (!r) {
1980                 oh->_state = _HWMOD_STATE_ENABLED;
1981 
1982                 /* Access the sysconfig only if the target is ready */
1983                 if (oh->class->sysc) {
1984                         if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1985                                 _update_sysc_cache(oh);
1986                         _enable_sysc(oh);
1987                 }
1988                 r = _enable_preprogram(oh);
1989         } else {
1990                 if (soc_ops.disable_module)
1991                         soc_ops.disable_module(oh);
1992                 _disable_clocks(oh);
1993                 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1994                        oh->name, r);
1995 
1996                 if (oh->clkdm)
1997                         clkdm_hwmod_disable(oh->clkdm, oh);
1998         }
1999 
2000         return r;
2001 }
2002 
2003 /**
2004  * _idle - idle an omap_hwmod
2005  * @oh: struct omap_hwmod *
2006  *
2007  * Idles an omap_hwmod @oh.  This should be called once the hwmod has
2008  * no further work.  Returns -EINVAL if the hwmod is in the wrong
2009  * state or returns 0.
2010  */
2011 static int _idle(struct omap_hwmod *oh)
2012 {
2013         if (oh->flags & HWMOD_NO_IDLE) {
2014                 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2015                 return 0;
2016         }
2017 
2018         pr_debug("omap_hwmod: %s: idling\n", oh->name);
2019 
2020         if (_are_all_hardreset_lines_asserted(oh))
2021                 return 0;
2022 
2023         if (oh->_state != _HWMOD_STATE_ENABLED) {
2024                 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2025                         oh->name);
2026                 return -EINVAL;
2027         }
2028 
2029         if (oh->class->sysc)
2030                 _idle_sysc(oh);
2031         _del_initiator_dep(oh, mpu_oh);
2032 
2033         /*
2034          * If HWMOD_CLKDM_NOAUTO is set then we don't
2035          * deny idle the clkdm again since idle was already denied
2036          * in _enable()
2037          */
2038         if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2039                 clkdm_deny_idle(oh->clkdm);
2040 
2041         if (oh->flags & HWMOD_BLOCK_WFI)
2042                 cpu_idle_poll_ctrl(false);
2043         if (soc_ops.disable_module)
2044                 soc_ops.disable_module(oh);
2045 
2046         /*
2047          * The module must be in idle mode before disabling any parents
2048          * clocks. Otherwise, the parent clock might be disabled before
2049          * the module transition is done, and thus will prevent the
2050          * transition to complete properly.
2051          */
2052         _disable_clocks(oh);
2053         if (oh->clkdm) {
2054                 clkdm_allow_idle(oh->clkdm);
2055                 clkdm_hwmod_disable(oh->clkdm, oh);
2056         }
2057 
2058         oh->_state = _HWMOD_STATE_IDLE;
2059 
2060         return 0;
2061 }
2062 
2063 /**
2064  * _shutdown - shutdown an omap_hwmod
2065  * @oh: struct omap_hwmod *
2066  *
2067  * Shut down an omap_hwmod @oh.  This should be called when the driver
2068  * used for the hwmod is removed or unloaded or if the driver is not
2069  * used by the system.  Returns -EINVAL if the hwmod is in the wrong
2070  * state or returns 0.
2071  */
2072 static int _shutdown(struct omap_hwmod *oh)
2073 {
2074         int ret, i;
2075         u8 prev_state;
2076 
2077         if (_are_all_hardreset_lines_asserted(oh))
2078                 return 0;
2079 
2080         if (oh->_state != _HWMOD_STATE_IDLE &&
2081             oh->_state != _HWMOD_STATE_ENABLED) {
2082                 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2083                         oh->name);
2084                 return -EINVAL;
2085         }
2086 
2087         pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2088 
2089         if (oh->class->pre_shutdown) {
2090                 prev_state = oh->_state;
2091                 if (oh->_state == _HWMOD_STATE_IDLE)
2092                         _enable(oh);
2093                 ret = oh->class->pre_shutdown(oh);
2094                 if (ret) {
2095                         if (prev_state == _HWMOD_STATE_IDLE)
2096                                 _idle(oh);
2097                         return ret;
2098                 }
2099         }
2100 
2101         if (oh->class->sysc) {
2102                 if (oh->_state == _HWMOD_STATE_IDLE)
2103                         _enable(oh);
2104                 _shutdown_sysc(oh);
2105         }
2106 
2107         /* clocks and deps are already disabled in idle */
2108         if (oh->_state == _HWMOD_STATE_ENABLED) {
2109                 _del_initiator_dep(oh, mpu_oh);
2110                 /* XXX what about the other system initiators here? dma, dsp */
2111                 if (oh->flags & HWMOD_BLOCK_WFI)
2112                         cpu_idle_poll_ctrl(false);
2113                 if (soc_ops.disable_module)
2114                         soc_ops.disable_module(oh);
2115                 _disable_clocks(oh);
2116                 if (oh->clkdm)
2117                         clkdm_hwmod_disable(oh->clkdm, oh);
2118         }
2119         /* XXX Should this code also force-disable the optional clocks? */
2120 
2121         for (i = 0; i < oh->rst_lines_cnt; i++)
2122                 _assert_hardreset(oh, oh->rst_lines[i].name);
2123 
2124         oh->_state = _HWMOD_STATE_DISABLED;
2125 
2126         return 0;
2127 }
2128 
2129 static int of_dev_find_hwmod(struct device_node *np,
2130                              struct omap_hwmod *oh)
2131 {
2132         int count, i, res;
2133         const char *p;
2134 
2135         count = of_property_count_strings(np, "ti,hwmods");
2136         if (count < 1)
2137                 return -ENODEV;
2138 
2139         for (i = 0; i < count; i++) {
2140                 res = of_property_read_string_index(np, "ti,hwmods",
2141                                                     i, &p);
2142                 if (res)
2143                         continue;
2144                 if (!strcmp(p, oh->name)) {
2145                         pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2146                                  np, i, oh->name);
2147                         return i;
2148                 }
2149         }
2150 
2151         return -ENODEV;
2152 }
2153 
2154 /**
2155  * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2156  * @np: struct device_node *
2157  * @oh: struct omap_hwmod *
2158  * @index: index of the entry found
2159  * @found: struct device_node * found or NULL
2160  *
2161  * Parse the dt blob and find out needed hwmod. Recursive function is
2162  * implemented to take care hierarchical dt blob parsing.
2163  * Return: Returns 0 on success, -ENODEV when not found.
2164  */
2165 static int of_dev_hwmod_lookup(struct device_node *np,
2166                                struct omap_hwmod *oh,
2167                                int *index,
2168                                struct device_node **found)
2169 {
2170         struct device_node *np0 = NULL;
2171         int res;
2172 
2173         res = of_dev_find_hwmod(np, oh);
2174         if (res >= 0) {
2175                 *found = np;
2176                 *index = res;
2177                 return 0;
2178         }
2179 
2180         for_each_child_of_node(np, np0) {
2181                 struct device_node *fc;
2182                 int i;
2183 
2184                 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2185                 if (res == 0) {
2186                         *found = fc;
2187                         *index = i;
2188                         return 0;
2189                 }
2190         }
2191 
2192         *found = NULL;
2193         *index = 0;
2194 
2195         return -ENODEV;
2196 }
2197 
2198 /**
2199  * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2200  *
2201  * @oh: struct omap_hwmod *
2202  * @np: struct device_node *
2203  *
2204  * Fix up module register offsets for modules with mpu_rt_idx.
2205  * Only needed for cpsw with interconnect target module defined
2206  * in device tree while still using legacy hwmod platform data
2207  * for rev, sysc and syss registers.
2208  *
2209  * Can be removed when all cpsw hwmod platform data has been
2210  * dropped.
2211  */
2212 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2213                                       struct device_node *np,
2214                                       struct resource *res)
2215 {
2216         struct device_node *child = NULL;
2217         int error;
2218 
2219         child = of_get_next_child(np, child);
2220         if (!child)
2221                 return;
2222 
2223         error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2224         if (error)
2225                 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2226                        __func__, error);
2227 }
2228 
2229 /**
2230  * omap_hwmod_parse_module_range - map module IO range from device tree
2231  * @oh: struct omap_hwmod *
2232  * @np: struct device_node *
2233  *
2234  * Parse the device tree range an interconnect target module provides
2235  * for it's child device IP blocks. This way we can support the old
2236  * "ti,hwmods" property with just dts data without a need for platform
2237  * data for IO resources. And we don't need all the child IP device
2238  * nodes available in the dts.
2239  */
2240 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2241                                   struct device_node *np,
2242                                   struct resource *res)
2243 {
2244         struct property *prop;
2245         const __be32 *ranges;
2246         const char *name;
2247         u32 nr_addr, nr_size;
2248         u64 base, size;
2249         int len, error;
2250 
2251         if (!res)
2252                 return -EINVAL;
2253 
2254         ranges = of_get_property(np, "ranges", &len);
2255         if (!ranges)
2256                 return -ENOENT;
2257 
2258         len /= sizeof(*ranges);
2259 
2260         if (len < 3)
2261                 return -EINVAL;
2262 
2263         of_property_for_each_string(np, "compatible", prop, name)
2264                 if (!strncmp("ti,sysc-", name, 8))
2265                         break;
2266 
2267         if (!name)
2268                 return -ENOENT;
2269 
2270         error = of_property_read_u32(np, "#address-cells", &nr_addr);
2271         if (error)
2272                 return -ENOENT;
2273 
2274         error = of_property_read_u32(np, "#size-cells", &nr_size);
2275         if (error)
2276                 return -ENOENT;
2277 
2278         if (nr_addr != 1 || nr_size != 1) {
2279                 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2280                        oh->name, np);
2281                 return -EINVAL;
2282         }
2283 
2284         ranges++;
2285         base = of_translate_address(np, ranges++);
2286         size = be32_to_cpup(ranges);
2287 
2288         pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2289                  oh->name, np, base, size);
2290 
2291         if (oh && oh->mpu_rt_idx) {
2292                 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2293 
2294                 return 0;
2295         }
2296 
2297         res->start = base;
2298         res->end = base + size - 1;
2299         res->flags = IORESOURCE_MEM;
2300 
2301         return 0;
2302 }
2303 
2304 /**
2305  * _init_mpu_rt_base - populate the virtual address for a hwmod
2306  * @oh: struct omap_hwmod * to locate the virtual address
2307  * @data: (unused, caller should pass NULL)
2308  * @index: index of the reg entry iospace in device tree
2309  * @np: struct device_node * of the IP block's device node in the DT data
2310  *
2311  * Cache the virtual address used by the MPU to access this IP block's
2312  * registers.  This address is needed early so the OCP registers that
2313  * are part of the device's address space can be ioremapped properly.
2314  *
2315  * If SYSC access is not needed, the registers will not be remapped
2316  * and non-availability of MPU access is not treated as an error.
2317  *
2318  * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2319  * -ENXIO on absent or invalid register target address space.
2320  */
2321 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2322                                     int index, struct device_node *np)
2323 {
2324         void __iomem *va_start = NULL;
2325         struct resource res;
2326         int error;
2327 
2328         if (!oh)
2329                 return -EINVAL;
2330 
2331         _save_mpu_port_index(oh);
2332 
2333         /* if we don't need sysc access we don't need to ioremap */
2334         if (!oh->class->sysc)
2335                 return 0;
2336 
2337         /* we can't continue without MPU PORT if we need sysc access */
2338         if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2339                 return -ENXIO;
2340 
2341         if (!np) {
2342                 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2343                 return -ENXIO;
2344         }
2345 
2346         /* Do we have a dts range for the interconnect target module? */
2347         error = omap_hwmod_parse_module_range(oh, np, &res);
2348         if (!error)
2349                 va_start = ioremap(res.start, resource_size(&res));
2350 
2351         /* No ranges, rely on device reg entry */
2352         if (!va_start)
2353                 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2354         if (!va_start) {
2355                 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2356                        oh->name, index, np);
2357                 return -ENXIO;
2358         }
2359 
2360         pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2361                  oh->name, va_start);
2362 
2363         oh->_mpu_rt_va = va_start;
2364         return 0;
2365 }
2366 
2367 static void __init parse_module_flags(struct omap_hwmod *oh,
2368                                       struct device_node *np)
2369 {
2370         if (of_find_property(np, "ti,no-reset-on-init", NULL))
2371                 oh->flags |= HWMOD_INIT_NO_RESET;
2372         if (of_find_property(np, "ti,no-idle-on-init", NULL))
2373                 oh->flags |= HWMOD_INIT_NO_IDLE;
2374         if (of_find_property(np, "ti,no-idle", NULL))
2375                 oh->flags |= HWMOD_NO_IDLE;
2376 }
2377 
2378 /**
2379  * _init - initialize internal data for the hwmod @oh
2380  * @oh: struct omap_hwmod *
2381  * @n: (unused)
2382  *
2383  * Look up the clocks and the address space used by the MPU to access
2384  * registers belonging to the hwmod @oh.  @oh must already be
2385  * registered at this point.  This is the first of two phases for
2386  * hwmod initialization.  Code called here does not touch any hardware
2387  * registers, it simply prepares internal data structures.  Returns 0
2388  * upon success or if the hwmod isn't registered or if the hwmod's
2389  * address space is not defined, or -EINVAL upon failure.
2390  */
2391 static int __init _init(struct omap_hwmod *oh, void *data)
2392 {
2393         int r, index;
2394         struct device_node *np = NULL;
2395         struct device_node *bus;
2396 
2397         if (oh->_state != _HWMOD_STATE_REGISTERED)
2398                 return 0;
2399 
2400         bus = of_find_node_by_name(NULL, "ocp");
2401         if (!bus)
2402                 return -ENODEV;
2403 
2404         r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2405         if (r)
2406                 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2407         else if (np && index)
2408                 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2409                         oh->name, np);
2410 
2411         r = _init_mpu_rt_base(oh, NULL, index, np);
2412         if (r < 0) {
2413                 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2414                      oh->name);
2415                 return 0;
2416         }
2417 
2418         r = _init_clocks(oh, np);
2419         if (r < 0) {
2420                 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2421                 return -EINVAL;
2422         }
2423 
2424         if (np) {
2425                 struct device_node *child;
2426 
2427                 parse_module_flags(oh, np);
2428                 child = of_get_next_child(np, NULL);
2429                 if (child)
2430                         parse_module_flags(oh, child);
2431         }
2432 
2433         oh->_state = _HWMOD_STATE_INITIALIZED;
2434 
2435         return 0;
2436 }
2437 
2438 /**
2439  * _setup_iclk_autoidle - configure an IP block's interface clocks
2440  * @oh: struct omap_hwmod *
2441  *
2442  * Set up the module's interface clocks.  XXX This function is still mostly
2443  * a stub; implementing this properly requires iclk autoidle usecounting in
2444  * the clock code.   No return value.
2445  */
2446 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2447 {
2448         struct omap_hwmod_ocp_if *os;
2449 
2450         if (oh->_state != _HWMOD_STATE_INITIALIZED)
2451                 return;
2452 
2453         list_for_each_entry(os, &oh->slave_ports, node) {
2454                 if (!os->_clk)
2455                         continue;
2456 
2457                 if (os->flags & OCPIF_SWSUP_IDLE) {
2458                         /*
2459                          * we might have multiple users of one iclk with
2460                          * different requirements, disable autoidle when
2461                          * the module is enabled, e.g. dss iclk
2462                          */
2463                 } else {
2464                         /* we are enabling autoidle afterwards anyways */
2465                         clk_enable(os->_clk);
2466                 }
2467         }
2468 
2469         return;
2470 }
2471 
2472 /**
2473  * _setup_reset - reset an IP block during the setup process
2474  * @oh: struct omap_hwmod *
2475  *
2476  * Reset the IP block corresponding to the hwmod @oh during the setup
2477  * process.  The IP block is first enabled so it can be successfully
2478  * reset.  Returns 0 upon success or a negative error code upon
2479  * failure.
2480  */
2481 static int _setup_reset(struct omap_hwmod *oh)
2482 {
2483         int r = 0;
2484 
2485         if (oh->_state != _HWMOD_STATE_INITIALIZED)
2486                 return -EINVAL;
2487 
2488         if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2489                 return -EPERM;
2490 
2491         if (oh->rst_lines_cnt == 0) {
2492                 r = _enable(oh);
2493                 if (r) {
2494                         pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2495                                 oh->name, oh->_state);
2496                         return -EINVAL;
2497                 }
2498         }
2499 
2500         if (!(oh->flags & HWMOD_INIT_NO_RESET))
2501                 r = _reset(oh);
2502 
2503         return r;
2504 }
2505 
2506 /**
2507  * _setup_postsetup - transition to the appropriate state after _setup
2508  * @oh: struct omap_hwmod *
2509  *
2510  * Place an IP block represented by @oh into a "post-setup" state --
2511  * either IDLE, ENABLED, or DISABLED.  ("post-setup" simply means that
2512  * this function is called at the end of _setup().)  The postsetup
2513  * state for an IP block can be changed by calling
2514  * omap_hwmod_enter_postsetup_state() early in the boot process,
2515  * before one of the omap_hwmod_setup*() functions are called for the
2516  * IP block.
2517  *
2518  * The IP block stays in this state until a PM runtime-based driver is
2519  * loaded for that IP block.  A post-setup state of IDLE is
2520  * appropriate for almost all IP blocks with runtime PM-enabled
2521  * drivers, since those drivers are able to enable the IP block.  A
2522  * post-setup state of ENABLED is appropriate for kernels with PM
2523  * runtime disabled.  The DISABLED state is appropriate for unusual IP
2524  * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2525  * included, since the WDTIMER starts running on reset and will reset
2526  * the MPU if left active.
2527  *
2528  * This post-setup mechanism is deprecated.  Once all of the OMAP
2529  * drivers have been converted to use PM runtime, and all of the IP
2530  * block data and interconnect data is available to the hwmod code, it
2531  * should be possible to replace this mechanism with a "lazy reset"
2532  * arrangement.  In a "lazy reset" setup, each IP block is enabled
2533  * when the driver first probes, then all remaining IP blocks without
2534  * drivers are either shut down or enabled after the drivers have
2535  * loaded.  However, this cannot take place until the above
2536  * preconditions have been met, since otherwise the late reset code
2537  * has no way of knowing which IP blocks are in use by drivers, and
2538  * which ones are unused.
2539  *
2540  * No return value.
2541  */
2542 static void _setup_postsetup(struct omap_hwmod *oh)
2543 {
2544         u8 postsetup_state;
2545 
2546         if (oh->rst_lines_cnt > 0)
2547                 return;
2548 
2549         postsetup_state = oh->_postsetup_state;
2550         if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2551                 postsetup_state = _HWMOD_STATE_ENABLED;
2552 
2553         /*
2554          * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2555          * it should be set by the core code as a runtime flag during startup
2556          */
2557         if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2558             (postsetup_state == _HWMOD_STATE_IDLE)) {
2559                 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2560                 postsetup_state = _HWMOD_STATE_ENABLED;
2561         }
2562 
2563         if (postsetup_state == _HWMOD_STATE_IDLE)
2564                 _idle(oh);
2565         else if (postsetup_state == _HWMOD_STATE_DISABLED)
2566                 _shutdown(oh);
2567         else if (postsetup_state != _HWMOD_STATE_ENABLED)
2568                 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2569                      oh->name, postsetup_state);
2570 
2571         return;
2572 }
2573 
2574 /**
2575  * _setup - prepare IP block hardware for use
2576  * @oh: struct omap_hwmod *
2577  * @n: (unused, pass NULL)
2578  *
2579  * Configure the IP block represented by @oh.  This may include
2580  * enabling the IP block, resetting it, and placing it into a
2581  * post-setup state, depending on the type of IP block and applicable
2582  * flags.  IP blocks are reset to prevent any previous configuration
2583  * by the bootloader or previous operating system from interfering
2584  * with power management or other parts of the system.  The reset can
2585  * be avoided; see omap_hwmod_no_setup_reset().  This is the second of
2586  * two phases for hwmod initialization.  Code called here generally
2587  * affects the IP block hardware, or system integration hardware
2588  * associated with the IP block.  Returns 0.
2589  */
2590 static int _setup(struct omap_hwmod *oh, void *data)
2591 {
2592         if (oh->_state != _HWMOD_STATE_INITIALIZED)
2593                 return 0;
2594 
2595         if (oh->parent_hwmod) {
2596                 int r;
2597 
2598                 r = _enable(oh->parent_hwmod);
2599                 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2600                      oh->name, oh->parent_hwmod->name);
2601         }
2602 
2603         _setup_iclk_autoidle(oh);
2604 
2605         if (!_setup_reset(oh))
2606                 _setup_postsetup(oh);
2607 
2608         if (oh->parent_hwmod) {
2609                 u8 postsetup_state;
2610 
2611                 postsetup_state = oh->parent_hwmod->_postsetup_state;
2612 
2613                 if (postsetup_state == _HWMOD_STATE_IDLE)
2614                         _idle(oh->parent_hwmod);
2615                 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2616                         _shutdown(oh->parent_hwmod);
2617                 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2618                         WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2619                              oh->parent_hwmod->name, postsetup_state);
2620         }
2621 
2622         return 0;
2623 }
2624 
2625 /**
2626  * _register - register a struct omap_hwmod
2627  * @oh: struct omap_hwmod *
2628  *
2629  * Registers the omap_hwmod @oh.  Returns -EEXIST if an omap_hwmod
2630  * already has been registered by the same name; -EINVAL if the
2631  * omap_hwmod is in the wrong state, if @oh is NULL, if the
2632  * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2633  * name, or if the omap_hwmod's class is missing a name; or 0 upon
2634  * success.
2635  *
2636  * XXX The data should be copied into bootmem, so the original data
2637  * should be marked __initdata and freed after init.  This would allow
2638  * unneeded omap_hwmods to be freed on multi-OMAP configurations.  Note
2639  * that the copy process would be relatively complex due to the large number
2640  * of substructures.
2641  */
2642 static int _register(struct omap_hwmod *oh)
2643 {
2644         if (!oh || !oh->name || !oh->class || !oh->class->name ||
2645             (oh->_state != _HWMOD_STATE_UNKNOWN))
2646                 return -EINVAL;
2647 
2648         pr_debug("omap_hwmod: %s: registering\n", oh->name);
2649 
2650         if (_lookup(oh->name))
2651                 return -EEXIST;
2652 
2653         list_add_tail(&oh->node, &omap_hwmod_list);
2654 
2655         INIT_LIST_HEAD(&oh->slave_ports);
2656         spin_lock_init(&oh->_lock);
2657         lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2658 
2659         oh->_state = _HWMOD_STATE_REGISTERED;
2660 
2661         /*
2662          * XXX Rather than doing a strcmp(), this should test a flag
2663          * set in the hwmod data, inserted by the autogenerator code.
2664          */
2665         if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2666                 mpu_oh = oh;
2667 
2668         return 0;
2669 }
2670 
2671 /**
2672  * _add_link - add an interconnect between two IP blocks
2673  * @oi: pointer to a struct omap_hwmod_ocp_if record
2674  *
2675  * Add struct omap_hwmod_link records connecting the slave IP block
2676  * specified in @oi->slave to @oi.  This code is assumed to run before
2677  * preemption or SMP has been enabled, thus avoiding the need for
2678  * locking in this code.  Changes to this assumption will require
2679  * additional locking.  Returns 0.
2680  */
2681 static int _add_link(struct omap_hwmod_ocp_if *oi)
2682 {
2683         pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2684                  oi->slave->name);
2685 
2686         list_add(&oi->node, &oi->slave->slave_ports);
2687         oi->slave->slaves_cnt++;
2688 
2689         return 0;
2690 }
2691 
2692 /**
2693  * _register_link - register a struct omap_hwmod_ocp_if
2694  * @oi: struct omap_hwmod_ocp_if *
2695  *
2696  * Registers the omap_hwmod_ocp_if record @oi.  Returns -EEXIST if it
2697  * has already been registered; -EINVAL if @oi is NULL or if the
2698  * record pointed to by @oi is missing required fields; or 0 upon
2699  * success.
2700  *
2701  * XXX The data should be copied into bootmem, so the original data
2702  * should be marked __initdata and freed after init.  This would allow
2703  * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2704  */
2705 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2706 {
2707         if (!oi || !oi->master || !oi->slave || !oi->user)
2708                 return -EINVAL;
2709 
2710         if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2711                 return -EEXIST;
2712 
2713         pr_debug("omap_hwmod: registering link from %s to %s\n",
2714                  oi->master->name, oi->slave->name);
2715 
2716         /*
2717          * Register the connected hwmods, if they haven't been
2718          * registered already
2719          */
2720         if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2721                 _register(oi->master);
2722 
2723         if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2724                 _register(oi->slave);
2725 
2726         _add_link(oi);
2727 
2728         oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2729 
2730         return 0;
2731 }
2732 
2733 /* Static functions intended only for use in soc_ops field function pointers */
2734 
2735 /**
2736  * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2737  * @oh: struct omap_hwmod *
2738  *
2739  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
2740  * does not have an IDLEST bit or if the module successfully leaves
2741  * slave idle; otherwise, pass along the return value of the
2742  * appropriate *_cm*_wait_module_ready() function.
2743  */
2744 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2745 {
2746         if (!oh)
2747                 return -EINVAL;
2748 
2749         if (oh->flags & HWMOD_NO_IDLEST)
2750                 return 0;
2751 
2752         if (!_find_mpu_rt_port(oh))
2753                 return 0;
2754 
2755         /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2756 
2757         return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2758                                          oh->prcm.omap2.idlest_reg_id,
2759                                          oh->prcm.omap2.idlest_idle_bit);
2760 }
2761 
2762 /**
2763  * _omap4_wait_target_ready - wait for a module to leave slave idle
2764  * @oh: struct omap_hwmod *
2765  *
2766  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
2767  * does not have an IDLEST bit or if the module successfully leaves
2768  * slave idle; otherwise, pass along the return value of the
2769  * appropriate *_cm*_wait_module_ready() function.
2770  */
2771 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2772 {
2773         if (!oh)
2774                 return -EINVAL;
2775 
2776         if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2777                 return 0;
2778 
2779         if (!_find_mpu_rt_port(oh))
2780                 return 0;
2781 
2782         if (_omap4_clkctrl_managed_by_clkfwk(oh))
2783                 return 0;
2784 
2785         if (!_omap4_has_clkctrl_clock(oh))
2786                 return 0;
2787 
2788         /* XXX check module SIDLEMODE, hardreset status */
2789 
2790         return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2791                                          oh->clkdm->cm_inst,
2792                                          oh->prcm.omap4.clkctrl_offs, 0);
2793 }
2794 
2795 /**
2796  * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2797  * @oh: struct omap_hwmod * to assert hardreset
2798  * @ohri: hardreset line data
2799  *
2800  * Call omap2_prm_assert_hardreset() with parameters extracted from
2801  * the hwmod @oh and the hardreset line data @ohri.  Only intended for
2802  * use as an soc_ops function pointer.  Passes along the return value
2803  * from omap2_prm_assert_hardreset().  XXX This function is scheduled
2804  * for removal when the PRM code is moved into drivers/.
2805  */
2806 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2807                                    struct omap_hwmod_rst_info *ohri)
2808 {
2809         return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2810                                          oh->prcm.omap2.module_offs, 0);
2811 }
2812 
2813 /**
2814  * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2815  * @oh: struct omap_hwmod * to deassert hardreset
2816  * @ohri: hardreset line data
2817  *
2818  * Call omap2_prm_deassert_hardreset() with parameters extracted from
2819  * the hwmod @oh and the hardreset line data @ohri.  Only intended for
2820  * use as an soc_ops function pointer.  Passes along the return value
2821  * from omap2_prm_deassert_hardreset().  XXX This function is
2822  * scheduled for removal when the PRM code is moved into drivers/.
2823  */
2824 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2825                                      struct omap_hwmod_rst_info *ohri)
2826 {
2827         return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2828                                            oh->prcm.omap2.module_offs, 0, 0);
2829 }
2830 
2831 /**
2832  * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2833  * @oh: struct omap_hwmod * to test hardreset
2834  * @ohri: hardreset line data
2835  *
2836  * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2837  * from the hwmod @oh and the hardreset line data @ohri.  Only
2838  * intended for use as an soc_ops function pointer.  Passes along the
2839  * return value from omap2_prm_is_hardreset_asserted().  XXX This
2840  * function is scheduled for removal when the PRM code is moved into
2841  * drivers/.
2842  */
2843 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2844                                         struct omap_hwmod_rst_info *ohri)
2845 {
2846         return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2847                                               oh->prcm.omap2.module_offs, 0);
2848 }
2849 
2850 /**
2851  * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2852  * @oh: struct omap_hwmod * to assert hardreset
2853  * @ohri: hardreset line data
2854  *
2855  * Call omap4_prminst_assert_hardreset() with parameters extracted
2856  * from the hwmod @oh and the hardreset line data @ohri.  Only
2857  * intended for use as an soc_ops function pointer.  Passes along the
2858  * return value from omap4_prminst_assert_hardreset().  XXX This
2859  * function is scheduled for removal when the PRM code is moved into
2860  * drivers/.
2861  */
2862 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2863                                    struct omap_hwmod_rst_info *ohri)
2864 {
2865         if (!oh->clkdm)
2866                 return -EINVAL;
2867 
2868         return omap_prm_assert_hardreset(ohri->rst_shift,
2869                                          oh->clkdm->pwrdm.ptr->prcm_partition,
2870                                          oh->clkdm->pwrdm.ptr->prcm_offs,
2871                                          oh->prcm.omap4.rstctrl_offs);
2872 }
2873 
2874 /**
2875  * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2876  * @oh: struct omap_hwmod * to deassert hardreset
2877  * @ohri: hardreset line data
2878  *
2879  * Call omap4_prminst_deassert_hardreset() with parameters extracted
2880  * from the hwmod @oh and the hardreset line data @ohri.  Only
2881  * intended for use as an soc_ops function pointer.  Passes along the
2882  * return value from omap4_prminst_deassert_hardreset().  XXX This
2883  * function is scheduled for removal when the PRM code is moved into
2884  * drivers/.
2885  */
2886 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2887                                      struct omap_hwmod_rst_info *ohri)
2888 {
2889         if (!oh->clkdm)
2890                 return -EINVAL;
2891 
2892         if (ohri->st_shift)
2893                 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2894                        oh->name, ohri->name);
2895         return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2896                                            oh->clkdm->pwrdm.ptr->prcm_partition,
2897                                            oh->clkdm->pwrdm.ptr->prcm_offs,
2898                                            oh->prcm.omap4.rstctrl_offs,
2899                                            oh->prcm.omap4.rstctrl_offs +
2900                                            OMAP4_RST_CTRL_ST_OFFSET);
2901 }
2902 
2903 /**
2904  * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2905  * @oh: struct omap_hwmod * to test hardreset
2906  * @ohri: hardreset line data
2907  *
2908  * Call omap4_prminst_is_hardreset_asserted() with parameters
2909  * extracted from the hwmod @oh and the hardreset line data @ohri.
2910  * Only intended for use as an soc_ops function pointer.  Passes along
2911  * the return value from omap4_prminst_is_hardreset_asserted().  XXX
2912  * This function is scheduled for removal when the PRM code is moved
2913  * into drivers/.
2914  */
2915 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2916                                         struct omap_hwmod_rst_info *ohri)
2917 {
2918         if (!oh->clkdm)
2919                 return -EINVAL;
2920 
2921         return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2922                                               oh->clkdm->pwrdm.ptr->
2923                                               prcm_partition,
2924                                               oh->clkdm->pwrdm.ptr->prcm_offs,
2925                                               oh->prcm.omap4.rstctrl_offs);
2926 }
2927 
2928 /**
2929  * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2930  * @oh: struct omap_hwmod * to disable control for
2931  *
2932  * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2933  * will be using its main_clk to enable/disable the module. Returns
2934  * 0 if successful.
2935  */
2936 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2937 {
2938         if (!oh)
2939                 return -EINVAL;
2940 
2941         oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2942 
2943         return 0;
2944 }
2945 
2946 /**
2947  * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2948  * @oh: struct omap_hwmod * to deassert hardreset
2949  * @ohri: hardreset line data
2950  *
2951  * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2952  * from the hwmod @oh and the hardreset line data @ohri.  Only
2953  * intended for use as an soc_ops function pointer.  Passes along the
2954  * return value from am33xx_prminst_deassert_hardreset().  XXX This
2955  * function is scheduled for removal when the PRM code is moved into
2956  * drivers/.
2957  */
2958 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2959                                      struct omap_hwmod_rst_info *ohri)
2960 {
2961         return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2962                                            oh->clkdm->pwrdm.ptr->prcm_partition,
2963                                            oh->clkdm->pwrdm.ptr->prcm_offs,
2964                                            oh->prcm.omap4.rstctrl_offs,
2965                                            oh->prcm.omap4.rstst_offs);
2966 }
2967 
2968 /* Public functions */
2969 
2970 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2971 {
2972         if (oh->flags & HWMOD_16BIT_REG)
2973                 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2974         else
2975                 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2976 }
2977 
2978 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2979 {
2980         if (oh->flags & HWMOD_16BIT_REG)
2981                 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2982         else
2983                 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2984 }
2985 
2986 /**
2987  * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2988  * @oh: struct omap_hwmod *
2989  *
2990  * This is a public function exposed to drivers. Some drivers may need to do
2991  * some settings before and after resetting the device.  Those drivers after
2992  * doing the necessary settings could use this function to start a reset by
2993  * setting the SYSCONFIG.SOFTRESET bit.
2994  */
2995 int omap_hwmod_softreset(struct omap_hwmod *oh)
2996 {
2997         u32 v;
2998         int ret;
2999 
3000         if (!oh || !(oh->_sysc_cache))
3001                 return -EINVAL;
3002 
3003         v = oh->_sysc_cache;
3004         ret = _set_softreset(oh, &v);
3005         if (ret)
3006                 goto error;
3007         _write_sysconfig(v, oh);
3008 
3009         ret = _clear_softreset(oh, &v);
3010         if (ret)
3011                 goto error;
3012         _write_sysconfig(v, oh);
3013 
3014 error:
3015         return ret;
3016 }
3017 
3018 /**
3019  * omap_hwmod_lookup - look up a registered omap_hwmod by name
3020  * @name: name of the omap_hwmod to look up
3021  *
3022  * Given a @name of an omap_hwmod, return a pointer to the registered
3023  * struct omap_hwmod *, or NULL upon error.
3024  */
3025 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3026 {
3027         struct omap_hwmod *oh;
3028 
3029         if (!name)
3030                 return NULL;
3031 
3032         oh = _lookup(name);
3033 
3034         return oh;
3035 }
3036 
3037 /**
3038  * omap_hwmod_for_each - call function for each registered omap_hwmod
3039  * @fn: pointer to a callback function
3040  * @data: void * data to pass to callback function
3041  *
3042  * Call @fn for each registered omap_hwmod, passing @data to each
3043  * function.  @fn must return 0 for success or any other value for
3044  * failure.  If @fn returns non-zero, the iteration across omap_hwmods
3045  * will stop and the non-zero return value will be passed to the
3046  * caller of omap_hwmod_for_each().  @fn is called with
3047  * omap_hwmod_for_each() held.
3048  */
3049 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3050                         void *data)
3051 {
3052         struct omap_hwmod *temp_oh;
3053         int ret = 0;
3054 
3055         if (!fn)
3056                 return -EINVAL;
3057 
3058         list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3059                 ret = (*fn)(temp_oh, data);
3060                 if (ret)
3061                         break;
3062         }
3063 
3064         return ret;
3065 }
3066 
3067 /**
3068  * omap_hwmod_register_links - register an array of hwmod links
3069  * @ois: pointer to an array of omap_hwmod_ocp_if to register
3070  *
3071  * Intended to be called early in boot before the clock framework is
3072  * initialized.  If @ois is not null, will register all omap_hwmods
3073  * listed in @ois that are valid for this chip.  Returns -EINVAL if
3074  * omap_hwmod_init() hasn't been called before calling this function,
3075  * -ENOMEM if the link memory area can't be allocated, or 0 upon
3076  * success.
3077  */
3078 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3079 {
3080         int r, i;
3081 
3082         if (!inited)
3083                 return -EINVAL;
3084 
3085         if (!ois)
3086                 return 0;
3087 
3088         if (ois[0] == NULL) /* Empty list */
3089                 return 0;
3090 
3091         i = 0;
3092         do {
3093                 r = _register_link(ois[i]);
3094                 WARN(r && r != -EEXIST,
3095                      "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3096                      ois[i]->master->name, ois[i]->slave->name, r);
3097         } while (ois[++i]);
3098 
3099         return 0;
3100 }
3101 
3102 /**
3103  * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3104  * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3105  *
3106  * If the hwmod data corresponding to the MPU subsystem IP block
3107  * hasn't been initialized and set up yet, do so now.  This must be
3108  * done first since sleep dependencies may be added from other hwmods
3109  * to the MPU.  Intended to be called only by omap_hwmod_setup*().  No
3110  * return value.
3111  */
3112 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3113 {
3114         if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3115                 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3116                        __func__, MPU_INITIATOR_NAME);
3117         else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3118                 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3119 }
3120 
3121 /**
3122  * omap_hwmod_setup_one - set up a single hwmod
3123  * @oh_name: const char * name of the already-registered hwmod to set up
3124  *
3125  * Initialize and set up a single hwmod.  Intended to be used for a
3126  * small number of early devices, such as the timer IP blocks used for
3127  * the scheduler clock.  Must be called after omap2_clk_init().
3128  * Resolves the struct clk names to struct clk pointers for each
3129  * registered omap_hwmod.  Also calls _setup() on each hwmod.  Returns
3130  * -EINVAL upon error or 0 upon success.
3131  */
3132 int __init omap_hwmod_setup_one(const char *oh_name)
3133 {
3134         struct omap_hwmod *oh;
3135 
3136         pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3137 
3138         oh = _lookup(oh_name);
3139         if (!oh) {
3140                 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3141                 return -EINVAL;
3142         }
3143 
3144         _ensure_mpu_hwmod_is_setup(oh);
3145 
3146         _init(oh, NULL);
3147         _setup(oh, NULL);
3148 
3149         return 0;
3150 }
3151 
3152 static void omap_hwmod_check_one(struct device *dev,
3153                                  const char *name, s8 v1, u8 v2)
3154 {
3155         if (v1 < 0)
3156                 return;
3157 
3158         if (v1 != v2)
3159                 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3160 }
3161 
3162 /**
3163  * omap_hwmod_check_sysc - check sysc against platform sysc
3164  * @dev: struct device
3165  * @data: module data
3166  * @sysc_fields: new sysc configuration
3167  */
3168 static int omap_hwmod_check_sysc(struct device *dev,
3169                                  const struct ti_sysc_module_data *data,
3170                                  struct sysc_regbits *sysc_fields)
3171 {
3172         const struct sysc_regbits *regbits = data->cap->regbits;
3173 
3174         omap_hwmod_check_one(dev, "dmadisable_shift",
3175                              regbits->dmadisable_shift,
3176                              sysc_fields->dmadisable_shift);
3177         omap_hwmod_check_one(dev, "midle_shift",
3178                              regbits->midle_shift,
3179                              sysc_fields->midle_shift);
3180         omap_hwmod_check_one(dev, "sidle_shift",
3181                              regbits->sidle_shift,
3182                              sysc_fields->sidle_shift);
3183         omap_hwmod_check_one(dev, "clkact_shift",
3184                              regbits->clkact_shift,
3185                              sysc_fields->clkact_shift);
3186         omap_hwmod_check_one(dev, "enwkup_shift",
3187                              regbits->enwkup_shift,
3188                              sysc_fields->enwkup_shift);
3189         omap_hwmod_check_one(dev, "srst_shift",
3190                              regbits->srst_shift,
3191                              sysc_fields->srst_shift);
3192         omap_hwmod_check_one(dev, "autoidle_shift",
3193                              regbits->autoidle_shift,
3194                              sysc_fields->autoidle_shift);
3195 
3196         return 0;
3197 }
3198 
3199 /**
3200  * omap_hwmod_init_regbits - init sysconfig specific register bits
3201  * @dev: struct device
3202  * @data: module data
3203  * @sysc_fields: new sysc configuration
3204  */
3205 static int omap_hwmod_init_regbits(struct device *dev,
3206                                    const struct ti_sysc_module_data *data,
3207                                    struct sysc_regbits **sysc_fields)
3208 {
3209         *sysc_fields = NULL;
3210 
3211         switch (data->cap->type) {
3212         case TI_SYSC_OMAP2:
3213         case TI_SYSC_OMAP2_TIMER:
3214                 *sysc_fields = &omap_hwmod_sysc_type1;
3215                 break;
3216         case TI_SYSC_OMAP3_SHAM:
3217                 *sysc_fields = &omap3_sham_sysc_fields;
3218                 break;
3219         case TI_SYSC_OMAP3_AES:
3220                 *sysc_fields = &omap3xxx_aes_sysc_fields;
3221                 break;
3222         case TI_SYSC_OMAP4:
3223         case TI_SYSC_OMAP4_TIMER:
3224                 *sysc_fields = &omap_hwmod_sysc_type2;
3225                 break;
3226         case TI_SYSC_OMAP4_SIMPLE:
3227                 *sysc_fields = &omap_hwmod_sysc_type3;
3228                 break;
3229         case TI_SYSC_OMAP34XX_SR:
3230                 *sysc_fields = &omap34xx_sr_sysc_fields;
3231                 break;
3232         case TI_SYSC_OMAP36XX_SR:
3233                 *sysc_fields = &omap36xx_sr_sysc_fields;
3234                 break;
3235         case TI_SYSC_OMAP4_SR:
3236                 *sysc_fields = &omap36xx_sr_sysc_fields;
3237                 break;
3238         case TI_SYSC_OMAP4_MCASP:
3239                 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3240                 break;
3241         case TI_SYSC_OMAP4_USB_HOST_FS:
3242                 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3243                 break;
3244         default:
3245                 return -EINVAL;
3246         }
3247 
3248         return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3249 }
3250 
3251 /**
3252  * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3253  * @dev: struct device
3254  * @data: module data
3255  * @rev_offs: revision register offset
3256  * @sysc_offs: sysc register offset
3257  * @syss_offs: syss register offset
3258  */
3259 static int omap_hwmod_init_reg_offs(struct device *dev,
3260                                     const struct ti_sysc_module_data *data,
3261                                     s32 *rev_offs, s32 *sysc_offs,
3262                                     s32 *syss_offs)
3263 {
3264         *rev_offs = -ENODEV;
3265         *sysc_offs = 0;
3266         *syss_offs = 0;
3267 
3268         if (data->offsets[SYSC_REVISION] >= 0)
3269                 *rev_offs = data->offsets[SYSC_REVISION];
3270 
3271         if (data->offsets[SYSC_SYSCONFIG] >= 0)
3272                 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3273 
3274         if (data->offsets[SYSC_SYSSTATUS] >= 0)
3275                 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3276 
3277         return 0;
3278 }
3279 
3280 /**
3281  * omap_hwmod_init_sysc_flags - initialize sysconfig features
3282  * @dev: struct device
3283  * @data: module data
3284  * @sysc_flags: module configuration
3285  */
3286 static int omap_hwmod_init_sysc_flags(struct device *dev,
3287                                       const struct ti_sysc_module_data *data,
3288                                       u32 *sysc_flags)
3289 {
3290         *sysc_flags = 0;
3291 
3292         switch (data->cap->type) {
3293         case TI_SYSC_OMAP2:
3294         case TI_SYSC_OMAP2_TIMER:
3295                 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3296                 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3297                         *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3298                 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3299                         *sysc_flags |= SYSC_HAS_EMUFREE;
3300                 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3301                         *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3302                 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3303                         *sysc_flags |= SYSC_HAS_SOFTRESET;
3304                 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3305                         *sysc_flags |= SYSC_HAS_AUTOIDLE;
3306                 break;
3307         case TI_SYSC_OMAP4:
3308         case TI_SYSC_OMAP4_TIMER:
3309                 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3310                 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3311                         *sysc_flags |= SYSC_HAS_DMADISABLE;
3312                 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3313                         *sysc_flags |= SYSC_HAS_EMUFREE;
3314                 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3315                         *sysc_flags |= SYSC_HAS_SOFTRESET;
3316                 break;
3317         case TI_SYSC_OMAP34XX_SR:
3318         case TI_SYSC_OMAP36XX_SR:
3319                 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3320                 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3321                         *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3322                 break;
3323         default:
3324                 if (data->cap->regbits->emufree_shift >= 0)
3325                         *sysc_flags |= SYSC_HAS_EMUFREE;
3326                 if (data->cap->regbits->enwkup_shift >= 0)
3327                         *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3328                 if (data->cap->regbits->srst_shift >= 0)
3329                         *sysc_flags |= SYSC_HAS_SOFTRESET;
3330                 if (data->cap->regbits->autoidle_shift >= 0)
3331                         *sysc_flags |= SYSC_HAS_AUTOIDLE;
3332                 break;
3333         }
3334 
3335         if (data->cap->regbits->midle_shift >= 0 &&
3336             data->cfg->midlemodes)
3337                 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3338 
3339         if (data->cap->regbits->sidle_shift >= 0 &&
3340             data->cfg->sidlemodes)
3341                 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3342 
3343         if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3344                 *sysc_flags |= SYSC_NO_CACHE;
3345         if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3346                 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3347 
3348         if (data->cfg->syss_mask & 1)
3349                 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3350 
3351         return 0;
3352 }
3353 
3354 /**
3355  * omap_hwmod_init_idlemodes - initialize module idle modes
3356  * @dev: struct device
3357  * @data: module data
3358  * @idlemodes: module supported idle modes
3359  */
3360 static int omap_hwmod_init_idlemodes(struct device *dev,
3361                                      const struct ti_sysc_module_data *data,
3362                                      u32 *idlemodes)
3363 {
3364         *idlemodes = 0;
3365 
3366         if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3367                 *idlemodes |= MSTANDBY_FORCE;
3368         if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3369                 *idlemodes |= MSTANDBY_NO;
3370         if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3371                 *idlemodes |= MSTANDBY_SMART;
3372         if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3373                 *idlemodes |= MSTANDBY_SMART_WKUP;
3374 
3375         if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3376                 *idlemodes |= SIDLE_FORCE;
3377         if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3378                 *idlemodes |= SIDLE_NO;
3379         if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3380                 *idlemodes |= SIDLE_SMART;
3381         if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3382                 *idlemodes |= SIDLE_SMART_WKUP;
3383 
3384         return 0;
3385 }
3386 
3387 /**
3388  * omap_hwmod_check_module - check new module against platform data
3389  * @dev: struct device
3390  * @oh: module
3391  * @data: new module data
3392  * @sysc_fields: sysc register bits
3393  * @rev_offs: revision register offset
3394  * @sysc_offs: sysconfig register offset
3395  * @syss_offs: sysstatus register offset
3396  * @sysc_flags: sysc specific flags
3397  * @idlemodes: sysc supported idlemodes
3398  */
3399 static int omap_hwmod_check_module(struct device *dev,
3400                                    struct omap_hwmod *oh,
3401                                    const struct ti_sysc_module_data *data,
3402                                    struct sysc_regbits *sysc_fields,
3403                                    s32 rev_offs, s32 sysc_offs,
3404                                    s32 syss_offs, u32 sysc_flags,
3405                                    u32 idlemodes)
3406 {
3407         if (!oh->class->sysc)
3408                 return -ENODEV;
3409 
3410         if (sysc_fields != oh->class->sysc->sysc_fields)
3411                 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3412                          oh->class->sysc->sysc_fields);
3413 
3414         if (rev_offs != oh->class->sysc->rev_offs)
3415                 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3416                          oh->class->sysc->rev_offs);
3417         if (sysc_offs != oh->class->sysc->sysc_offs)
3418                 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3419                          oh->class->sysc->sysc_offs);
3420         if (syss_offs != oh->class->sysc->syss_offs)
3421                 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3422                          oh->class->sysc->syss_offs);
3423 
3424         if (sysc_flags != oh->class->sysc->sysc_flags)
3425                 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3426                          oh->class->sysc->sysc_flags);
3427 
3428         if (idlemodes != oh->class->sysc->idlemodes)
3429                 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3430                          oh->class->sysc->idlemodes);
3431 
3432         if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3433                 dev_warn(dev, "srst_udelay %i != %i\n",
3434                          data->cfg->srst_udelay,
3435                          oh->class->sysc->srst_udelay);
3436 
3437         return 0;
3438 }
3439 
3440 /**
3441  * omap_hwmod_allocate_module - allocate new module
3442  * @dev: struct device
3443  * @oh: module
3444  * @sysc_fields: sysc register bits
3445  * @clockdomain: clockdomain
3446  * @rev_offs: revision register offset
3447  * @sysc_offs: sysconfig register offset
3448  * @syss_offs: sysstatus register offset
3449  * @sysc_flags: sysc specific flags
3450  * @idlemodes: sysc supported idlemodes
3451  *
3452  * Note that the allocations here cannot use devm as ti-sysc can rebind.
3453  */
3454 static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3455                                       const struct ti_sysc_module_data *data,
3456                                       struct sysc_regbits *sysc_fields,
3457                                       struct clockdomain *clkdm,
3458                                       s32 rev_offs, s32 sysc_offs,
3459                                       s32 syss_offs, u32 sysc_flags,
3460                                       u32 idlemodes)
3461 {
3462         struct omap_hwmod_class_sysconfig *sysc;
3463         struct omap_hwmod_class *class = NULL;
3464         struct omap_hwmod_ocp_if *oi = NULL;
3465         void __iomem *regs = NULL;
3466         unsigned long flags;
3467 
3468         sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3469         if (!sysc)
3470                 return -ENOMEM;
3471 
3472         sysc->sysc_fields = sysc_fields;
3473         sysc->rev_offs = rev_offs;
3474         sysc->sysc_offs = sysc_offs;
3475         sysc->syss_offs = syss_offs;
3476         sysc->sysc_flags = sysc_flags;
3477         sysc->idlemodes = idlemodes;
3478         sysc->srst_udelay = data->cfg->srst_udelay;
3479 
3480         if (!oh->_mpu_rt_va) {
3481                 regs = ioremap(data->module_pa,
3482                                data->module_size);
3483                 if (!regs)
3484                         return -ENOMEM;
3485         }
3486 
3487         /*
3488          * We may need a new oh->class as the other devices in the same class
3489          * may not yet have ioremapped their registers.
3490          */
3491         if (oh->class->name && strcmp(oh->class->name, data->name)) {
3492                 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3493                 if (!class)
3494                         return -ENOMEM;
3495         }
3496 
3497         if (list_empty(&oh->slave_ports)) {
3498                 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3499                 if (!oi)
3500                         return -ENOMEM;
3501 
3502                 /*
3503                  * Note that we assume interconnect interface clocks will be
3504                  * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3505                  * on omap24xx and omap3.
3506                  */
3507                 oi->slave = oh;
3508                 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3509         }
3510 
3511         spin_lock_irqsave(&oh->_lock, flags);
3512         if (regs)
3513                 oh->_mpu_rt_va = regs;
3514         if (class)
3515                 oh->class = class;
3516         oh->class->sysc = sysc;
3517         if (oi)
3518                 _add_link(oi);
3519         if (clkdm)
3520                 oh->clkdm = clkdm;
3521         oh->_state = _HWMOD_STATE_INITIALIZED;
3522         oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3523         _setup(oh, NULL);
3524         spin_unlock_irqrestore(&oh->_lock, flags);
3525 
3526         return 0;
3527 }
3528 
3529 static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3530         { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3531 };
3532 
3533 static const struct omap_hwmod_reset dra7_reset_quirks[] = {
3534         { .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, },
3535 };
3536 
3537 static const struct omap_hwmod_reset omap_reset_quirks[] = {
3538         { .match = "dss", .len = 3, .reset = omap_dss_reset, },
3539         { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3540         { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3541         { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3542 };
3543 
3544 static void
3545 omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3546                             const struct ti_sysc_module_data *data,
3547                             const struct omap_hwmod_reset *quirks,
3548                             int quirks_sz)
3549 {
3550         const struct omap_hwmod_reset *quirk;
3551         int i;
3552 
3553         for (i = 0; i < quirks_sz; i++) {
3554                 quirk = &quirks[i];
3555                 if (!strncmp(data->name, quirk->match, quirk->len)) {
3556                         oh->class->reset = quirk->reset;
3557 
3558                         return;
3559                 }
3560         }
3561 }
3562 
3563 static void
3564 omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3565                              const struct ti_sysc_module_data *data)
3566 {
3567         if (soc_is_omap24xx())
3568                 omap_hwmod_init_reset_quirk(dev, oh, data,
3569                                             omap24xx_reset_quirks,
3570                                             ARRAY_SIZE(omap24xx_reset_quirks));
3571 
3572         if (soc_is_dra7xx())
3573                 omap_hwmod_init_reset_quirk(dev, oh, data, dra7_reset_quirks,
3574                                             ARRAY_SIZE(dra7_reset_quirks));
3575 
3576         omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3577                                     ARRAY_SIZE(omap_reset_quirks));
3578 }
3579 
3580 /**
3581  * omap_hwmod_init_module - initialize new module
3582  * @dev: struct device
3583  * @data: module data
3584  * @cookie: cookie for the caller to use for later calls
3585  */
3586 int omap_hwmod_init_module(struct device *dev,
3587                            const struct ti_sysc_module_data *data,
3588                            struct ti_sysc_cookie *cookie)
3589 {
3590         struct omap_hwmod *oh;
3591         struct sysc_regbits *sysc_fields;
3592         s32 rev_offs, sysc_offs, syss_offs;
3593         u32 sysc_flags, idlemodes;
3594         int error;
3595 
3596         if (!dev || !data || !data->name || !cookie)
3597                 return -EINVAL;
3598 
3599         oh = _lookup(data->name);
3600         if (!oh) {
3601                 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3602                 if (!oh)
3603                         return -ENOMEM;
3604 
3605                 oh->name = data->name;
3606                 oh->_state = _HWMOD_STATE_UNKNOWN;
3607                 lockdep_register_key(&oh->hwmod_key);
3608 
3609                 /* Unused, can be handled by PRM driver handling resets */
3610                 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3611 
3612                 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3613                 if (!oh->class) {
3614                         kfree(oh);
3615                         return -ENOMEM;
3616                 }
3617 
3618                 omap_hwmod_init_reset_quirks(dev, oh, data);
3619 
3620                 oh->class->name = data->name;
3621                 mutex_lock(&list_lock);
3622                 error = _register(oh);
3623                 mutex_unlock(&list_lock);
3624         }
3625 
3626         cookie->data = oh;
3627 
3628         error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3629         if (error)
3630                 return error;
3631 
3632         error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3633                                          &sysc_offs, &syss_offs);
3634         if (error)
3635                 return error;
3636 
3637         error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3638         if (error)
3639                 return error;
3640 
3641         error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3642         if (error)
3643                 return error;
3644 
3645         if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3646                 oh->flags |= HWMOD_NO_IDLE;
3647         if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3648                 oh->flags |= HWMOD_INIT_NO_IDLE;
3649         if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3650                 oh->flags |= HWMOD_INIT_NO_RESET;
3651         if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3652                 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3653         if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3654                 oh->flags |= HWMOD_SWSUP_SIDLE;
3655         if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3656                 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3657         if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3658                 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3659 
3660         error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3661                                         rev_offs, sysc_offs, syss_offs,
3662                                         sysc_flags, idlemodes);
3663         if (!error)
3664                 return error;
3665 
3666         return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3667                                           cookie->clkdm, rev_offs,
3668                                           sysc_offs, syss_offs,
3669                                           sysc_flags, idlemodes);
3670 }
3671 
3672 /**
3673  * omap_hwmod_setup_earlycon_flags - set up flags for early console
3674  *
3675  * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3676  * early concole so that hwmod core doesn't reset and keep it in idle
3677  * that specific uart.
3678  */
3679 #ifdef CONFIG_SERIAL_EARLYCON
3680 static void __init omap_hwmod_setup_earlycon_flags(void)
3681 {
3682         struct device_node *np;
3683         struct omap_hwmod *oh;
3684         const char *uart;
3685 
3686         np = of_find_node_by_path("/chosen");
3687         if (np) {
3688                 uart = of_get_property(np, "stdout-path", NULL);
3689                 if (uart) {
3690                         np = of_find_node_by_path(uart);
3691                         if (np) {
3692                                 uart = of_get_property(np, "ti,hwmods", NULL);
3693                                 oh = omap_hwmod_lookup(uart);
3694                                 if (!oh) {
3695                                         uart = of_get_property(np->parent,
3696                                                                "ti,hwmods",
3697                                                                NULL);
3698                                         oh = omap_hwmod_lookup(uart);
3699                                 }
3700                                 if (oh)
3701                                         oh->flags |= DEBUG_OMAPUART_FLAGS;
3702                         }
3703                 }
3704         }
3705 }
3706 #endif
3707 
3708 /**
3709  * omap_hwmod_setup_all - set up all registered IP blocks
3710  *
3711  * Initialize and set up all IP blocks registered with the hwmod code.
3712  * Must be called after omap2_clk_init().  Resolves the struct clk
3713  * names to struct clk pointers for each registered omap_hwmod.  Also
3714  * calls _setup() on each hwmod.  Returns 0 upon success.
3715  */
3716 static int __init omap_hwmod_setup_all(void)
3717 {
3718         _ensure_mpu_hwmod_is_setup(NULL);
3719 
3720         omap_hwmod_for_each(_init, NULL);
3721 #ifdef CONFIG_SERIAL_EARLYCON
3722         omap_hwmod_setup_earlycon_flags();
3723 #endif
3724         omap_hwmod_for_each(_setup, NULL);
3725 
3726         return 0;
3727 }
3728 omap_postcore_initcall(omap_hwmod_setup_all);
3729 
3730 /**
3731  * omap_hwmod_enable - enable an omap_hwmod
3732  * @oh: struct omap_hwmod *
3733  *
3734  * Enable an omap_hwmod @oh.  Intended to be called by omap_device_enable().
3735  * Returns -EINVAL on error or passes along the return value from _enable().
3736  */
3737 int omap_hwmod_enable(struct omap_hwmod *oh)
3738 {
3739         int r;
3740         unsigned long flags;
3741 
3742         if (!oh)
3743                 return -EINVAL;
3744 
3745         spin_lock_irqsave(&oh->_lock, flags);
3746         r = _enable(oh);
3747         spin_unlock_irqrestore(&oh->_lock, flags);
3748 
3749         return r;
3750 }
3751 
3752 /**
3753  * omap_hwmod_idle - idle an omap_hwmod
3754  * @oh: struct omap_hwmod *
3755  *
3756  * Idle an omap_hwmod @oh.  Intended to be called by omap_device_idle().
3757  * Returns -EINVAL on error or passes along the return value from _idle().
3758  */
3759 int omap_hwmod_idle(struct omap_hwmod *oh)
3760 {
3761         int r;
3762         unsigned long flags;
3763 
3764         if (!oh)
3765                 return -EINVAL;
3766 
3767         spin_lock_irqsave(&oh->_lock, flags);
3768         r = _idle(oh);
3769         spin_unlock_irqrestore(&oh->_lock, flags);
3770 
3771         return r;
3772 }
3773 
3774 /**
3775  * omap_hwmod_shutdown - shutdown an omap_hwmod
3776  * @oh: struct omap_hwmod *
3777  *
3778  * Shutdown an omap_hwmod @oh.  Intended to be called by
3779  * omap_device_shutdown().  Returns -EINVAL on error or passes along
3780  * the return value from _shutdown().
3781  */
3782 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3783 {
3784         int r;
3785         unsigned long flags;
3786 
3787         if (!oh)
3788                 return -EINVAL;
3789 
3790         spin_lock_irqsave(&oh->_lock, flags);
3791         r = _shutdown(oh);
3792         spin_unlock_irqrestore(&oh->_lock, flags);
3793 
3794         return r;
3795 }
3796 
3797 /*
3798  * IP block data retrieval functions
3799  */
3800 
3801 /**
3802  * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3803  * @oh: struct omap_hwmod *
3804  *
3805  * Return the powerdomain pointer associated with the OMAP module
3806  * @oh's main clock.  If @oh does not have a main clk, return the
3807  * powerdomain associated with the interface clock associated with the
3808  * module's MPU port. (XXX Perhaps this should use the SDMA port
3809  * instead?)  Returns NULL on error, or a struct powerdomain * on
3810  * success.
3811  */
3812 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3813 {
3814         struct clk *c;
3815         struct omap_hwmod_ocp_if *oi;
3816         struct clockdomain *clkdm;
3817         struct clk_hw_omap *clk;
3818 
3819         if (!oh)
3820                 return NULL;
3821 
3822         if (oh->clkdm)
3823                 return oh->clkdm->pwrdm.ptr;
3824 
3825         if (oh->_clk) {
3826                 c = oh->_clk;
3827         } else {
3828                 oi = _find_mpu_rt_port(oh);
3829                 if (!oi)
3830                         return NULL;
3831                 c = oi->_clk;
3832         }
3833 
3834         clk = to_clk_hw_omap(__clk_get_hw(c));
3835         clkdm = clk->clkdm;
3836         if (!clkdm)
3837                 return NULL;
3838 
3839         return clkdm->pwrdm.ptr;
3840 }
3841 
3842 /**
3843  * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3844  * @oh: struct omap_hwmod *
3845  *
3846  * Returns the virtual address corresponding to the beginning of the
3847  * module's register target, in the address range that is intended to
3848  * be used by the MPU.  Returns the virtual address upon success or NULL
3849  * upon error.
3850  */
3851 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3852 {
3853         if (!oh)
3854                 return NULL;
3855 
3856         if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3857                 return NULL;
3858 
3859         if (oh->_state == _HWMOD_STATE_UNKNOWN)
3860                 return NULL;
3861 
3862         return oh->_mpu_rt_va;
3863 }
3864 
3865 /*
3866  * XXX what about functions for drivers to save/restore ocp_sysconfig
3867  * for context save/restore operations?
3868  */
3869 
3870 /**
3871  * omap_hwmod_enable_wakeup - allow device to wake up the system
3872  * @oh: struct omap_hwmod *
3873  *
3874  * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3875  * send wakeups to the PRCM, and enable I/O ring wakeup events for
3876  * this IP block if it has dynamic mux entries.  Eventually this
3877  * should set PRCM wakeup registers to cause the PRCM to receive
3878  * wakeup events from the module.  Does not set any wakeup routing
3879  * registers beyond this point - if the module is to wake up any other
3880  * module or subsystem, that must be set separately.  Called by
3881  * omap_device code.  Returns -EINVAL on error or 0 upon success.
3882  */
3883 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3884 {
3885         unsigned long flags;
3886         u32 v;
3887 
3888         spin_lock_irqsave(&oh->_lock, flags);
3889 
3890         if (oh->class->sysc &&
3891             (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3892                 v = oh->_sysc_cache;
3893                 _enable_wakeup(oh, &v);
3894                 _write_sysconfig(v, oh);
3895         }
3896 
3897         spin_unlock_irqrestore(&oh->_lock, flags);
3898 
3899         return 0;
3900 }
3901 
3902 /**
3903  * omap_hwmod_disable_wakeup - prevent device from waking the system
3904  * @oh: struct omap_hwmod *
3905  *
3906  * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3907  * from sending wakeups to the PRCM, and disable I/O ring wakeup
3908  * events for this IP block if it has dynamic mux entries.  Eventually
3909  * this should clear PRCM wakeup registers to cause the PRCM to ignore
3910  * wakeup events from the module.  Does not set any wakeup routing
3911  * registers beyond this point - if the module is to wake up any other
3912  * module or subsystem, that must be set separately.  Called by
3913  * omap_device code.  Returns -EINVAL on error or 0 upon success.
3914  */
3915 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3916 {
3917         unsigned long flags;
3918         u32 v;
3919 
3920         spin_lock_irqsave(&oh->_lock, flags);
3921 
3922         if (oh->class->sysc &&
3923             (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3924                 v = oh->_sysc_cache;
3925                 _disable_wakeup(oh, &v);
3926                 _write_sysconfig(v, oh);
3927         }
3928 
3929         spin_unlock_irqrestore(&oh->_lock, flags);
3930 
3931         return 0;
3932 }
3933 
3934 /**
3935  * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3936  * contained in the hwmod module.
3937  * @oh: struct omap_hwmod *
3938  * @name: name of the reset line to lookup and assert
3939  *
3940  * Some IP like dsp, ipu or iva contain processor that require
3941  * an HW reset line to be assert / deassert in order to enable fully
3942  * the IP.  Returns -EINVAL if @oh is null or if the operation is not
3943  * yet supported on this OMAP; otherwise, passes along the return value
3944  * from _assert_hardreset().
3945  */
3946 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3947 {
3948         int ret;
3949         unsigned long flags;
3950 
3951         if (!oh)
3952                 return -EINVAL;
3953 
3954         spin_lock_irqsave(&oh->_lock, flags);
3955         ret = _assert_hardreset(oh, name);
3956         spin_unlock_irqrestore(&oh->_lock, flags);
3957 
3958         return ret;
3959 }
3960 
3961 /**
3962  * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3963  * contained in the hwmod module.
3964  * @oh: struct omap_hwmod *
3965  * @name: name of the reset line to look up and deassert
3966  *
3967  * Some IP like dsp, ipu or iva contain processor that require
3968  * an HW reset line to be assert / deassert in order to enable fully
3969  * the IP.  Returns -EINVAL if @oh is null or if the operation is not
3970  * yet supported on this OMAP; otherwise, passes along the return value
3971  * from _deassert_hardreset().
3972  */
3973 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3974 {
3975         int ret;
3976         unsigned long flags;
3977 
3978         if (!oh)
3979                 return -EINVAL;
3980 
3981         spin_lock_irqsave(&oh->_lock, flags);
3982         ret = _deassert_hardreset(oh, name);
3983         spin_unlock_irqrestore(&oh->_lock, flags);
3984 
3985         return ret;
3986 }
3987 
3988 /**
3989  * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3990  * @classname: struct omap_hwmod_class name to search for
3991  * @fn: callback function pointer to call for each hwmod in class @classname
3992  * @user: arbitrary context data to pass to the callback function
3993  *
3994  * For each omap_hwmod of class @classname, call @fn.
3995  * If the callback function returns something other than
3996  * zero, the iterator is terminated, and the callback function's return
3997  * value is passed back to the caller.  Returns 0 upon success, -EINVAL
3998  * if @classname or @fn are NULL, or passes back the error code from @fn.
3999  */
4000 int omap_hwmod_for_each_by_class(const char *classname,
4001                                  int (*fn)(struct omap_hwmod *oh,
4002                                            void *user),
4003                                  void *user)
4004 {
4005         struct omap_hwmod *temp_oh;
4006         int ret = 0;
4007 
4008         if (!classname || !fn)
4009                 return -EINVAL;
4010 
4011         pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4012                  __func__, classname);
4013 
4014         list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
4015                 if (!strcmp(temp_oh->class->name, classname)) {
4016                         pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4017                                  __func__, temp_oh->name);
4018                         ret = (*fn)(temp_oh, user);
4019                         if (ret)
4020                                 break;
4021                 }
4022         }
4023 
4024         if (ret)
4025                 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4026                          __func__, ret);
4027 
4028         return ret;
4029 }
4030 
4031 /**
4032  * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4033  * @oh: struct omap_hwmod *
4034  * @state: state that _setup() should leave the hwmod in
4035  *
4036  * Sets the hwmod state that @oh will enter at the end of _setup()
4037  * (called by omap_hwmod_setup_*()).  See also the documentation
4038  * for _setup_postsetup(), above.  Returns 0 upon success or
4039  * -EINVAL if there is a problem with the arguments or if the hwmod is
4040  * in the wrong state.
4041  */
4042 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4043 {
4044         int ret;
4045         unsigned long flags;
4046 
4047         if (!oh)
4048                 return -EINVAL;
4049 
4050         if (state != _HWMOD_STATE_DISABLED &&
4051             state != _HWMOD_STATE_ENABLED &&
4052             state != _HWMOD_STATE_IDLE)
4053                 return -EINVAL;
4054 
4055         spin_lock_irqsave(&oh->_lock, flags);
4056 
4057         if (oh->_state != _HWMOD_STATE_REGISTERED) {
4058                 ret = -EINVAL;
4059                 goto ohsps_unlock;
4060         }
4061 
4062         oh->_postsetup_state = state;
4063         ret = 0;
4064 
4065 ohsps_unlock:
4066         spin_unlock_irqrestore(&oh->_lock, flags);
4067 
4068         return ret;
4069 }
4070 
4071 /**
4072  * omap_hwmod_get_context_loss_count - get lost context count
4073  * @oh: struct omap_hwmod *
4074  *
4075  * Returns the context loss count of associated @oh
4076  * upon success, or zero if no context loss data is available.
4077  *
4078  * On OMAP4, this queries the per-hwmod context loss register,
4079  * assuming one exists.  If not, or on OMAP2/3, this queries the
4080  * enclosing powerdomain context loss count.
4081  */
4082 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4083 {
4084         struct powerdomain *pwrdm;
4085         int ret = 0;
4086 
4087         if (soc_ops.get_context_lost)
4088                 return soc_ops.get_context_lost(oh);
4089 
4090         pwrdm = omap_hwmod_get_pwrdm(oh);
4091         if (pwrdm)
4092                 ret = pwrdm_get_context_loss_count(pwrdm);
4093 
4094         return ret;
4095 }
4096 
4097 /**
4098  * omap_hwmod_init - initialize the hwmod code
4099  *
4100  * Sets up some function pointers needed by the hwmod code to operate on the
4101  * currently-booted SoC.  Intended to be called once during kernel init
4102  * before any hwmods are registered.  No return value.
4103  */
4104 void __init omap_hwmod_init(void)
4105 {
4106         if (cpu_is_omap24xx()) {
4107                 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4108                 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4109                 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4110                 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4111         } else if (cpu_is_omap34xx()) {
4112                 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4113                 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4114                 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4115                 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4116                 soc_ops.init_clkdm = _init_clkdm;
4117         } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4118                 soc_ops.enable_module = _omap4_enable_module;
4119                 soc_ops.disable_module = _omap4_disable_module;
4120                 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4121                 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4122                 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4123                 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4124                 soc_ops.init_clkdm = _init_clkdm;
4125                 soc_ops.update_context_lost = _omap4_update_context_lost;
4126                 soc_ops.get_context_lost = _omap4_get_context_lost;
4127                 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4128                 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4129         } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4130                    soc_is_am43xx()) {
4131                 soc_ops.enable_module = _omap4_enable_module;
4132                 soc_ops.disable_module = _omap4_disable_module;
4133                 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4134                 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4135                 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4136                 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4137                 soc_ops.init_clkdm = _init_clkdm;
4138                 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4139                 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4140         } else {
4141                 WARN(1, "omap_hwmod: unknown SoC type\n");
4142         }
4143 
4144         _init_clkctrl_providers();
4145 
4146         inited = true;
4147 }
4148 
4149 /**
4150  * omap_hwmod_get_main_clk - get pointer to main clock name
4151  * @oh: struct omap_hwmod *
4152  *
4153  * Returns the main clock name assocated with @oh upon success,
4154  * or NULL if @oh is NULL.
4155  */
4156 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4157 {
4158         if (!oh)
4159                 return NULL;
4160 
4161         return oh->main_clk;
4162 }