root/arch/arm/mach-omap2/prm2xxx.h

/* [<][>][^][v][top][bottom][index][help] */

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * OMAP2xxx Power/Reset Management (PRM) register definitions
   4  *
   5  * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc.
   6  * Copyright (C) 2008-2010 Nokia Corporation
   7  * Paul Walmsley
   8  *
   9  * The PRM hardware modules on the OMAP2/3 are quite similar to each
  10  * other.  The PRM on OMAP4 has a new register layout, and is handled
  11  * in a separate file.
  12  */
  13 #ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_H
  14 #define __ARCH_ARM_MACH_OMAP2_PRM2XXX_H
  15 
  16 #include "prcm-common.h"
  17 #include "prm.h"
  18 #include "prm2xxx_3xxx.h"
  19 
  20 #define OMAP2420_PRM_REGADDR(module, reg)                               \
  21                 OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
  22 #define OMAP2430_PRM_REGADDR(module, reg)                               \
  23                 OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
  24 
  25 /*
  26  * OMAP2-specific global PRM registers
  27  * Use {read,write}l_relaxed() with these registers.
  28  *
  29  * With a few exceptions, these are the register names beginning with
  30  * PRCM_* on 24xx.  (The exceptions are the IRQSTATUS and IRQENABLE
  31  * bits.)
  32  *
  33  */
  34 
  35 #define OMAP2_PRCM_REVISION_OFFSET      0x0000
  36 #define OMAP2420_PRCM_REVISION          OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000)
  37 #define OMAP2_PRCM_SYSCONFIG_OFFSET     0x0010
  38 #define OMAP2420_PRCM_SYSCONFIG         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010)
  39 
  40 #define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018
  41 #define OMAP2420_PRCM_IRQSTATUS_MPU     OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018)
  42 #define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c
  43 #define OMAP2420_PRCM_IRQENABLE_MPU     OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c)
  44 
  45 #define OMAP2_PRCM_VOLTCTRL_OFFSET      0x0050
  46 #define OMAP2420_PRCM_VOLTCTRL          OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050)
  47 #define OMAP2_PRCM_VOLTST_OFFSET        0x0054
  48 #define OMAP2420_PRCM_VOLTST            OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054)
  49 #define OMAP2_PRCM_CLKSRC_CTRL_OFFSET   0x0060
  50 #define OMAP2420_PRCM_CLKSRC_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060)
  51 #define OMAP2_PRCM_CLKOUT_CTRL_OFFSET   0x0070
  52 #define OMAP2420_PRCM_CLKOUT_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070)
  53 #define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET  0x0078
  54 #define OMAP2420_PRCM_CLKEMUL_CTRL      OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078)
  55 #define OMAP2_PRCM_CLKCFG_CTRL_OFFSET   0x0080
  56 #define OMAP2420_PRCM_CLKCFG_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080)
  57 #define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084
  58 #define OMAP2420_PRCM_CLKCFG_STATUS     OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084)
  59 #define OMAP2_PRCM_VOLTSETUP_OFFSET     0x0090
  60 #define OMAP2420_PRCM_VOLTSETUP         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090)
  61 #define OMAP2_PRCM_CLKSSETUP_OFFSET     0x0094
  62 #define OMAP2420_PRCM_CLKSSETUP         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094)
  63 #define OMAP2_PRCM_POLCTRL_OFFSET       0x0098
  64 #define OMAP2420_PRCM_POLCTRL           OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098)
  65 
  66 #define OMAP2430_PRCM_REVISION          OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000)
  67 #define OMAP2430_PRCM_SYSCONFIG         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010)
  68 
  69 #define OMAP2430_PRCM_IRQSTATUS_MPU     OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018)
  70 #define OMAP2430_PRCM_IRQENABLE_MPU     OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c)
  71 
  72 #define OMAP2430_PRCM_VOLTCTRL          OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050)
  73 #define OMAP2430_PRCM_VOLTST            OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054)
  74 #define OMAP2430_PRCM_CLKSRC_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060)
  75 #define OMAP2430_PRCM_CLKOUT_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070)
  76 #define OMAP2430_PRCM_CLKEMUL_CTRL      OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078)
  77 #define OMAP2430_PRCM_CLKCFG_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080)
  78 #define OMAP2430_PRCM_CLKCFG_STATUS     OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084)
  79 #define OMAP2430_PRCM_VOLTSETUP         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090)
  80 #define OMAP2430_PRCM_CLKSSETUP         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094)
  81 #define OMAP2430_PRCM_POLCTRL           OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098)
  82 
  83 /*
  84  * Module specific PRM register offsets from PRM_BASE + domain offset
  85  *
  86  * Use prm_{read,write}_mod_reg() with these registers.
  87  *
  88  * With a few exceptions, these are the register names beginning with
  89  * {PM,RM}_* on both OMAP2/3 SoC families..  (The exceptions are the
  90  * IRQSTATUS and IRQENABLE bits.)
  91  */
  92 
  93 /* Register offsets appearing on both OMAP2 and OMAP3 */
  94 
  95 #define OMAP2_RM_RSTCTRL                                0x0050
  96 #define OMAP2_RM_RSTTIME                                0x0054
  97 #define OMAP2_RM_RSTST                                  0x0058
  98 #define OMAP2_PM_PWSTCTRL                               0x00e0
  99 #define OMAP2_PM_PWSTST                                 0x00e4
 100 
 101 #define PM_WKEN                                         0x00a0
 102 #define PM_WKEN1                                        PM_WKEN
 103 #define PM_WKST                                         0x00b0
 104 #define PM_WKST1                                        PM_WKST
 105 #define PM_WKDEP                                        0x00c8
 106 #define PM_EVGENCTRL                                    0x00d4
 107 #define PM_EVGENONTIM                                   0x00d8
 108 #define PM_EVGENOFFTIM                                  0x00dc
 109 
 110 /* OMAP2xxx specific register offsets */
 111 #define OMAP24XX_PM_WKEN2                               0x00a4
 112 #define OMAP24XX_PM_WKST2                               0x00b4
 113 
 114 #define OMAP24XX_PRCM_IRQSTATUS_DSP                     0x00f0  /* IVA mod */
 115 #define OMAP24XX_PRCM_IRQENABLE_DSP                     0x00f4  /* IVA mod */
 116 #define OMAP24XX_PRCM_IRQSTATUS_IVA                     0x00f8
 117 #define OMAP24XX_PRCM_IRQENABLE_IVA                     0x00fc
 118 
 119 #ifndef __ASSEMBLER__
 120 /* Function prototypes */
 121 extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
 122 extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
 123 
 124 int __init omap2xxx_prm_init(const struct omap_prcm_init_data *data);
 125 
 126 #endif
 127 
 128 #endif
/* [<][>][^][v][top][bottom][index][help] */