root/arch/arm/mach-imx/iomux-v1.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
   4  * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
   5  */
   6 #ifndef __MACH_IOMUX_V1_H__
   7 #define __MACH_IOMUX_V1_H__
   8 
   9 /*
  10 *  GPIO Module and I/O Multiplexer
  11 *  x = 0..3 for reg_A, reg_B, reg_C, reg_D
  12 */
  13 #define MXC_DDIR(x)     (0x00 + ((x) << 8))
  14 #define MXC_OCR1(x)     (0x04 + ((x) << 8))
  15 #define MXC_OCR2(x)     (0x08 + ((x) << 8))
  16 #define MXC_ICONFA1(x)  (0x0c + ((x) << 8))
  17 #define MXC_ICONFA2(x)  (0x10 + ((x) << 8))
  18 #define MXC_ICONFB1(x)  (0x14 + ((x) << 8))
  19 #define MXC_ICONFB2(x)  (0x18 + ((x) << 8))
  20 #define MXC_DR(x)       (0x1c + ((x) << 8))
  21 #define MXC_GIUS(x)     (0x20 + ((x) << 8))
  22 #define MXC_SSR(x)      (0x24 + ((x) << 8))
  23 #define MXC_ICR1(x)     (0x28 + ((x) << 8))
  24 #define MXC_ICR2(x)     (0x2c + ((x) << 8))
  25 #define MXC_IMR(x)      (0x30 + ((x) << 8))
  26 #define MXC_ISR(x)      (0x34 + ((x) << 8))
  27 #define MXC_GPR(x)      (0x38 + ((x) << 8))
  28 #define MXC_SWR(x)      (0x3c + ((x) << 8))
  29 #define MXC_PUEN(x)     (0x40 + ((x) << 8))
  30 
  31 #define MX1_NUM_GPIO_PORT       4
  32 #define MX21_NUM_GPIO_PORT      6
  33 #define MX27_NUM_GPIO_PORT      6
  34 
  35 #define GPIO_PIN_MASK 0x1f
  36 
  37 #define GPIO_PORT_SHIFT 5
  38 #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
  39 
  40 #define GPIO_PORTA      (0 << GPIO_PORT_SHIFT)
  41 #define GPIO_PORTB      (1 << GPIO_PORT_SHIFT)
  42 #define GPIO_PORTC      (2 << GPIO_PORT_SHIFT)
  43 #define GPIO_PORTD      (3 << GPIO_PORT_SHIFT)
  44 #define GPIO_PORTE      (4 << GPIO_PORT_SHIFT)
  45 #define GPIO_PORTF      (5 << GPIO_PORT_SHIFT)
  46 
  47 #define GPIO_OUT        (1 << 8)
  48 #define GPIO_IN         (0 << 8)
  49 #define GPIO_PUEN       (1 << 9)
  50 
  51 #define GPIO_PF         (1 << 10)
  52 #define GPIO_AF         (1 << 11)
  53 
  54 #define GPIO_OCR_SHIFT 12
  55 #define GPIO_OCR_MASK   (3 << GPIO_OCR_SHIFT)
  56 #define GPIO_AIN        (0 << GPIO_OCR_SHIFT)
  57 #define GPIO_BIN        (1 << GPIO_OCR_SHIFT)
  58 #define GPIO_CIN        (2 << GPIO_OCR_SHIFT)
  59 #define GPIO_GPIO       (3 << GPIO_OCR_SHIFT)
  60 
  61 #define GPIO_AOUT_SHIFT 14
  62 #define GPIO_AOUT_MASK  (3 << GPIO_AOUT_SHIFT)
  63 #define GPIO_AOUT       (0 << GPIO_AOUT_SHIFT)
  64 #define GPIO_AOUT_ISR   (1 << GPIO_AOUT_SHIFT)
  65 #define GPIO_AOUT_0     (2 << GPIO_AOUT_SHIFT)
  66 #define GPIO_AOUT_1     (3 << GPIO_AOUT_SHIFT)
  67 
  68 #define GPIO_BOUT_SHIFT 16
  69 #define GPIO_BOUT_MASK  (3 << GPIO_BOUT_SHIFT)
  70 #define GPIO_BOUT       (0 << GPIO_BOUT_SHIFT)
  71 #define GPIO_BOUT_ISR   (1 << GPIO_BOUT_SHIFT)
  72 #define GPIO_BOUT_0     (2 << GPIO_BOUT_SHIFT)
  73 #define GPIO_BOUT_1     (3 << GPIO_BOUT_SHIFT)
  74 
  75 extern int mxc_gpio_mode(int gpio_mode);
  76 extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
  77                 const char *label);
  78 
  79 extern int imx_iomuxv1_init(void __iomem *base, int numports);
  80 
  81 #endif /* __MACH_IOMUX_V1_H__ */