root/arch/arm/mach-imx/mxc.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. cpu_is_imx6sl
  2. cpu_is_imx6sl
  3. cpu_is_imx6dl
  4. cpu_is_imx6sx
  5. cpu_is_imx6ul
  6. cpu_is_imx6ull
  7. cpu_is_imx6ulz
  8. cpu_is_imx6sll
  9. cpu_is_imx6q
  10. cpu_is_imx7d

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
   4  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
   5  */
   6 
   7 #ifndef __ASM_ARCH_MXC_H__
   8 #define __ASM_ARCH_MXC_H__
   9 
  10 #include <linux/types.h>
  11 
  12 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
  13 #error "Do not include directly."
  14 #endif
  15 
  16 #define MXC_CPU_MX1             1
  17 #define MXC_CPU_MX21            21
  18 #define MXC_CPU_MX25            25
  19 #define MXC_CPU_MX27            27
  20 #define MXC_CPU_MX31            31
  21 #define MXC_CPU_MX35            35
  22 #define MXC_CPU_MX51            51
  23 #define MXC_CPU_MX53            53
  24 #define MXC_CPU_IMX6SL          0x60
  25 #define MXC_CPU_IMX6DL          0x61
  26 #define MXC_CPU_IMX6SX          0x62
  27 #define MXC_CPU_IMX6Q           0x63
  28 #define MXC_CPU_IMX6UL          0x64
  29 #define MXC_CPU_IMX6ULL         0x65
  30 /* virtual cpu id for i.mx6ulz */
  31 #define MXC_CPU_IMX6ULZ         0x6b
  32 #define MXC_CPU_IMX6SLL         0x67
  33 #define MXC_CPU_IMX7D           0x72
  34 #define MXC_CPU_IMX7ULP         0xff
  35 
  36 #define IMX_DDR_TYPE_LPDDR2             1
  37 
  38 #ifndef __ASSEMBLY__
  39 extern unsigned int __mxc_cpu_type;
  40 
  41 #ifdef CONFIG_SOC_IMX6SL
  42 static inline bool cpu_is_imx6sl(void)
  43 {
  44         return __mxc_cpu_type == MXC_CPU_IMX6SL;
  45 }
  46 #else
  47 static inline bool cpu_is_imx6sl(void)
  48 {
  49         return false;
  50 }
  51 #endif
  52 
  53 static inline bool cpu_is_imx6dl(void)
  54 {
  55         return __mxc_cpu_type == MXC_CPU_IMX6DL;
  56 }
  57 
  58 static inline bool cpu_is_imx6sx(void)
  59 {
  60         return __mxc_cpu_type == MXC_CPU_IMX6SX;
  61 }
  62 
  63 static inline bool cpu_is_imx6ul(void)
  64 {
  65         return __mxc_cpu_type == MXC_CPU_IMX6UL;
  66 }
  67 
  68 static inline bool cpu_is_imx6ull(void)
  69 {
  70         return __mxc_cpu_type == MXC_CPU_IMX6ULL;
  71 }
  72 
  73 static inline bool cpu_is_imx6ulz(void)
  74 {
  75         return __mxc_cpu_type == MXC_CPU_IMX6ULZ;
  76 }
  77 
  78 static inline bool cpu_is_imx6sll(void)
  79 {
  80         return __mxc_cpu_type == MXC_CPU_IMX6SLL;
  81 }
  82 
  83 static inline bool cpu_is_imx6q(void)
  84 {
  85         return __mxc_cpu_type == MXC_CPU_IMX6Q;
  86 }
  87 
  88 static inline bool cpu_is_imx7d(void)
  89 {
  90         return __mxc_cpu_type == MXC_CPU_IMX7D;
  91 }
  92 
  93 struct cpu_op {
  94         u32 cpu_rate;
  95 };
  96 
  97 int tzic_enable_wake(void);
  98 
  99 extern struct cpu_op *(*get_cpu_op)(int *op);
 100 #endif
 101 
 102 #define imx_readl       readl_relaxed
 103 #define imx_readw       readw_relaxed
 104 #define imx_writel      writel_relaxed
 105 #define imx_writew      writew_relaxed
 106 
 107 #endif /*  __ASM_ARCH_MXC_H__ */

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