This source file includes following definitions.
- mx27_map_io
- imx27_init_early
- mx27_init_irq
- imx27_soc_init
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8 #include <linux/mm.h>
9 #include <linux/init.h>
10 #include <linux/pinctrl/machine.h>
11 #include <asm/pgtable.h>
12 #include <asm/mach/map.h>
13
14 #include "common.h"
15 #include "devices/devices-common.h"
16 #include "hardware.h"
17 #include "iomux-v1.h"
18
19
20 static struct map_desc imx27_io_desc[] __initdata = {
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29 imx_map_entry(MX27, AIPI, MT_DEVICE),
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35 imx_map_entry(MX27, SAHB1, MT_DEVICE),
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40 imx_map_entry(MX27, X_MEMC, MT_DEVICE),
41 };
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47
48 void __init mx27_map_io(void)
49 {
50 iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
51 }
52
53 void __init imx27_init_early(void)
54 {
55 mxc_set_cpu_type(MXC_CPU_MX27);
56 imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
57 MX27_NUM_GPIO_PORT);
58 }
59
60 void __init mx27_init_irq(void)
61 {
62 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
63 }
64
65 static const struct resource imx27_audmux_res[] __initconst = {
66 DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K),
67 };
68
69 void __init imx27_soc_init(void)
70 {
71 mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
72 mxc_device_init();
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74
75 mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
76 mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
77 mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
78 mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
79 mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
80 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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82 pinctrl_provide_dummies();
83 imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,
84 MX27_INT_DMACH0, 0);
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86 platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
87 ARRAY_SIZE(imx27_audmux_res));
88
89 imx27_pm_init();
90 }