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8 #ifndef __QDIO_H__
9 #define __QDIO_H__
10
11 #include <linux/interrupt.h>
12 #include <asm/cio.h>
13 #include <asm/ccwdev.h>
14
15
16 #define QDIO_MAX_QUEUES_PER_IRQ 4
17 #define QDIO_MAX_BUFFERS_PER_Q 128
18 #define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
19 #define QDIO_BUFNR(num) ((num) & QDIO_MAX_BUFFERS_MASK)
20 #define QDIO_MAX_ELEMENTS_PER_BUFFER 16
21 #define QDIO_SBAL_SIZE 256
22
23 #define QDIO_QETH_QFMT 0
24 #define QDIO_ZFCP_QFMT 1
25 #define QDIO_IQDIO_QFMT 2
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37 struct qdesfmt0 {
38 u64 sliba;
39 u64 sla;
40 u64 slsba;
41 u32 : 32;
42 u32 akey : 4;
43 u32 bkey : 4;
44 u32 ckey : 4;
45 u32 dkey : 4;
46 u32 : 16;
47 } __attribute__ ((packed));
48
49 #define QDR_AC_MULTI_BUFFER_ENABLE 0x01
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63 struct qdr {
64 u32 qfmt : 8;
65 u32 : 16;
66 u32 ac : 8;
67 u32 : 8;
68 u32 iqdcnt : 8;
69 u32 : 8;
70 u32 oqdcnt : 8;
71 u32 : 8;
72 u32 iqdsz : 8;
73 u32 : 8;
74 u32 oqdsz : 8;
75
76 u32 res[9];
77
78 u64 qiba;
79 u32 : 32;
80 u32 qkey : 4;
81 u32 : 28;
82 struct qdesfmt0 qdf0[126];
83 } __packed __aligned(PAGE_SIZE);
84
85 #define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
86 #define QIB_RFLAGS_ENABLE_QEBSM 0x80
87 #define QIB_RFLAGS_ENABLE_DATA_DIV 0x02
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100 struct qib {
101 u32 qfmt : 8;
102 u32 pfmt : 8;
103 u32 rflags : 8;
104 u32 ac : 8;
105 u32 : 32;
106 u64 isliba;
107 u64 osliba;
108 u32 : 32;
109 u32 : 32;
110 u8 ebcnam[8];
111
112 u8 res[88];
113
114 u8 parm[128];
115 } __attribute__ ((packed, aligned(256)));
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121 struct slibe {
122 u64 parms;
123 };
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142 struct qaob {
143 u64 res0[6];
144 u8 res1;
145 u8 res2;
146 u8 res3;
147 u8 aorc;
148 u8 flags;
149 u16 cbtbs;
150 u8 sb_count;
151 u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
152 u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
153 u64 user0;
154 u64 res4[2];
155 u64 user1;
156 u64 user2;
157 } __attribute__ ((packed, aligned(256)));
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166 struct slib {
167 u64 nsliba;
168 u64 sla;
169 u64 slsba;
170
171 u8 res[1000];
172
173 struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
174 } __attribute__ ((packed, aligned(2048)));
175
176 #define SBAL_EFLAGS_LAST_ENTRY 0x40
177 #define SBAL_EFLAGS_CONTIGUOUS 0x20
178 #define SBAL_EFLAGS_FIRST_FRAG 0x04
179 #define SBAL_EFLAGS_MIDDLE_FRAG 0x08
180 #define SBAL_EFLAGS_LAST_FRAG 0x0c
181 #define SBAL_EFLAGS_MASK 0x6f
182
183 #define SBAL_SFLAGS0_PCI_REQ 0x40
184 #define SBAL_SFLAGS0_DATA_CONTINUATION 0x20
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187 #define SBAL_SFLAGS0_TYPE_STATUS 0x00
188 #define SBAL_SFLAGS0_TYPE_WRITE 0x08
189 #define SBAL_SFLAGS0_TYPE_READ 0x10
190 #define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18
191 #define SBAL_SFLAGS0_MORE_SBALS 0x04
192 #define SBAL_SFLAGS0_COMMAND 0x02
193 #define SBAL_SFLAGS0_LAST_SBAL 0x00
194 #define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND
195 #define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS
196 #define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
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206 struct qdio_buffer_element {
207 u8 eflags;
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209 u8 res1;
210
211 u8 scount;
212 u8 sflags;
213 u32 length;
214 void *addr;
215 } __attribute__ ((packed, aligned(16)));
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221 struct qdio_buffer {
222 struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
223 } __attribute__ ((packed, aligned(256)));
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229 struct sl_element {
230 u64 sbal;
231 } __attribute__ ((packed));
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237 struct sl {
238 struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
239 } __attribute__ ((packed, aligned(1024)));
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245 struct slsb {
246 u8 val[QDIO_MAX_BUFFERS_PER_Q];
247 } __attribute__ ((packed, aligned(256)));
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257 struct qdio_outbuf_state {
258 u8 flags;
259 void *user;
260 };
261
262 #define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01
263
264 #define CHSC_AC1_INITIATE_INPUTQ 0x80
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268 #define AC1_SIGA_INPUT_NEEDED 0x40
269 #define AC1_SIGA_OUTPUT_NEEDED 0x20
270 #define AC1_SIGA_SYNC_NEEDED 0x10
271 #define AC1_AUTOMATIC_SYNC_ON_THININT 0x08
272 #define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04
273 #define AC1_SC_QEBSM_AVAILABLE 0x02
274 #define AC1_SC_QEBSM_ENABLED 0x01
275
276 #define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
277 #define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040
278 #define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010
279 #define CHSC_AC2_DATA_DIV_ENABLED 0x0002
280
281 #define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000
282
283 struct qdio_ssqd_desc {
284 u8 flags;
285 u8:8;
286 u16 sch;
287 u8 qfmt;
288 u8 parm;
289 u8 qdioac1;
290 u8 sch_class;
291 u8 pcnt;
292 u8 icnt;
293 u8:8;
294 u8 ocnt;
295 u8:8;
296 u8 mbccnt;
297 u16 qdioac2;
298 u64 sch_token;
299 u8 mro;
300 u8 mri;
301 u16 qdioac3;
302 u16:16;
303 u8:8;
304 u8 mmwc;
305 } __attribute__ ((packed));
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309 typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
310 int, int, unsigned long);
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313 #define QDIO_ERROR_ACTIVATE 0x0001
314 #define QDIO_ERROR_GET_BUF_STATE 0x0002
315 #define QDIO_ERROR_SET_BUF_STATE 0x0004
316 #define QDIO_ERROR_SLSB_STATE 0x0100
317
318 #define QDIO_ERROR_FATAL 0x00ff
319 #define QDIO_ERROR_TEMPORARY 0xff00
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322 #define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
323 #define QDIO_FLAG_CLEANUP_USING_HALT 0x02
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347 struct qdio_initialize {
348 struct ccw_device *cdev;
349 unsigned char q_format;
350 unsigned char qdr_ac;
351 unsigned char adapter_name[8];
352 unsigned int qib_param_field_format;
353 unsigned char *qib_param_field;
354 unsigned char qib_rflags;
355 unsigned long *input_slib_elements;
356 unsigned long *output_slib_elements;
357 unsigned int no_input_qs;
358 unsigned int no_output_qs;
359 qdio_handler_t *input_handler;
360 qdio_handler_t *output_handler;
361 void (**queue_start_poll_array) (struct ccw_device *, int,
362 unsigned long);
363 unsigned int scan_threshold;
364 unsigned long int_parm;
365 struct qdio_buffer **input_sbal_addr_array;
366 struct qdio_buffer **output_sbal_addr_array;
367 struct qdio_outbuf_state *output_sbal_state_array;
368 };
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376 enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid};
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385 struct qdio_brinfo_entry_l3_ipv6 {
386 u64 nit;
387 struct { unsigned char _s6_addr[16]; } addr;
388 } __packed;
389 struct qdio_brinfo_entry_l3_ipv4 {
390 u64 nit;
391 struct { uint32_t _s_addr; } addr;
392 } __packed;
393 struct qdio_brinfo_entry_l2 {
394 u64 nit;
395 struct { u8 mac[6]; u16 lnid; } addr_lnid;
396 } __packed;
397
398 #define QDIO_STATE_INACTIVE 0x00000002
399 #define QDIO_STATE_ESTABLISHED 0x00000004
400 #define QDIO_STATE_ACTIVE 0x00000008
401 #define QDIO_STATE_STOPPED 0x00000010
402
403 #define QDIO_FLAG_SYNC_INPUT 0x01
404 #define QDIO_FLAG_SYNC_OUTPUT 0x02
405 #define QDIO_FLAG_PCI_OUT 0x10
406
407 int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
408 void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
409 void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
410
411 extern int qdio_allocate(struct qdio_initialize *);
412 extern int qdio_establish(struct qdio_initialize *);
413 extern int qdio_activate(struct ccw_device *);
414 extern void qdio_release_aob(struct qaob *);
415 extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
416 unsigned int);
417 extern int qdio_start_irq(struct ccw_device *, int);
418 extern int qdio_stop_irq(struct ccw_device *, int);
419 extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
420 extern int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr,
421 bool is_input, unsigned int *bufnr,
422 unsigned int *error);
423 extern int qdio_shutdown(struct ccw_device *, int);
424 extern int qdio_free(struct ccw_device *);
425 extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
426 extern int qdio_pnso_brinfo(struct subchannel_id schid,
427 int cnc, u16 *response,
428 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
429 void *entry),
430 void *priv);
431
432 #endif