mcp77_clk          24 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c #define mcp77_clk(p) container_of((p), struct mcp77_clk, base)
mcp77_clk          42 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c read_div(struct mcp77_clk *clk)
mcp77_clk          49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c read_pll(struct mcp77_clk *clk, u32 base)
mcp77_clk          83 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	struct mcp77_clk *clk = mcp77_clk(base);
mcp77_clk         165 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c calc_pll(struct mcp77_clk *clk, u32 reg,
mcp77_clk         205 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	struct mcp77_clk *clk = mcp77_clk(base);
mcp77_clk         301 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	struct mcp77_clk *clk = mcp77_clk(base);
mcp77_clk         399 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c mcp77_clk = {
mcp77_clk         417 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	struct mcp77_clk *clk;
mcp77_clk         423 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	return nvkm_clk_ctor(&mcp77_clk, device, index, true, &clk->base);