mcf_mapirq2imr    600 arch/m68k/coldfire/device.c 	mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);
mcf_mapirq2imr    605 arch/m68k/coldfire/device.c 	mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);
mcf_mapirq2imr     50 arch/m68k/coldfire/m5206.c 	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr     65 arch/m68k/coldfire/m5206.c 	mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr     66 arch/m68k/coldfire/m5206.c 	mcf_mapirq2imr(28, MCFINTC_EINT4);
mcf_mapirq2imr     67 arch/m68k/coldfire/m5206.c 	mcf_mapirq2imr(31, MCFINTC_EINT7);
mcf_mapirq2imr     87 arch/m68k/coldfire/m5249.c 	mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
mcf_mapirq2imr    101 arch/m68k/coldfire/m5249.c 	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr     61 arch/m68k/coldfire/m525x.c 	mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
mcf_mapirq2imr     73 arch/m68k/coldfire/m525x.c 	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr     59 arch/m68k/coldfire/m5307.c 	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr     77 arch/m68k/coldfire/m5307.c 	mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr     78 arch/m68k/coldfire/m5307.c 	mcf_mapirq2imr(27, MCFINTC_EINT3);
mcf_mapirq2imr     79 arch/m68k/coldfire/m5307.c 	mcf_mapirq2imr(29, MCFINTC_EINT5);
mcf_mapirq2imr     80 arch/m68k/coldfire/m5307.c 	mcf_mapirq2imr(31, MCFINTC_EINT7);
mcf_mapirq2imr     50 arch/m68k/coldfire/m5407.c 	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr     61 arch/m68k/coldfire/m5407.c 	mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr     62 arch/m68k/coldfire/m5407.c 	mcf_mapirq2imr(27, MCFINTC_EINT3);
mcf_mapirq2imr     63 arch/m68k/coldfire/m5407.c 	mcf_mapirq2imr(29, MCFINTC_EINT5);
mcf_mapirq2imr     64 arch/m68k/coldfire/m5407.c 	mcf_mapirq2imr(31, MCFINTC_EINT7);
mcf_mapirq2imr     61 arch/m68k/coldfire/timers.c 	mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
mcf_mapirq2imr     67 arch/m68k/coldfire/timers.c 	mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);