CNTR_ALL 845 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CPU_CYCLES] = { 0x01, CNTR_ALL }, CNTR_ALL 846 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_INSTRUCTIONS] = { 0x03, CNTR_ALL }, CNTR_ALL 847 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x2b, CNTR_ALL }, CNTR_ALL 848 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_MISSES] = { 0x2e, CNTR_ALL }, CNTR_ALL 849 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x08, CNTR_ALL }, CNTR_ALL 850 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_BRANCH_MISSES] = { 0x09, CNTR_ALL }, CNTR_ALL 851 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_BUS_CYCLES] = { 0x25, CNTR_ALL }, CNTR_ALL 862 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CPU_CYCLES] = { 0x01, CNTR_ALL }, CNTR_ALL 863 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_INSTRUCTIONS] = { 0x18, CNTR_ALL }, /* PAPI_TOT_INS */ CNTR_ALL 864 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */ CNTR_ALL 865 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_MISSES] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */ CNTR_ALL 866 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x1b, CNTR_ALL }, /* PAPI_BR_CN */ CNTR_ALL 867 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_BRANCH_MISSES] = { 0x1c, CNTR_ALL }, /* PAPI_BR_MSP */ CNTR_ALL 1188 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x2b, CNTR_ALL }, CNTR_ALL 1189 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, CNTR_ALL 1192 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x30, CNTR_ALL }, CNTR_ALL 1197 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x18, CNTR_ALL }, CNTR_ALL 1200 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x19, CNTR_ALL }, CNTR_ALL 1209 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x35, CNTR_ALL }, CNTR_ALL 1212 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x35, CNTR_ALL }, CNTR_ALL 1217 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x37, CNTR_ALL }, CNTR_ALL 1228 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x31, CNTR_ALL }, /* PAPI_L1_DCR */ CNTR_ALL 1229 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x30, CNTR_ALL }, /* PAPI_L1_LDM */ CNTR_ALL 1232 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x2f, CNTR_ALL }, /* PAPI_L1_DCW */ CNTR_ALL 1233 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, /* PAPI_L1_STM */ CNTR_ALL 1238 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */ CNTR_ALL 1239 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */ CNTR_ALL 1244 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x35, CNTR_ALL }, /* PAPI_L2_DCR */ CNTR_ALL 1245 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x37, CNTR_ALL }, /* PAPI_L2_LDM */ CNTR_ALL 1248 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_ACCESS)] = { 0x34, CNTR_ALL }, /* PAPI_L2_DCA */ CNTR_ALL 1249 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x36, CNTR_ALL }, /* PAPI_L2_DCM */ CNTR_ALL 1258 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */ CNTR_ALL 1261 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */ CNTR_ALL 1266 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */ CNTR_ALL 1269 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */ CNTR_ALL 1274 arch/mips/kernel/perf_event_mipsxx.c [C(RESULT_MISS)] = { 0x25, CNTR_ALL }, CNTR_ALL 1642 arch/mips/kernel/perf_event_mipsxx.c raw_event.cntr_mask = CNTR_ALL; CNTR_ALL 1677 arch/mips/kernel/perf_event_mipsxx.c raw_event.cntr_mask = CNTR_ALL;