mbox_write_reg 155 drivers/mailbox/omap-mailbox.c mbox_write_reg(mbox->parent, msg, fifo->msg); mbox_write_reg 180 drivers/mailbox/omap-mailbox.c mbox_write_reg(mbox->parent, bit, irqstatus); mbox_write_reg 210 drivers/mailbox/omap-mailbox.c mbox_write_reg(mbox->parent, l, irqenable); mbox_write_reg 227 drivers/mailbox/omap-mailbox.c mbox_write_reg(mbox->parent, bit, irqdisable); mbox_write_reg 635 drivers/mailbox/omap-mailbox.c mbox_write_reg(mdev, mdev->irq_ctx[usr], reg); mbox_write_reg 694 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c val64 = readq(oct->mbox[q_no]->mbox_write_reg); mbox_write_reg 741 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c mbox->mbox_write_reg = (u8 *)oct->mmio[0].hw_addr + mbox_write_reg 303 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c mbox->mbox_write_reg = mbox_write_reg 163 drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) { mbox_write_reg 172 drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg); mbox_write_reg 175 drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c while (readq(mbox->mbox_write_reg) != mbox_write_reg 184 drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c writeq(mbox_cmd->data[i], mbox->mbox_write_reg); mbox_write_reg 99 drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h void *mbox_write_reg;