malidp_write32_mask 194 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0); malidp_write32_mask 266 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c malidp_write32_mask(reg, BLK_CONTROL, ctrl_mask, ctrl); malidp_write32_mask 394 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl); malidp_write32_mask 429 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0); malidp_write32_mask 1026 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c malidp_write32_mask(c->reg, BLK_CONTROL, BS_CTRL_EN, 0); malidp_write32_mask 49 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_STATUS, restore, 0); malidp_write32_mask 75 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, LPU_TBU_STATUS, restore, 0); malidp_write32_mask 101 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_STATUS, status, 0); malidp_write32_mask 143 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_STATUS, restore, 0); malidp_write32_mask 184 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(d71->gcu_addr, BLK_STATUS, malidp_write32_mask 213 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, malidp_write32_mask 217 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->cu_addr, BLK_IRQ_MASK, malidp_write32_mask 219 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->lpu_addr, BLK_IRQ_MASK, malidp_write32_mask 221 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK, malidp_write32_mask 233 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, ENABLED_GCU_IRQS, 0); malidp_write32_mask 236 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->cu_addr, BLK_IRQ_MASK, malidp_write32_mask 238 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->lpu_addr, BLK_IRQ_MASK, malidp_write32_mask 240 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK, malidp_write32_mask 251 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK, malidp_write32_mask 278 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(d71->gcu_addr, BLK_CONTROL, 0x7, opmode); malidp_write32_mask 301 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(gcu, BLK_CONTROL, malidp_write32_mask 527 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_CONTROL, 0x7, TBU_CONNECT_MODE); malidp_write32_mask 533 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_CONTROL, 0x7, INACTIVE_MODE); malidp_write32_mask 538 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(d71->pipes[i]->lpu_addr, LPU_TBU_CONTROL, malidp_write32_mask 551 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_CONTROL, 0x7, TBU_DISCONNECT_MODE); malidp_write32_mask 557 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(reg, BLK_CONTROL, 0x7, INACTIVE_MODE);