malidp_write32     37 drivers/gpu/drm/arm/display/include/malidp_io.h 	malidp_write32(base, offset, v | tmp);
malidp_write32     46 drivers/gpu/drm/arm/display/include/malidp_io.h 		malidp_write32(base, offset + i * 4, values[i]);
malidp_write32    182 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, BLK_P1_STRIDE, fb->pitches[1] * block_h);
malidp_write32    187 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_P0_STRIDE, fb->pitches[0] * block_h);
malidp_write32    189 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, LAYER_FMT, kfb->format_caps->hw_id);
malidp_write32    210 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, AD_CONTROL, to_ad_ctrl(fb->modifier));
malidp_write32    214 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, LAYER_AD_H_CROP, HV_CROP(st->afbc_crop_l,
malidp_write32    216 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, LAYER_AD_V_CROP, HV_CROP(st->afbc_crop_t,
malidp_write32    224 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, BLK_P1_PTR_LOW, lower_32_bits(addr));
malidp_write32    225 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, BLK_P1_PTR_HIGH, upper_32_bits(addr));
malidp_write32    254 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, LAYER_R_CONTROL, upsampling);
malidp_write32    262 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_IN_SIZE, HV_SIZE(st->hsize, st->vsize));
malidp_write32    371 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, LAYER_PALPHA, D71_PALPHA_DEF_MAP);
malidp_write32    392 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_IN_SIZE, HV_SIZE(st->hsize, st->vsize));
malidp_write32    393 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_INPUT_ID0, to_d71_input_id(state, 0));
malidp_write32    428 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(c->reg, BLK_INPUT_ID0, 0);
malidp_write32    471 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_CONTROL, 0);
malidp_write32    474 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, BLK_INPUT_ID0 + (i << 2), 0);
malidp_write32    481 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 			malidp_write32(reg, CU_INPUT0_CONTROL +
malidp_write32    502 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(id_reg, BLK_INPUT_ID0, input_hw_id);
malidp_write32    504 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(cfg_reg, CU_INPUT0_SIZE,
malidp_write32    506 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(cfg_reg, CU_INPUT0_OFFSET,
malidp_write32    508 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(cfg_reg, CU_INPUT0_CONTROL, ctrl);
malidp_write32    527 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 			malidp_write32(id_reg, BLK_INPUT_ID0, 0);
malidp_write32    528 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 			malidp_write32(cfg_reg, CU_INPUT0_CONTROL, 0);
malidp_write32    532 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize));
malidp_write32    632 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_COEFFTAB, val);
malidp_write32    645 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_IN_SIZE, HV_SIZE(st->hsize_in, st->vsize_in));
malidp_write32    646 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_OUT_SIZE, HV_SIZE(st->hsize_out, st->vsize_out));
malidp_write32    647 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_H_CROP, HV_CROP(st->left_crop, st->right_crop));
malidp_write32    680 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_H_INIT_PH, init_ph);
malidp_write32    683 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_H_DELTA_PH, delta_ph);
malidp_write32    686 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_V_INIT_PH, init_ph);
malidp_write32    689 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SC_V_DELTA_PH, delta_ph);
malidp_write32    700 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_CONTROL, ctrl);
malidp_write32    701 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_INPUT_ID0, to_d71_input_id(state, 0));
malidp_write32    763 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(c->reg, BLK_CONTROL, 0);
malidp_write32    815 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_INPUT_ID0, to_d71_input_id(state, 0));
malidp_write32    816 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize));
malidp_write32    817 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, SP_OVERLAP_SIZE, st->overlap & 0x1FFF);
malidp_write32    818 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_CONTROL, BLK_CTRL_EN);
malidp_write32    879 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, MG_INPUT_ID0 + index * 4,
malidp_write32    882 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, MG_SIZE, HV_SIZE(st->hsize_merged,
malidp_write32    884 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_CONTROL, BLK_CTRL_EN);
malidp_write32    950 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, BLK_INPUT_ID0 + index * 4,
malidp_write32    953 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize));
malidp_write32   1049 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BS_ACTIVESIZE, HV_SIZE(hactive, vactive));
malidp_write32   1050 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BS_HINTERVALS, BS_H_INTVALS(hfront_porch,
malidp_write32   1052 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BS_VINTERVALS, BS_V_INTVALS(vfront_porch,
malidp_write32   1058 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BS_SYNC, value);
malidp_write32   1060 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BS_PROG_LINE, D71_DEFAULT_PREPRETCH_LINE - 1);
malidp_write32   1061 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BS_PREFETCH_LINE, D71_DEFAULT_PREPRETCH_LINE);
malidp_write32   1066 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 		malidp_write32(reg, BS_DRIFT_TO, hfront_porch + 16);
malidp_write32   1070 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 	malidp_write32(reg, BLK_CONTROL, value);
malidp_write32     78 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 	malidp_write32(reg, BLK_IRQ_CLEAR, raw_status);
malidp_write32    104 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 	malidp_write32(reg, BLK_IRQ_CLEAR, raw_status);
malidp_write32    146 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 	malidp_write32(reg, BLK_IRQ_CLEAR, raw_status);
malidp_write32    189 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 		malidp_write32(d71->gcu_addr, BLK_IRQ_CLEAR, raw_status);
malidp_write32    293 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 	malidp_write32(d71->gcu_addr, reg_offset, GCU_CONFIG_CVAL);