ltq_r32            51 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define ltq_ebu_r32(x)		ltq_r32(ltq_ebu_membase + (x))
ltq_r32            54 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define ltq_sys1_r32(x)		ltq_r32(ltq_sys1_membase + (x))
ltq_r32            17 arch/mips/include/asm/mach-lantiq/lantiq.h 	ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
ltq_r32            23 arch/mips/include/asm/mach-lantiq/lantiq.h #define ltq_ebu_r32(x)		ltq_r32(ltq_ebu_membase + (x))
ltq_r32            71 arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h #define ltq_cgu_r32(x)		ltq_r32(ltq_cgu_membase + (x))
ltq_r32            26 arch/mips/lantiq/early_printk.c 	do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET);
ltq_r32            56 arch/mips/lantiq/falcon/prom.c 	i->partnum = (ltq_r32(FALCON_CHIPID) & PART_MASK) >> PART_SHIFT;
ltq_r32            57 arch/mips/lantiq/falcon/prom.c 	i->rev = (ltq_r32(FALCON_CHIPID) & REV_MASK) >> REV_SHIFT;
ltq_r32            58 arch/mips/lantiq/falcon/prom.c 	i->srev = ((ltq_r32(FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT);
ltq_r32            66 arch/mips/lantiq/falcon/prom.c 		type = (ltq_r32(FALCON_CHIPTYPE) & TYPE_MASK) >> TYPE_SHIFT;
ltq_r32            65 arch/mips/lantiq/falcon/sysctrl.c #define sysctl_r32(m, x)	ltq_r32(sysctl_membase[m] + (x))
ltq_r32            70 arch/mips/lantiq/falcon/sysctrl.c #define status_r32(x)		ltq_r32(status_membase + (x))
ltq_r32            53 arch/mips/lantiq/irq.c 	ltq_r32(ltq_icu_membase[vpe] + m*LTQ_ICU_IM_SIZE + (x))
ltq_r32            56 arch/mips/lantiq/irq.c #define ltq_eiu_r32(x)		ltq_r32(ltq_eiu_membase + (x))
ltq_r32            46 arch/mips/lantiq/xway/dma.c #define ltq_dma_r32(x)			ltq_r32(ltq_dma_membase + (x))
ltq_r32            59 arch/mips/lantiq/xway/gptu.c #define gptu_r32(x)	ltq_r32(gptu_membase + (x))
ltq_r32            43 arch/mips/lantiq/xway/prom.c 	i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
ltq_r32            44 arch/mips/lantiq/xway/prom.c 	i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
ltq_r32           144 arch/mips/lantiq/xway/sysctrl.c #define pmu_r32(x)	ltq_r32(pmu_membase + (x))
ltq_r32            49 arch/mips/pci/ops-lantiq.c 		*data = ltq_r32(((u32 *)(cfg_base)));
ltq_r32            57 arch/mips/pci/ops-lantiq.c 	temp = ltq_r32(((u32 *)(cfg_base)));
ltq_r32            57 arch/mips/pci/pci-lantiq.c #define ltq_pci_r32(x)		ltq_r32(ltq_pci_membase + (x))
ltq_r32            60 arch/mips/pci/pci-lantiq.c #define ltq_pci_cfg_r32(x)	ltq_r32(ltq_pci_mapped_cfg + (x))
ltq_r32            70 drivers/net/ethernet/lantiq_etop.c #define ltq_etop_r32(x)		ltq_r32(ltq_etop_membase + (x))
ltq_r32            39 drivers/pinctrl/pinctrl-falcon.c #define pad_r32(p, reg)		ltq_r32(p + reg)
ltq_r32            44 drivers/pinctrl/pinctrl-falcon.c #define pad_getbit(m, r, p)	(!!(ltq_r32(m + r) & (1 << p)))
ltq_r32            59 drivers/pinctrl/pinctrl-xway.c #define gpio_getbit(m, r, p)	(!!(ltq_r32(m + r) & BIT(p)))