lri              2092 drivers/gpu/drm/i915/gt/intel_lrc.c static u32 *emit_lri(u32 *batch, const struct lri *lri, unsigned int count)
lri              2098 drivers/gpu/drm/i915/gt/intel_lrc.c 		*batch++ = i915_mmio_reg_offset(lri->reg);
lri              2099 drivers/gpu/drm/i915/gt/intel_lrc.c 		*batch++ = lri->value;
lri              2100 drivers/gpu/drm/i915/gt/intel_lrc.c 	} while (lri++, --count);
lri              2108 drivers/gpu/drm/i915/gt/intel_lrc.c 	static const struct lri lri[] = {
lri              2144 drivers/gpu/drm/i915/gt/intel_lrc.c 	batch = emit_lri(batch, lri, ARRAY_SIZE(lri));
lri               134 drivers/gpu/drm/vc4/vc4_validate_shaders.c live_reg_is_upper_half(uint32_t lri)
lri               136 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	return	(lri >= 16 && lri < 32) ||
lri               137 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		(lri >= 32 + 16 && lri < 32 + 32);
lri               397 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	u32 lri = waddr_to_live_reg_index(waddr, is_b);
lri               399 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	if (lri != -1) {
lri               407 drivers/gpu/drm/vc4/vc4_validate_shaders.c 			validation_state->live_immediates[lri] =
lri               410 drivers/gpu/drm/vc4/vc4_validate_shaders.c 			validation_state->live_immediates[lri] = ~0;
lri               413 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		if (live_reg_is_upper_half(lri))
lri               439 drivers/nfc/st21nfca/dep.c 				     u8 bri, u8 lri)
lri               459 drivers/nfc/st21nfca/dep.c 	psl_req->fsl = lri;
lri               503 drivers/nfc/st21nfca/dep.c 		if (ST21NFCA_PP2LRI(atr_res->ppi) != info->dep_info.lri)
lri               570 drivers/nfc/st21nfca/dep.c 	info->dep_info.lri = ST21NFCA_PP2LRI(atr_req->ppi);
lri               124 drivers/nfc/st21nfca/st21nfca.h 	u8 lri;