CM_REG_MISC_CTRL  739 sound/pci/cmipci.c 			snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
CM_REG_MISC_CTRL  742 sound/pci/cmipci.c 			snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
CM_REG_MISC_CTRL 1196 sound/pci/cmipci.c 		snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_AC3EN2);
CM_REG_MISC_CTRL 1202 sound/pci/cmipci.c 			snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1205 sound/pci/cmipci.c 			snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1218 sound/pci/cmipci.c 		snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_AC3EN2);
CM_REG_MISC_CTRL 1223 sound/pci/cmipci.c 				snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1226 sound/pci/cmipci.c 				snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1230 sound/pci/cmipci.c 			snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1258 sound/pci/cmipci.c 			snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K | CM_SPDF_AC97);
CM_REG_MISC_CTRL 1260 sound/pci/cmipci.c 			snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K | CM_SPDF_AC97);
CM_REG_MISC_CTRL 1405 sound/pci/cmipci.c 		snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1407 sound/pci/cmipci.c 		snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1420 sound/pci/cmipci.c 	snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL);
CM_REG_MISC_CTRL 1618 sound/pci/cmipci.c 		snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC);
CM_REG_MISC_CTRL 1641 sound/pci/cmipci.c 			snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC);
CM_REG_MISC_CTRL 2428 sound/pci/cmipci.c DEFINE_BIT_SWITCH_ARG(spdif_in_sel2, CM_REG_MISC_CTRL, CM_SPDIF_SELECT2, 0, 0);
CM_REG_MISC_CTRL 2434 sound/pci/cmipci.c DEFINE_SWITCH_ARG(spdo_5v, CM_REG_MISC_CTRL, CM_SPDO5V, 0, 0, 0); /* inverse: 0 = 5V */
CM_REG_MISC_CTRL 2442 sound/pci/cmipci.c DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, 0, 0, 0); /* reversed */
CM_REG_MISC_CTRL 2444 sound/pci/cmipci.c DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, CM_XCHGDAC, 0, 0);
CM_REG_MISC_CTRL 2446 sound/pci/cmipci.c DEFINE_BIT_SWITCH_ARG(fourch, CM_REG_MISC_CTRL, CM_N4SPK3D, 0, 0);
CM_REG_MISC_CTRL 2450 sound/pci/cmipci.c DEFINE_SWITCH_ARG(modem, CM_REG_MISC_CTRL, CM_FLINKON|CM_FLINKOFF, CM_FLINKON, 0, 0);
CM_REG_MISC_CTRL 2914 sound/pci/cmipci.c 		snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN);
CM_REG_MISC_CTRL 2973 sound/pci/cmipci.c 		snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN);
CM_REG_MISC_CTRL 2991 sound/pci/cmipci.c 	snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN);
CM_REG_MISC_CTRL 3079 sound/pci/cmipci.c 	snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_RESET);
CM_REG_MISC_CTRL 3080 sound/pci/cmipci.c 	snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_RESET);
CM_REG_MISC_CTRL 3088 sound/pci/cmipci.c 	snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC|CM_N4SPK3D);
CM_REG_MISC_CTRL 3090 sound/pci/cmipci.c 	snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
CM_REG_MISC_CTRL 3092 sound/pci/cmipci.c 	snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
CM_REG_MISC_CTRL 3106 sound/pci/cmipci.c 			snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_TXVX);
CM_REG_MISC_CTRL 3233 sound/pci/cmipci.c 	snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K|CM_SPDF_AC97);
CM_REG_MISC_CTRL 3312 sound/pci/cmipci.c 	CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL,