CMT 261 arch/sh/kernel/cpu/sh3/setup-sh7720.c INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60), CMT 271 arch/sh/kernel/cpu/sh3/setup-sh7720.c { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, CMT 70 arch/sh/kernel/cpu/sh4/setup-sh7760.c INTC_VECT(ADC, 0xf80), INTC_VECT(CMT, 0xfa0), CMT 99 arch/sh/kernel/cpu/sh4/setup-sh7760.c 0, MFI, 0, 0, 0, 0, ADC, CMT, } }, CMT 113 arch/sh/kernel/cpu/sh4/setup-sh7760.c MFI, 0, ADC, CMT } }, CMT 359 arch/sh/kernel/cpu/sh4a/setup-sh7343.c INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), CMT 398 arch/sh/kernel/cpu/sh4a/setup-sh7343.c { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, CMT 411 arch/sh/kernel/cpu/sh4a/setup-sh7343.c { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, CMT 297 arch/sh/kernel/cpu/sh4a/setup-sh7366.c INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), CMT 335 arch/sh/kernel/cpu/sh4a/setup-sh7366.c { 0, 0, 0, CMT, 0, USB, } }, CMT 350 arch/sh/kernel/cpu/sh4a/setup-sh7366.c { 0xa4080014, 0, 16, 4, /* IPRF */ { 0, DMAC45, USB, CMT } }, CMT 572 arch/sh/kernel/cpu/sh4a/setup-sh7722.c INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), CMT 612 arch/sh/kernel/cpu/sh4a/setup-sh7722.c { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, CMT 627 arch/sh/kernel/cpu/sh4a/setup-sh7722.c { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, CMT 971 arch/sh/kernel/cpu/sh4a/setup-sh7724.c INTC_VECT(CMT, 0xF00), CMT 1042 arch/sh/kernel/cpu/sh4a/setup-sh7724.c { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, CMT 1063 arch/sh/kernel/cpu/sh4a/setup-sh7724.c { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC0B, USB, CMT } }, CMT 266 arch/sh/kernel/cpu/sh4a/setup-sh7763.c INTC_VECT(CMT, 0x900), INTC_VECT(GETHER, 0x920), CMT 304 arch/sh/kernel/cpu/sh4a/setup-sh7763.c PCIINTA, PCISERR, HAC, CMT, 0, 0, 0, DMAC, CMT 319 arch/sh/kernel/cpu/sh4a/setup-sh7763.c { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { CMT, HAC, CMT 327 arch/sh/kernel/cpu/sh4a/setup-sh7780.c INTC_VECT(CMT, 0x900), INTC_VECT(HAC, 0x980), CMT 358 arch/sh/kernel/cpu/sh4a/setup-sh7780.c PCIINTA, PCISERR, HAC, CMT, 0, 0, DMAC1, DMAC0, CMT 368 arch/sh/kernel/cpu/sh4a/setup-sh7780.c { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { CMT, HAC,